Top Document: PDP-8 Summary of Models and Options (posted every other month) Previous Document: What is a PDP-8/I? Next Document: What is a PDP-12? See reader questions & answers on this topic! - Help others by sharing your knowledge Date of introduction: 1968 (Announced before August '68) Date of withdrawal: 1971. Total production run: 3902. Price: $8,500 Technology: DEC M-series flip Chip modules, as in the PDP-8/I, with the same core memory as the 8/I, but with a memory cycle cycle of 1.6 microseconds to avoid the speed problems that plagued early -8/I systems. The positive I/O bus, or posibus, was a 100 ohm bus clamped between 0 and 3 volts with TTL drivers and receivers. This was packaged with 18 signal lines per 2-sided interconnect cable, using double-sided shielded mylar ribbon cable in most cases. Electrically, coaxial cable could be used, but the slots in the CPU box were too small for this. Reason for introduction: This machine was developed as a moderately successful exercise using M-series logic to produce a lower cost but moderately fast machine. The idea was to cut costs by limiting provisions for expansion. Reason for withdrawal: The PDP-8/E made performance improvements while slightly undercutting the price of the PDP-8/L. Compatability: The core of the PDP-8 instruction set is present, but all Group 3 OPR instructions are no-ops, even the Group 3 version of the CLA instruction. This is because there was no provision made for adding an EAE to this machine. Microcoding RAR and RAL together works as in the PDP-8/I. Finally, a new front panel feature was added, the protect switch. When thrown, this makes the last page of the last field of memory read-only (to protect your bootstrap code). The instruction to change the data field on an 8/L becomes a no-op when the destination data field is non-existant; on all other machines, attempts to address non-existant fields are possible. One option for expanding the 8/L was to add a box that allowed 8/E memory modules to be added to the 8/L; when this was done, access to nonexistant data fields becomes possible and always returns 0000 on read. Standard configuration: A CPU with 4K of memory, plus 110 baud current loop teletype interface was standard. Both rack-mount and table-top versions were sold (both 9" high by 19" wide by 21" deep). The backplane was on top, with modules plugged in from the bottom. The rack-mount version could be slid out for maintenance. Expandability: The CPU supported a new bus standard, the PDP-8 posibus. There is little space for in-box peripherals, but an expander box with the same volume as the CPU was available, the BA08A; this was prewired to hold an additional 4K of memory and to support in-box peripheral interfaces for such devices as a Calcomp plotter interface, a card-reader interface, a 4 line asynch terminal interface, a real-time clock, and more. DEC eventually offered the BM12L, an 8K expansion box that is essentially the same as the MM8I, but using positive logic and thus incompatable with the -8/I and -12. This allowed a total memory of 12K on a PDP-8/L. This contains precisely the modules needed to upgrade a 4K PDP-8/I or PDP-12 to an 8K machine, or to populate an MM8I box to add 8K of additional memory to an 8/I or PDP-12. Finally, DEC eventually offered a box allowing PDP-8/E (OMNIBUS) memory to be used with the PDP-8/L. PDP-8/L configurations with over 8K of memory were awkward because the front panel only showed one bit of the extended memory address. As a result, extra lights and switches for the additional bits of the memory address were mounted on the front of the memory expander boxes for the large configurations. A variety of posibus peripherals were introduced, most of which were built with the option of negibus interface logic (the -P and -N suffixes on these new peripherals indicated which was which). Many early PDP-8/L systems were sold with DW08A bus level converters to run old negibus peripherals. Posibus peripherals introduced after the PDP-8/L (and also used with posibus versions of the PDP-8/I) included: -- The TC08 DECtape controller (for 8 TU55 or 4 TU56). -- The DF32D fixed head disk controller (a posibus DF32). -- The FPP-12 floating point processor. -- The TR02 simple magnetic tape control. -- The RK08 disk subsystem, 4 disk packs, 831,488 words each. Survival: Many PDP-8/L systems are in operating condition, some performing their original jobs. User Contributions:Top Document: PDP-8 Summary of Models and Options (posted every other month) Previous Document: What is a PDP-8/I? Next Document: What is a PDP-12? Single Page [ Usenet FAQs | Web FAQs | Documents | RFC Index ] Send corrections/additions to the FAQ Maintainer: jones@cs.uiowa.edu (Douglas W. Jones)
Last Update March 27 2014 @ 02:11 PM
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