Date of introduction:  1966 (Unveiled, Aug 23, WESCON, Los Angeles).
Date of withdrawal:    1970.
Total production run:  1024, or over 1500
	The first figure is from Computers and Automation, based on figures
	released by the manufacturer.  The second figure is based on memory
	of the first-year production run.  We need to look at the serial
	numbers on surviving machines to pin this down!
Price: $10,000

Technology:  DEC Flip Chip modules and core memory, as in the PDP-8.
	Unlike the PDP-8, the PDP-8/S memory module was mounted between
	a pair of quad-height single-width boards that plugged into the
	standard flip-chip sockets (this was sold separately as the H201
	core memory unit, at $2000 for 4K by 13 bits).  It is noteworthy
	that the prototype machine was built using Digital Logic Laboratory
	H901 plugboards and patchcords, based entirely on off-the-shelf
	modules.  Another new feature of the PDP-8 was its use of a single
	internal bus within the machine for all register transfers.  This
	was, of course, bit serial, but the idea formed the basis for
	the DEC UNIBUS and OMNIBUS and essentially all later bus-oriented
	CPU designs.

Reason for introduction:  This machine was developed as a successful
	exercise in minimizing the cost of the machine, in response to
	a complaint by Ken Olson that the company hadn't gotten the
	price of the PDP-8 down any further, and the vision that someday,
	people ought to be able to buy a desktop PDP-8 for under $10,000.
	The result was the least expensive general purpose computer ever
	made with second generation (discrete transistor) technology,
	and it was one of the smallest such machines to be mass produced
	(a number of smaller machines were made for aerospace
	applications).  It was also incredibly slow, with a 36
	microsecond add time, and some instructions taking as much as 78
	microseconds, even though the internal clock ran faster than
	that of the original PDP-8!  By 1967, DEC took the then unusual
	step of offering this machine for off the shelf delivery, with
	one machine stocked in each field office available for retail
	sale.

Reason for withdrawal:  The PDP-8/L vastly outperformed the PDP-8/S, and
	and it did so at a lower price.

Compatability:  The core of the PDP-8 instruction set is present, but
	there are a sufficient number of incompatabilities that, as with
	the PDP-5, many otherwise portable "family of 8" programs will
	not run on the PDP-8/S.  Perhaps the worst incompatability is
	that the Group 1 OPR instruction CMA cannot be combined with any
	of the rotate instructions; as with the PDP-8, IAC also cannot
	be combined with rotate.

Standard configuration:  CPU with 4K of memory, plus PT08 110 baud current
	loop teletype interface and teletype.  Both a rack-mount and
	table-top versions were sold (both 9" high by 19" wide by 20"?
	deep).  The rack mount version included slides so it could be
	pulled out for maintenance.

Expandability:  The CPU supported the standard PDP-8 negibus, but I/O
	bandwidth was 1/5 that of the PDP-8.  Thus, most, but not all
	PDP-8 peripherals could be used.  A few DEC peripherals such as
	the DF32 came with special options such as interleaving to slow
	them down for compatability with the PDP-8/S.  The speed problems
	were such that there was never any way to attach DECtape to this
	machine.

Survival:  Because they were so slow, PDP-8/S systems were quickly
	discarded as newer machines became available for comparable prices;
	thus, they are less common today than the Classic PDP-8, even
	though comparable numbers were made.  A few survive in working
	condition.