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PDP-8 Summary of Models and Options (posted every other month)
Section - What is a PDP-5?

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Date of introduction:  Aug 11, 1963, unveiled at WESCON.
Date of withdrawal:    early 1967.
Total production run:  116.
Price: $27,000

Technology:  The PDP-5 was built with DEC System Modules, the original
	line of transistorized logic modules sold by DEC.  The supply
	voltages were +10 and -15 volts, with logic levels of -3 (logic 1)
	and 0 (logic 0).  Logic was packaged on boards that were about
	4.75 inches high with each card mounted in a metal frame with a
	22 pin edge connector.

	Input output devices were connected to the daisy-chained I/O bus
	using military-style armored cables and connectors.  Use of
	toggle switches (as opposed to slide switches) on the front
	panel was another vestige of military-style design.

Reason for introduction:  This machine was inspired by the success of
	the CDC-160, Seymour Cray's 12 bit minicomputer, and by the
	success of the LINC, a machine that was built by DEC customers
	out of System modules.  These demonstrated that there was a
	market for a small inexpensive computer, and from the start,
	DEC's advertisements were aimed at this market.  "Now you can
	own the PDP-5 computer for what a core memory alone used to
	cost: $27,000", ran one 1964 ad.

	Ken Olson has stated that the PDP-5 was not originally meant to
	be a computer; it was designed for a company that wanted an
	automatic controller for some industrial work.  He told them
	they could make a small programmable controller instead of the
	hardwired machine they were asking for, and since they weren't
	entirely certain of the control equations they wanted to run, they
	accepted the idea. The result was the PDP-5.

Reason for withdrawal:  The PDP-8 outperformed the PDP-5, and did so for
	a lower price.

Compatability:  The core of the PDP-8 instruction set is present, but
	memory location zero is the program counter, and interrupts are
	handled differently.  The Group 1 OPR rotate instructions cannot
	be combined with IAC or CMA; this limits the ability of the
	PDP-5 to support code from later models.

The machine does not support 3 cycle data-break (DMA transfers using
	memory to hold buffer address and word-count information), so
	many later PDP-8 peripherals cannot be used on the PDP-5.  In
	addition, DMA transfers are not allowed outside the program's
	current 4K data field, severely limiting software compatability
	on systems with over 4K of memory where either interrupts or
	software initiated changes to the data field during a transfer
	would cause chaos.

Standard configuration:  CPU with 1K or 4K of memory (2K and 3K versions
	were not available).

	An extended arithmetic element (EAE) was available; this was an
	I/O device, using IOT instructions to evoke EAE operations.  As
	a result, it was not compatable with the later PDP-8 EAEs.  In
	addition, machines with the EAE option had a different front
	panel from those without.

	The type 552 DECtape control and type 555 dual DECtape transports
	were originally developed for the PDP-5 and contemporaneous DEC
	systems such as the PDP-6.

	After the PDP-8 was introduced, DEC offered a bus converter that
	allowed the PDP-5 to support standard PDP-8 negibus ueripherals,
	so long as they avoided using 3-cycle data break transfers.  The
	standard 804 PDP-8 expander box was frequently sold as an
	upgrade to PDP-5 systems.

Survival:  A small number of PDP-5 systems survive, at least one in near
	operational condition!

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Last Update March 27 2014 @ 02:11 PM