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D. Rocchesso: Sound Processing
jump operations
Arithmetic Logic Unit
a
b
a+b
a+b (OVP)
a+b (ZEP)
a+b (OVPZEP)
-0.5
0.7
0.2
0.2
0.2
0.2
0.5
0.7
-0.8
1.0
0.0
1.0
0.5
-0.7
-0.2
-0.2
0.0
0.0
-0.5
-0.7
0.8
-1.0
0.8
0.0
Multiplications are performed on the 16 most-significant bits of the operands
in order to give a 24-bit result. The multiplication can be summarized in the
following steps:
1) Consider only the 16 most-significant bits of the operands;
2) Multiply with 16-bit operand precision;
3) Consider only the 24 most-significant bits of the (31-bit) result.
The steps 1 and 3 imply quantization operations and precision loss. I passi 1
e 3 comportano delle operazioni di quantizzazione e pertanto comportano una
perdita di precisione. The following table shows some examples of multiplica-
tions expressed in decimal and hexadecimal notations
a
b
ab
a
16
b
16
ab
16
1.0
1.0
0.999939
7FFFFF
7FFFFF
7FFE00
1.0
0.5
0.499985
7FFFFF
400000
3FFF80
0.001
0.001
0.000001
0020C5
0020C5
000008
-1.0
1.0
-0.99970
800000
7FFFFF
800100
-1.0
-1.0
-1.0
800000
800000
800000
The examples highlight the need of looking at the results of multiplications with
special care. The worst mistake is the one in the last line, where the result is off
by 200% !
Another observation concerns the jump operations, that seem to be forbidden
in an architecture that is based on the cyclic reading of a fixed number of
microinstructions. Indeed, there are conditional instructions, that can change
the selection of operands feeding the ALU according to a control value taken,
for instance, from bus C. The presence of these instructions justify the name
ALU for the adder, since it is indeed a Arithmetic Logic Unit.
B.5.3
The Pipeline
We have seen that the architecture of a Digital Signal Processor allows to per-
form some operations in parallel. For instance, we can simultaneously perform
data transfers, multiplication, and addition. Most digital filters are based on the
iterative repetition of operations such as
y = y + h
i
s
i
(2)
where h
i
are the coefficients of the filter and s
i
are memory words containing the
filter state. A DSP architecture such as the one of the X20 allows to specify, in
31
Copied from the online help system of the ARES/MARS workstation.
32
Copied from the online help system of the ARES/MARS workstation.