Tools for Sound Processing
161
Multiply and Accumulate
(MAC)
pipeline
state update
circular buffering
a single microinstruction, the product of two registers containing h
i
and s
i
, the
accumulation of the product obtained at the prior cycle into another register
(containing y), and the register load with values h
i
and s
i
to be used at the
next cycle. In other terms, the Multiply and Accumulate (MAC) operation is
distributed onto three clock cycles, but for each cycle three MAC operations are
in execution simultaneously. This is a realization of the principle of the pipeline,
where the sample being "manufactured" has a latency time of three samples, but
the frequency of sample delivery is one per clock cycle. In digital filters, another
fundamental operation is the state update. In practice, after s
i
has been used,
it has to assume the value s
i-1
. As it is shown in chapter 2, such operation can
be avoided by proper indexing of memory accesses (circular buffering): Instead
of moving the data with s
i
s
i-1
we shift the indexes with i i - 1, in a
circular fashion.