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comp.arch.storage FAQ 2/2
Section - [8.1.4] Fast-Wide SCSI

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From: (Device) Interfaces

The max allowable transfer rate was raised to 10 MT/s (mega-transfers
per second) in SCSI-2, referred to as Fast SCSI. Note that this is NOT
required, devices running at ANY speed below that may claim to be
SCSI-II compliant! Fast implies SCSI-II, not the other way around!
Fast Narrow is thus 10 MB/sec. Both the initiator (computer) and
target (peripheral) must support fast transfer for it to be of any
use, but intermixing fast and slow devices on a bus presents no
operational problems (only performance ones).

A 16-bit bus (Wide SCSI) and 32-bit bus (double-wide SCSI) are
specified in SCSI-2. The wide busses require the use of a second cable
in SCSI-2. The first cable is 50 pins, known as the A cable; the 2nd
is 68 pins, known as the B cable. I know of no one actually using
32-bit SCSI, but it would also run on an A/B cable pair. Slow (or
Normal) Wide is thus 5 MT/s * 2 Bytes/T, 10 MB/sec. Fast Wide is 20
MB/sec. Fast Double Wide would be 40 MB/sec.

In the SCSI-3 physical layer spec (SCSI-PH), a single 68-pin cable,
known as the P cable, is allowable for 8 or 16-bit busses. This is the
option most people who have implemented Wide SCSI have chosen for the
cabling, even though their upper layer is generally SCSI-2.

There is a small movement (heard here on the net occassionally) to
promote an Ultra-SCSI high-speed bus, with a burst rate of something
like 20 MT/sec on very short cables. At present it is unclear what
will happen to this effort. There is also talk, in conjunction with a
change to low-voltage differential signalling, to go to 40MT/sec.

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Top Document: comp.arch.storage FAQ 2/2
Previous Document: [8.1.3] SCSI-I vs SCSI-II vs SCSI-III
Next Document: [8.1.5] Shared Busses / Performance {Brief}

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Last Update March 27 2014 @ 02:11 PM