Patent application number | Description | Published |
20090268636 | System and Method for Second Order Multi-Layer Traffic Grooming for Optical Network Optimization - A method of planning a network is disclosed. The method includes estimating a first cost of forming a direct connection between an origination central office and a destination central office. The method also includes estimating a second cost of forming a spoke connection between the origination central office and a hub node. The spoke connection is to carry residual data traffic. The method also includes determining whether to implement the direct connection based on whether the estimated first cost exceeds the estimated second cost. | 10-29-2009 |
20090274067 | System and Method for Network Planning - A method for designing a communication network is provided. Network demand data is gathered and network architecture data is gathered. Based in part on the network demand data and the network architecture data, a network plan is automatically generated. | 11-05-2009 |
20120275306 | NETWORK ASSESSMENT AND SHORT - TERM PLANNING PROCEDURE - A method for relieving network node congestion includes determining a moving average of an aggregated load on a network node that routes network traffic using historical data for a period of time for a portion of a communication network that includes the network node. Demand on the network node is projected based on the moving average. A current level of congestion on the network node is determined. A level of congestion on the network node is projected based on the projected demand and the current level of congestion. Available capacity of other network nodes in the portion of the communication network is estimated. A determination is made whether the projected level of congestion can be relieved using the estimated available capacity of the other network nodes. The communication network is reconfigured to relieve the projected level of congestion when the projected level of congestion can be relieved. | 11-01-2012 |
20130129352 | System and Method for Second Order Multi-Layer Traffic Grooming for Optical Network Optimization - A method includes forming a set of direct connections (including a high-speed connection and a low-speed connection) between an origination central office (OCO) and a destination central office (DCO). The method includes forming a spoke connection between the OCO and a hub node and forming a connection between the hub node and the DCO. The spoke connection is formed to carry first residual demand traffic from the OCO to the hub node. The connection is formed to carry the first residual demand traffic and second residual demand traffic (received at the hub node from other OCOs) from the hub node to the DCO. The method includes determining a first estimated cost (of forming the set of direct connections) and a second estimated cost (of forming the spoke connection and the connection). The method includes determining whether the first estimated cost exceeds the second estimated cost. | 05-23-2013 |
20130246649 | NETWORK ASSESSMENT AND SHORT - TERM PLANNING PROCEDURE - A method for relieving network node congestion includes determining an average of an aggregated load on a network node that routes network traffic, projecting a demand on the network node based on extrapolating the average of the aggregated load to a future period, determining a current level of congestion on the network node, and projecting a future level of congestion on the network node based on the projected demand and the current level of congestion. An available capacity of other network nodes in a portion of the communication network that includes the network node is determined, as well as whether the projected future level of congestion on the network node can be relieved using the determined available capacity of the other network nodes. | 09-19-2013 |
Patent application number | Description | Published |
20120112773 | System and method for on-chip resistorcalibration in semiconductor devices - According to one disclosed embodiment, an on-chip resistor calibration circuit includes an RC oscillator having a test resistor and a precision capacitor as elements, a counter, and a reference clock. In one embodiment, an RC oscillator generates a waveform having a period dependent upon the resistance of the test resistor and the capacitance of the precision capacitor. In such an embodiment, a counter and a reference clock may be configured to measure the period of the waveform. Using a pre-determined capacitance of the precision capacitor, a resistance of the test resistor may be determined. In another embodiment, an RC oscillator generates first and second waveforms through use of an additional capacitor that can be switched in and out of the RC oscillator circuit. Using a pre-determined capacitance of the precision capacitor, an RC product of the test resistor and the additional capacitor may be determined. | 05-10-2012 |
20130120034 | Voltage Controlled Oscillator Calibration - A mobile communication device is provided that has a transceiver including a voltage controlled oscillator (VCO) and a calibration circuit for calibrating the VCO. The calibration circuit includes a logic block configured to estimate a calibration value for a tuning of the VCO to a desired frequency, and an asynchronous counter configured to execute a counting sequence to identify a frequency of the VCO after the tuning of the VCO using the calibration value, where the calibration circuit is configured to determine a tuned calibration value for producing the desired frequency from the counting sequence. | 05-16-2013 |
20130285679 | On-Chip Resistor Calibration in Semiconductor Devices - According to one disclosed embodiment, an on-chip resistor calibration circuit includes an RC oscillator having a test resistor and a precision capacitor as elements, a counter, and a reference clock. In one embodiment, an RC oscillator generates a waveform having a period dependent upon the resistance of the test resistor and the capacitance of the precision capacitor. In such an embodiment, a counter and a reference clock may be configured to measure the period of the waveform. Using a pre-determined capacitance of the precision capacitor, a resistance of the test resistor may be determined. In another embodiment, an RC oscillator generates first and second waveforms through use of an additional capacitor that can be switched in and out of the RC oscillator circuit. Using a pre-determined capacitance of the precision capacitor, an RC product of the test resistor and the additional capacitor may be determined. | 10-31-2013 |