Patent application number | Description | Published |
20090009976 | MEMORY CARD - Memory card includes a circuit board, a component mounted on a main face of the circuit board, casing covering at least the main face of the circuit board and the component, and bittering agent retained in a roughened area provided on casing or an exposed part of the circuit board. | 01-08-2009 |
20090055576 | MEMORY CONTROLLER, NONVOLATILE STORAGE DEVICE, NONVOLATILE STORAGE SYSTEM, AND DATA WRITING METHOD - A nonvolatile storage device is provided with a nonvolatile main storage memory ( | 02-26-2009 |
20090210612 | MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, AND NONVOLATILE MEMORY SYSTEM - In rewriting processing of logical sectors, data of the transferred logical sectors are temporarily stored in a memory buffer. When the buffer memory has been full filled with data, the data is written into a flash memory. In rewriting processing for the flash memory including a writing unit (page) having a capacity larger than a minimum writing unit (sector) from outside, the number of executions of the evacuation processing can be reduced and the fast data rewriting can be performed. Thus, it is possible to rationalize the evacuation processing for old data caused in the rewriting in units of sectors and to improve the data rewriting speed. | 08-20-2009 |
20100163630 | ANTENNA BUILT-IN MODULE, CARD TYPE INFORMATION DEVICE, AND METHODS FOR MANUFACTURING THEM - An antenna built-in module which incorporates an antenna, is thin and excellent in antenna characteristics, a card type information device and a method for manufacturing the same are provided. A wiring board ( | 07-01-2010 |
20130045635 | HIGH-SPEED INTERFACE CONNECTOR - A high-speed interface connector is used for connecting a cable or a memory card each having a differential transmission system signal pin arrangement including a pair of differential transmission signaling pins that are adjacent to each other and two stable potential pins provided on both sides of the pair of differential transmission signaling pins, the two stable potential pins having potentials different from each other. The connector includes: a first and a second contact terminals for differential transmission respectively connected to the pair of differential transmission signaling pins; and a third and a fourth contact terminals provided on both sides of the first and the second contact terminal, the third contact terminal adjacent to the first contact terminal being connected to one of the two stable potential pins, and the fourth contact terminal adjacent to the second contact terminal having a potential identical to that of the third contact terminal. | 02-21-2013 |
20130059452 | CARD DEVICE AND SOCKET - The present application discloses a card device configured to be inserted into and ejected from a host device in a first direction. The card device includes a first housing including a leading edge which is inserted into the host device on ahead, and a trailing edge opposite to the leading edge; a first electrode array including first electrodes aligned in a second direction along the leading edge; and a second electrode array including second electrodes aligned in the second direction between the first electrode array and the trailing edge. The second electrodes include an electrode shifted from the first electrodes in the second direction. | 03-07-2013 |
20130238566 | STORAGE DEVICE, HOST DEVICE, AND STORAGE SYSTEM - A storage device includes a first storage area in which data can be read out and rewritten and file data is stored, a second storage area in which data can be read out and appended to an unwritten area and a first calculated value for detecting falsification which is calculated from the file data, and a controller that performs access control on the first storage area and the second storage area. The controller includes a frontend unit that receives a command from an external host device and accesses the first storage area and the second storage area, and a falsification detection notification unit that determines, without reading out the first calculated value to the host device, whether the first calculated value matches a second calculated value for detecting falsification which is calculated from the file data and notifies the host device of the determination result. | 09-12-2013 |
20130250672 | SHARED BIT LINE SMT MRAM ARRAY WITH SHUNTING TRANSISTORS BETWEEN BIT LINES - An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells. | 09-26-2013 |
20130250673 | Shared Bit Line SMT MRAM Array with Shunting Transistors Between Bit Lines - An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells. | 09-26-2013 |
20130265821 | SHARED BIT LINE SMT MRAM ARRAY WITH SHUNTING TRANSISTORS BETWEEN BIT LINES - An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells. | 10-10-2013 |
20130301347 | Shared Bit Line SMT MRAM Array with Shunting Transistors Between Bit Lines - An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells. | 11-14-2013 |
20130342943 | INPUT PROTECTION CIRCUIT - In an input protection circuit, one end of a resistive element of a protection circuit is connected to an intermediate impedance point of a terminating device, which is connected between a pair of external terminals of a low amplitude differential interface circuit. The other end of the resistive element is connected to an anode terminal of a diode element. A cathode terminal of the diode element is connected to a reference potential terminal. As a result, even when one of external terminals of a low-breakdown voltage circuit is erroneously in contact with a signal terminal (i.e., a bus terminal which is always pulled up via a high resistance resistor) of the socket to be pulled up to a high voltage, the elements forming the circuit are greatly protected from deterioration and damages at low costs, while maintaining the quality of transmission signals. | 12-26-2013 |
20140051353 | CARD COMMUNICATION DEVICE - A card communication device comprises an antenna, a card socket to which a memory card is attached, a detector for detecting whether the memory card is attached to the card socket or not, a switching section for switching electrical connection of a terminal of the antenna to a predetermined connecting terminal of the memory card attached to the card socket between an on state and an off state, and a controller for controlling an operation of the switching section. When the detector detects the attachment of the memory card to the card socket, the controller determines a type of the attached memory card, and only when the determined memory card is a specific type of the memory card, the controller controls the switching section so that the electric connection is switched from the off state into the on state. | 02-20-2014 |