Yu, San Jose

Byron M. Yu, San Jose, CA US

Patent application number	Description	Published
20110224572	Brain machine interface - Artificial control of a prosthetic device is provided. A brain machine interface contains a mapping of neural signals and corresponding intention estimating kinematics (e.g. positions and velocities) of a limb trajectory. The prosthetic device is controlled by the brain machine interface. During the control of the prosthetic device, a modified brain machine interface is developed by modifying the vectors of the velocities defined in the brain machine interface. The modified brain machine interface includes a new mapping of the neural signals and the intention estimating kinematics that can now be used to control the prosthetic device using recorded neural brain signals from a user of the prosthetic device. In one example, the intention estimating kinematics of the original and modified brain machine interface includes a Kalman filter modeling velocities as intentions and positions as feedback.	09-15-2011

Chris Yu, San Jose, CA US

Patent application number	Description	Published
20110239278	Verifying Access Rights to a Network Account Having Multiple Passwords - A computer-implemented system and method for verifying access to a network account are provided. A first user communication portal is associated with a user network account. A request to access the user network account is received from a second user communication portal. Security criteria related to the second user communication portal is determined. Access to the user network account is enabled upon receipt of a communication associated with the first user communication portal when the security criteria is of a predetermined value.	09-29-2011

Christopher Yu, San Jose, CA US

Patent application number	Description	Published
20090065650	DYNAMIC ROUGHNESS FOR AERODYNAMIC APPLICATIONS - Systems and methods for providing dynamic control to a surface immersed in a dynamic fluid. The systems and methods of the invention relate to one or more morphable surfaces that can be control in an active manner to provide asperities that interact with a fluid moving across the morphable surfaces. By controlling the size, shape and location of the asperities, one can exert control authority over the motion of the surface relative to the fluid. Examples of materials that provide suitable morphable surfaces include ionic polymer metal composites and shape memory polymers, both of which types of material are commercially available. Useful morphable surface systems have been examined and are described.	03-12-2009

David Yu, San Jose, CA US

Patent application number	Description	Published
20110199928	FEEDBACK CONTROL OF PROCESSOR USE IN VIRTUAL SYSTEMS - A device may receive packets for a system and obtain a packet drop rate of the system, a processor utilization rate of the system, and a target processor utilization rate of the system. In addition, the device may determine a target packet drop rate based on the packet drop rate, the processor utilization rate, and the target processor utilization rate. The device may drop a portion of the packets in accordance with the packet drop rate.	08-18-2011

Erwin E. Yu, San Jose, CA US

Patent application number	Description	Published
20100110797	METHOD AND APPARATUS FOR PROGRAMMING FLASH MEMORY - A method and apparatus that provides the ability to control programming pulses having different widths and/or voltages in a flash memory device. The widths and/or voltage levels of programming pulses are set to achieve programming of all memory cells of an array using a minimum number of programming pulses.	05-06-2010
20110235429	METHOD AND APPARATUS FOR PROGRAMMING FLASH MEMORY - A method and apparatus that provides the ability to control programming pulses having different widths and/or voltages in a flash memory device. The widths and/or voltage levels of programming pulses are set to achieve programming of all memory cells of an array using a minimum number of programming pulses.	09-29-2011

Patent applications by Erwin E. Yu, San Jose, CA US

Guanyuan M. Yu, San Jose, CA US

Patent application number	Description	Published
20080312875	Monitoring and control of integrated circuit device fabrication processes - An integrated circuit (IC) device fabrication process may be monitored by processing product wafers to fabricate product IC devices, collecting process tool data from tools used to fabricate the product IC devices, and testing the product IC devices. To predict and monitor yield, the process tool data collected during processing and the defectivity data from testing the product IC devices may be input to a yield model that also takes into account design information particular to the product devices. The design information may comprise layout attributes of the product devices. The yield model may be generated from a defectivity model created by processing test wafers to fabricate test structures, collecting process tool data from tools used to fabricate the test structures, and testing the test structures. The test structures may have varying layout attributes to cover a design space allowed by design rules for particular product IC devices.	12-18-2008

Hailing Yu, San Jose, CA US

Patent application number	Description	Published
20090106741	UNIFIED TRACING SERVICE - A computer is programmed with multiple software programs to record structures including (a) unstructured information to denote a transition between portions of code, and (b) metadata related to one or more attributes of the information. In addition, the computer writes two additional types of structures: section type, and dump type. The section type structure has metadata to indicate a beginning and an end, to bracket a group of structures located therebetween. The dump type has a dump header and a dump body. The dump header includes a symbol to indicate it's of dump type. The dump body is a set of values of an object used by the software program(s) during execution by the computer. A group of structures, within a section type, may include structures of each of the trace record type, dump type and section type.	04-23-2009
20120005188	TECHNIQUES FOR RECOMMENDING PARALLEL EXECUTION OF SQL STATEMENTS - Techniques for automatically recommending parallel execution of a SQL statement. In one set of embodiments, a first determination can be made regarding whether a SQL statement can be executed in parallel. Further, a second determination can be made regarding whether executing the SQL statement in parallel is faster than executing the statement in serial by a predetermined factor. If the first determination and second determination are positive (i.e., the statement can be executed in parallel and parallel execution is faster by the predetermined factor), a recommendation can be provided indicating that the SQL statement should be executed in parallel. In some embodiments, the recommendation can include a report specifying the degree of performance improvement gained from parallel execution, additional system resources consumed by parallel execution, and other statistics pertaining to the recommended parallel execution plan.	01-05-2012
20120005189	TECHNIQUES FOR RECOMMENDING ALTERNATIVE SQL EXECUTION PLANS - Techniques for automatically recommending alternative execution plans for a SQL statement. In one set of embodiments, information pertaining to one or more execution plans for a SQL statement can be retrieved from a set of plan sources. The one or more execution plans can include the current execution plan for the statement and one or more historical execution plans. Based on the retrieved information, the performance of the one or more execution plans can be compared to each other. Based on the comparison, a recommendation can be provided to a user indicating that a particular execution plan (e.g., a historical execution plan) should be used in place of the current execution plan to execute the SQL statement.	01-05-2012

Haiming Yu, San Jose, CA US

Patent application number	Description	Published
20100157691	Dual Port PLD Embedded Memory Block to Support Read-Before-Write in One Clock Cycle - A method for a read-before-write functionality for a memory within a programmable logic device (PLD) is provided. The method begins when a read operation and a write operation are initiated through two different ports of a memory simultaneously to access the same address in the memory. In order to prevent the write operation from proceeding prior to the read operation, a read-before-write control logic is provided to the control block of the port that supports the write operation. Thus, the write operation is paused until the control block of the port that supports the write operation receives a signal from a read sense amplifier indicating that the read operation is complete. The read sense amplifier is capable of detecting the completion of a read operation by monitoring the voltage difference of the read bitline. When this voltage difference reaches a threshold value, the read sense amplifier triggers a write wordline signal. The enabling of the write wordline signal causes, the data to be written to the memory.	06-24-2010

Haixia Yu, San Jose, CA US

Patent application number	Description	Published
20130086165	MEETING SYSTEM THAT INTERCONNECTS GROUP AND PERSONAL DEVICES ACROSS A NETWORK - Systems and methods are provided for hosting collaboration between multiple clients. The system includes a network interface able to communicate with clients, and a control unit. The control unit is able to receive a screen capture that represents visual content at a display of a client, to identify multiple clients for receiving the screen capture, and to transmit the screen capture to the multiple clients for presentation at displays of the multiple clients. The control unit is further able to receive instructions in parallel from the multiple clients representing marks made upon the screen capture, and to transmit the instructions in parallel to the multiple clients to apply the marks onto the screen capture as presented at the displays of the multiple clients.	04-04-2013
20130086166	MEETING SYSTEM THAT INTERCONNECTS GROUP AND PERSONAL DEVICES ACROSS A NETWORK - Systems and methods are provided for hosting collaboration between multiple clients. The system includes a network interface able to communicate with clients, and a control unit. The control unit is able to receive a screen capture that represents visual content at a display of a client, to identify multiple clients for receiving the screen capture, and to transmit the screen capture to the multiple clients for presentation at displays of the multiple clients. The control unit is further able to receive instructions in parallel from the multiple clients representing marks made upon the screen capture, and to transmit the instructions in parallel to the multiple clients to apply the marks onto the screen capture as presented at the displays of the multiple clients.	04-04-2013
20130086209	MEETING SYSTEM THAT INTERCONNECTS GROUP AND PERSONAL DEVICES ACROSS A NETWORK - Systems and methods are provided for hosting collaboration between multiple clients. The system includes a network interface able to communicate with clients, and a control unit. The control unit is able to receive a screen capture that represents visual content at a display of a client, to identify multiple clients for receiving the screen capture, and to transmit the screen capture to the multiple clients for presentation at displays of the multiple clients. The control unit is further able to receive instructions in parallel from the multiple clients representing marks made upon the screen capture, and to transmit the instructions in parallel to the multiple clients to apply the marks onto the screen capture as presented at the displays of the multiple clients.	04-04-2013
20130086487	MEETING SYSTEM THAT INTERCONNECTS GROUP AND PERSONAL DEVICES ACROSS A NETWORK - Systems and methods are provided for hosting collaboration between multiple clients. The system includes a network interface able to communicate with clients, and a control unit. The control unit is able to receive a screen capture that represents visual content at a display of a client, to identify multiple clients for receiving the screen capture, and to transmit the screen capture to the multiple clients for presentation at displays of the multiple clients. The control unit is further able to receive instructions in parallel from the multiple clients representing marks made upon the screen capture, and to transmit the instructions in parallel to the multiple clients to apply the marks onto the screen capture as presented at the displays of the multiple clients.	04-04-2013

I-Kang Yu, San Jose, CA US

Patent application number	Description	Published
20100185808	METHODS AND SYSTEMS FOR STORING AND ACCESSING DATA IN UAS BASED FLASH-MEMORY DEVICE - Methods and systems for storing and accessing data in UAS based flash memory device are disclosed. UAS based flash memory device comprises a controller and a plurality of non-volatile memories (e.g., flash memory) it controls. Controller is configured for connecting to a UAS host via a physical layer (e.g., plug and wire based on USB 3.0) and for conducting data transfer operations via two sets of logical pipes. Controller further comprises a random-access-memory (RAM) buffer configured for enabling parallel and duplex data transfer operations through the sets of logical pipes. In addition, a Smart Storage Switch configured for connecting multiple non-volatile memory devices is included in the controller. Finally, a security module/engine/unit is provided for data security via user authentication data encryption/decryption of the device. Furthermore, the flash memory device includes an optical transceiver configured for optical connection to a host also configured with an optical transceiver.	07-22-2010

James J. Yu, San Jose, CA US

Patent application number	Description	Published
20090304002	SYSTEM FOR SHARING A NETWORK PORT OF A NETWORK INTERFACE INCLUDING A LINK FOR CONNECTION TO ANOTHER SHARED NETWORK INTERFACE - A system for sharing a network port of a network interface includes a plurality of processing units, a first network interface unit coupled to a first portion of the plurality of processing units, a second network interface unit coupled to a different portion of the plurality of processing units, and a link coupled between the first and second network interface units. The first and second network interface units each includes an independently controllable network port for connection to a network, and a virtual interface. The network port includes a shared MAC unit, a link interface, and control logic, which may selectably route packets between processing units of the first portion of the plurality of processing units and the network via the link and the network port of the second network interface unit. The virtual interface may include a plurality of independent programmable virtual MAC units.	12-10-2009
20090304022	SHARED VIRTUAL NETWORK INTERFACE - A system includes one or more processing units coupled to a network interface unit. The network interface unit may include a network port for connection to a network and a virtual interface that may be configured to distribute an available communication bandwidth of the network port between the one or more processing units. The network port may include a shared media access control (MAC) unit. The virtual interface may include a plurality of processing unit resources each associated with a respective one of the one or more processing units. Each of the processing unit resources may include an I/O interface unit coupled to a respective one of the one or more processing units via an I/O interconnect, and an independent programmable virtual MAC unit that is programmably configured by the respective one of the one or more processing units. The virtual interface may also include a receive datapath and a transmit datapath that are coupled between and shared by the plurality of processing unit resources and the network port.	12-10-2009

Jick Yu, San Jose, CA US

Patent application number	Description	Published
20100075494	INTEGRATION OF ALD TANTALUM NITRIDE FOR COPPER METALLIZATION - A method and apparatus for depositing a tantalum nitride barrier layer is provided for use in an integrated processing tool. The tantalum nitride is deposited by atomic layer deposition. The tantalum nitride is removed from the bottom of features in dielectric layers to reveal the conductive material under the deposited tantalum nitride. Optionally, a tantalum layer may be deposited by physical vapor deposition after the tantalum nitride deposition. Optionally, the tantalum nitride deposition and the tantalum deposition may occur in the same processing chamber.	03-25-2010

Patent applications by Jick Yu, San Jose, CA US

Jick M. Yu, San Jose, CA US

Patent application number	Description	Published
20080237029	Oxidized Barrier Layer - A method and resultant produce of forming barrier layer based on ruthenium tantalum in a via or other vertical interconnect structure through a dielectric layer in a multi-level metallization. The RuTa layer in a RuTa/RuTaN bilayer, which may form discontinuous islands, is actively oxidized, preferably in an oxygen plasma, to thereby bridge the gaps between the islands. Alternatively, ruthenium tantalum oxide is reactive sputtered onto the RuTaN or directly onto the underlying dielectric by plasma sputtering a RuTa target in the presence of oxygen.	10-02-2008
20090017227	Remote Plasma Source for Pre-Treatment of Substrates Prior to Deposition - A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.	01-15-2009
20090087982	SELECTIVE RUTHENIUM DEPOSITION ON COPPER MATERIALS - Embodiments of the invention provide processes for selectively forming a ruthenium-containing film on a copper surface over exposed dielectric surfaces. Thereafter, a copper bulk layer may be deposited on the ruthenium-containing film. In one embodiment, a method for forming layers on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a copper-containing surface and a dielectric surface, exposing the substrate to a ruthenium precursor to selectively form a ruthenium-containing film over the copper-containing surface while leaving exposed the dielectric surface, and depositing a copper bulk layer over the ruthenium-containing film.	04-02-2009
20090215264	PROCESS FOR SELECTIVE GROWTH OF FILMS DURING ECP PLATING - Methods of controlling deposition of metal on field regions of a substrate in an electroplating process are provided. In one aspect, a dielectric layer is deposited under plasma on the field region of a patterned substrate, leaving a conductive surface exposed in the openings. Electroplating on the field region is reduced or eliminated, resulting in void-free features and minimal excess plating. In another aspect, a resistive layer, which may be a metal, is used in place of the dielectric. In a further aspect, the surface of the conductive field region is modified to change its chemical potential relative to the sidewalls and bottoms of the openings.	08-27-2009
20100096273	CU SURFACE PLASMA TREATMENT TO IMPROVE GAPFILL WINDOW - A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.	04-22-2010
20100099251	METHOD FOR NITRIDATION PRETREATMENT - In one embodiment, a method for fabricating a damascene structure is provided which includes exposing a dielectric surface on a substrate to a nitrogen plasma to form a nitrided dielectric layer, wherein the dielectric surface contains a plurality of openings therein, depositing a barrier layer on the nitrided dielectric surface, and depositing a seed layer over the barrier layer. In some examples, the nitrogen plasma is formed from nitrogen gas or a mixture of nitrogen gas and hydrogen gas. The nitrogen plasma may be formed in a barrier deposition chamber or by a reactive preclean chamber. In another embodiment, a bulk layer may be deposited to fill the openings after depositing the seed layer. In one example, the bulk layer may contain copper, tungsten, or alloys thereof, and be deposited by an electrochemical plating process.	04-22-2010
20100167526	METHOD FOR IMPROVING ELECTROMIGRATION LIFETIME OF COPPER INTERCONNECTION BY EXTENDED POST ANNEAL - Methods for improving electromigration of copper interconnection structures are provided. In one embodiment, a method of annealing a microelectronic device includings forming microelectronic features on a substrate, forming a contact structure over the microelectronic features, and forming a copper interconnection structure over the contact structure. A passivation layer is deposited over the copper interconnection structure and the substrate is subjected to a first anneal at a temperature of about 350° C. to 400° C. for a time duration between about 30 minutes to about 1 hour. The substrate is subjected to a second anneal at a temperature of about 150° C. to 300° C. for a time duration between about 24 to about 400 hours.	07-01-2010
20110209982	METHODS FOR DEPOSITING A LAYER ON A SUBSTRATE USING SURFACE ENERGY MODULATION - Methods for depositing layers on substrates are provided herein. In some embodiments, a method of forming a layer on a substrate having at least one feature disposed therein includes forming a conformal layer on an upper surface of the substrate and within the at least one feature by sputtering a target material using a first plasma that reduces the surface energy of the target material such that the sputtered target material wets the upper surface of the substrate and the at least one feature to form the conformal layer; and filling at least a portion of the at least one feature by sputtering the target material using a second plasma different from the first plasma to increase the surface energy of the sputtered target material and the conformal layer such that at least portions of the conformal layer are pulled into the at least one feature by capillary action.	09-01-2011
20110300720	Plasma treatment of substrates prior to deposition - A plasma processing chamber particularly useful for pre-treating low-k dielectric films and refractory metal films subject to oxidation prior to deposition of other layers. A remote plasma source (RPS) excites a processing gas into a plasma and delivers it through a supply tube to a manifold in back of a showerhead faceplate. The chamber is configured for oxidizing and reducing plasmas in the same or different processes when oxygen and hydrogen are selectively supplied to the RPS. The supply tube and showerhead may be formed of dielectric oxides which may be passivated by a water vapor plasma from the remote plasma source. In one novel process, a protective hydroxide coating is formed on refractory metals by alternating neutral plasmas of hydrogen and oxygen.	12-08-2011
20120070982	METHODS FOR FORMING LAYERS ON A SUBSTRATE - Methods for forming layers on a substrate having one or more features formed therein are provided herein. In some embodiments, a method for forming layers on a substrate having one or more features formed therein may include depositing a seed layer within the one or more features; and etching the seed layer to remove at least a portion of the seed layer proximate an opening of the feature such that the seed layer comprises a first thickness disposed on a lower portion of a sidewall of the feature proximate a bottom of the feature and a second thickness disposed on an upper portion of the sidewall proximate the opening of the feature and wherein the first thickness is greater than the second thickness.	03-22-2012
20120121799	Method For Segregating The Alloying Elements And Reducing The Residue Resistivity Of Copper Alloy Layers - Methods for forming interconnect or interconnections on a substrate for use in a microelectric device are disclosed. In one or more embodiments, the method includes depositing an alloy layer comprising Cu and an alloying element, for, example, Mn, in a dielectric layer and segregating or diffusing the alloying element from the bulk Cu portion of the alloy layer. In one or more embodiments, the method includes annealing the alloy layer in an atomic hydrogen atmosphere. After annealing, the alloy layer exhibits a resistivity that is substantially equivalent to the resistivity of a pure Cu layer.	05-17-2012

Patent applications by Jick M. Yu, San Jose, CA US

Kang Yu, San Jose, CA US

Patent application number	Description	Published
20090046530	RESETTABLE MEMORY APPARATUSES AND DESIGN - Resettable memory implemented using memory without reset and methods and apparatuses to design the same. A resettable memory may include: a plurality of resettable memory cells; a plurality of memory units; and a reset information propagation logic coupled to the resettable memory cells and the memory units. The reset information propagation logic is to write reset information into a portion of the memory units when one of the resettable memory cells has a reset value and one of the memory units is written into. Alternatively, a resettable memory may include: a memory unit; a resettable finite state machine to change state in response to write request to the memory unit; and a selector coupled to the finite state machine and the memory unit to select one from a reset value and an output from the memory unit based on at least a state of the finite state machine.	02-19-2009
20110026350	Resettable Memory Apparatuses and Design - In one aspect of the present invention, a memory apparatus comprises a plurality of resettable memory cells, a plurality of memory units, and a reset information propagation logic coupled to the resettable memory cells and the memory units. The reset information propagation logic designed to write reset information into a portion of the memory units in response to one of the resettable memory cells having a reset value when one of the memory units is written into.	02-03-2011

Kaung Shia Yu, San Jose, CA US

Patent application number	Description	Published
20090033353	SYSTEMS AND METHODS FOR ELECTRICAL CHARACTERIZATION OF INTER-LAYER ALIGNMENT - Systems and methods for electrical characterization of inter-layer alignment. In one embodiment, a wafer including a plurality of test structures are accessed. The plurality of test structures include chains of conductive segments on multiple layers, coupled by vias. The plurality of test structures are designed with varying amounts of intentional misalignment between the multiple layers. The reactance of each of the plurality of test structures is measured. The reactance is analyzed to determine the process-induced inter-layer misalignment of the integrated circuit wafer.	02-05-2009

Ken Yu, San Jose, CA US

Patent application number	Description	Published
20100045232	MODULARIZED INTERFACE AND RELATED METHOD FOR CONNECTING PLUG-IN ELECTRIC VEHICLES TO THE ENERGY GRID - This invention is directed to a modularized interface for connecting a plug-in electric vehicle to the energy grid. For use with public or semi-public outlets, the modularized interface comprises a module and a smart socket, where the module is integrated within or capable of being connected to, the vehicle's charging interface. The module is normally disabled, but is enabled only after the end user is authenticated, the smart socket and its associated meter have been identified, and the module and the end user's account with the local utility are validated. The module meters the energy consumption, and, when the module is disconnected from the smart socket, indicating termination of the charging session, the metered data is communicated to the utility for updating the end user's account, and the module is disabled. The module is also capable of use with conventional outlets located, for example, in private residences.	02-25-2010

Kenan Yu, San Jose, CA US

Patent application number	Description	Published
20090026502	VIA ANTENNA FIX IN DEEP SUB-MICRON CIRCUIT DESIGNS - A filler cell for use in fabricating an integrated circuit. The filler cell couples a power supply rail of an adjacent logic cell to a power supply rail of another adjacent logic cell. The filler cell also has a diode to bleed charge accumulated on the power rails of the adjacent logic cells to the substrate. The diode is reverse biased during normal integrated circuit operation. A method for fabricating an integrated circuit with a power grid. At least one filler cell is placed on the integrated circuit to bleed away charge accumulated on the power grid during the fabrication of the integrated circuit. The filler cell is connected to a supply rail of an adjacent logic cell.	01-29-2009

Ling Yu, San Jose, CA US

Patent application number	Description	Published
20110204924	Techniques For Measuring Voltages in a Circuit - A circuit includes a comparator, a resistor divider, a control circuit, a multiplexer, and a programmable gain amplifier. The comparator is operable to measure an internal voltage of the circuit based on a selected reference voltage. The resistor divider is operable to generate reference voltages. The control circuit is operable to generate a select signal based on an output signal of the comparator. The multiplexer is operable to select one of the reference voltages from the resistor divider as the selected reference voltage based on the select signal. The programmable gain amplifier is configurable to generate a compensation voltage to compensate for an offset voltage of the comparator. The compensation voltage is provided to an input of the comparator.	08-25-2011

Liping Yu, San Jose, CA US

Patent application number	Description	Published
20090325192	Rapid particle detection assay - The present invention proves instruments and methods for detecting and/or quantitating an analyte in a fluid sample. The fluid sample is placed in a sample chamber having a small, shallow detection region. The analyte is magnetically labeled using magnetic particles coated with a binding reagent, and is detectably labeled using a fluorescent dye or other detection reagent. The magnetically labeled analyte is concentrated into the detection region using a focusing magnet positioned underneath the sample chamber detection region. Concentrated analyte is measured using excitation optics positioned on top of the sample chamber detection region, adapted to illuminate only the detection region, and detection optics positioned on top of the detection region, adapted to detect only light emitted from the detection region. In a preferred embodiment, the invention provides a simple, rapid assay for measuring the concentration of CD4	12-31-2009

Mantle Yu, San Jose, CA US

Patent application number	Description	Published
20080204926	Techniques For Identifying Servo Sectors In Storage Devices - Techniques are provided for identifying the servo sectors in a track on a data storage device. A data storage device identifies the servo sectors in a track by reading distributed index bits from multiple servo sectors in a track. The data storage device analyzes only one index bit from each servo sector to identify the index of a track. In some embodiments, the index of a track can be identified after examining the index bits stored in a particular number of consecutive servo sectors, even in the presence of errors. The index bits in each track can have an error tolerance with a minimum Hamming distance greater than one. In other embodiments, a data storage device compares a sliding window of the index bits read from the servo sectors to all possible N-bit vectors that exist within a pattern of the index bits stored on a track.	08-28-2008

Mantle M. Yu, San Jose, CA US

Patent application number	Description	Published
20090086365	Read write offset error correction using geometric reference in self servo write process - A hard disk drive having a self servo write offset error correction mechanism to improve self servo write process is disclosed. In accordance with certain aspects of the present invention, there is provided a self servo write method that can measure an accurate position offset between the read-head element and write-head element incorporated in a disk drive before servo data is recorded on the disk provided in the disk drive.	04-02-2009
20090168227	Distributed track identifier on a hard disk drive - A magnetic disk for a hard disk drive comprising a distributed track identifier is described. The disk includes a first portion of a track identifier physically located at a first location on a disk sector and a second portion of the track identifier physically located at a second location on the disk sector wherein the first portion and the second portion of the track identifier are discontinuous on the sector.	07-02-2009

Mao Yu, San Jose, CA US

Patent application number	Description	Published
20100260159	PHYSICAL LAYER FRAME FORMAT FOR WLAN - In a method for generating a data unit for transmission via a communication channel, wherein the data unit conforms to a first communication protocol, a preamble of the data unit is generated. The preamble includes a first field having information that indicates a duration of the data unit, the first field being formatted such that the first field is decodable by a receiver device that conforms to a second communication protocol but does not conform to the first communication protocol to determine the duration of the data unit based on the first field. Additionally, the preamble is formatted such that a portion of the preamble is decodable by a receiver device that conforms to a third communication protocol but does not conform to the first communication protocol. Also, the preamble is formatted such that a receiver device that conforms to the first communication protocol can determine that the data unit conforms to the first communication protocol. A data portion of the data unit that conforms to the first communication protocol and does not conform to either (i) the second communication protocol or (ii) the third communication protocol is generated.	10-14-2010
20110096796	NUMBER OF STREAMS INDICATION FOR WLAN - In a method for generating a preamble of a data unit for transmission via a communication channel, an indication of a first number of spatial or space-time streams is included in a first field of the preamble. The first number of spatial or space-time streams corresponds to transmission of the data unit to a first receiver. One or more training sequences are included in a second field of the preamble. The preamble is formatted such that the first field of the preamble will be transmitted prior to the second field of the preamble being transmitted.	04-28-2011
20110096797	TRAINING SEQUENCE INDICATION FOR WLAN - In a method for generating a preamble of a data unit for transmission via a multiple input, multiple output (MIMO) communication channel, a first field of the preamble is generated. The first field provides a plurality of indicators to a plurality of receivers. Each one of the plurality of indicators indicates a set of a plurality of training sequences that corresponds to transmission of the data unit to a corresponding one of the plurality of receivers. The plurality of training sequences is included in a second field of the preamble. The preamble is formatted such that the first field of the preamble will be transmitted prior to the second field of the preamble being transmitted.	04-28-2011
20110116399	ANALOG BIAS CONTROL FOR PACKET COMMUNICATION SYSTEMS - Apparatus having corresponding methods and non-transitory computer-readable media comprise an amplifier configured to amplify signals according to a bias current, wherein the signals represent packets of data; a packet module configured to recover the packets of data from the signals amplified by the amplifier; and a control module configured to control the bias current according to one or more characteristics of the packets of data.	05-19-2011

Meng-Bing Yu, San Jose, CA US

Patent application number	Description	Published
20100011166	Data Cache Virtual Hint Way Prediction, and Applications Thereof - A virtual hint based data cache way prediction scheme, and applications thereof. In an embodiment, a processor retrieves data from a data cache based on a virtual hint value or an alias way prediction value and forwards the data to dependent instructions before a physical address for the data is available. After the physical address is available, the physical address is compared to a physical address tag value for the forwarded data to verify that the forwarded data is the correct data. If the forwarded data is the correct data, a hit signal is generated. If the forwarded data is not the correct data, a miss signal is generated. Any instructions that operate on incorrect data are invalidated and/or replayed.	01-14-2010

Miaoer Yu, San Jose, CA US

Patent application number	Description	Published
20120088848	METHODS AND COMPOSITIONS FOR CONTROLLED POLYPEPTIDE SYNTHESIS - Methods and compositions for the generation of polypeptides having varied material properties are disclosed herein. Methods include means for initiating the polymerization of aminoacid-N-carboxyanhydride (NCA) monomer by combining the monomer with an amido-containing metallacycle, for making self assembling amphiphilic block copolypeptides and related protocols for adding oligo(ethyleneglycol) functionalized aminoacid-N-carboxyanhydrides (NCAs) to polyaminoacid chains. Additional methods include means of adding an end group to the carboxy terminus of a polyaminoacid chain by reacting an alloc-protected amino acid amide with a transition metal-donor ligand complex to forming an amido-amidate metallacycle for use in further polymerization reactions. Novel compositions for use in peptide synthesis and design including five and six membered amido-containing metallacycles and block copolypeptides are also disclosed.	04-12-2012

Michael Xingyi Yu, San Jose, CA US

Patent application number	Description	Published
20120255977	HOLDER FOR A HANDHELD ELECTRONIC DEVICE - A holder for a handheld electronic device, the holder including a container defining a space for receiving the handheld electronic device and an inner surface facing inwardly towards the space. At least a portion of the inner surface includes an infrared-neutral material or coating operative for interacting with infrared light emitted from the handheld electronic device and received by the infrared-neutral material. The interaction is such that, while the handheld electronic device is being received by the container, any reflected infrared signal effected by the interaction is inoperative for effecting activation of a functionality of the handheld electronic device when the reflected infrared signal is sensed by the handheld electronic device.	10-11-2012

Rang-Chen Yu, San Jose, CA US

Patent application number	Description	Published
20090188106	Delatching of Transceiver Module from Transceiver Module Cage - Designs of a delatching tool for removing pluggable transceiver modules from transceiver module cages and pluggable transceiver module designs having latching mechanisms associated with the delatching tool.	07-30-2009

Raymond Yu, San Jose, CA US

Patent application number	Description	Published
20090073120	User Interface Device - A device comprises a manipulandum moveable in at least two degrees of freedom including a first link rotatably moveable about a pivot axis and a second link rotatably moveable about a pivot axis. The first link and the second link are coupled to a ground member. A first actuator is configured to engage the first link and provide an output about a drive axis of the first actuator. A second actuator is configured to engage the second link and provide an output about a drive axis of the second actuator. The drive axis of the first actuator is substantially parallel to the drive axis of the second actuator. The first actuator and the second actuator are each configured to receive a signal associated with a force feedback. The force feedback being associated with the manipulandum.	03-19-2009
20090073124	Systems and Methods For Providing A Haptic Manipulandum - Systems and methods for providing a haptic manipulandum are described. In one described system, a lever arm is pivotably coupled to a housing, and configured to apply a processor-controlled force to a substantially-spherical manipulandum to provide a haptic effect. The described system may include a processor in communication with an actuator for providing the haptic effect.	03-19-2009
20090073125	Systems and Methods For Providing A Haptic Manipulandum - Systems and methods for providing a haptic manipulandum are described. In one described system, a lever arm is pivotably coupled to a housing, and configured to apply a processor-controlled force to a substantially-spherical manipulandum to provide a haptic effect. The described system may include a processor in communication with an actuator for providing the haptic effect.	03-19-2009

Patent applications by Raymond Yu, San Jose, CA US

Sen Yu, San Jose, CA US

Patent application number	Description	Published
20130020466	Conversion Gain Modulation Using Charge Sharing Pixel - An image sensor including an array of pixel elements is operated according to two operation modes to modulate the conversion gain of the pixel to operate the image sensor based on the impinging light conditions. More specifically, an image sensor pixel element is operated in a high conversion gain mode for low light conditions and in a low conversion gain mode for bright light conditions. The low conversion gain mode implements charge sharing between the floating diffusion and the photodiode. The low conversion gain mode further implements partial reset where the photodiode and the floating diffusion are reset to the same potential and to a potential slightly less than the pinning voltage of the photodiode.	01-24-2013

Shuhua Yu, San Jose, CA US

Patent application number	Description	Published
20120098127	POWER/GROUND LAYOUT FOR CHIPS - Embodiments of the present disclosure provide a chip that comprises a base metal layer formed over a first semiconductor die and a first metal layer formed over the base metal layer. The first metal layer includes a plurality of islands configured to route at least one of (i) a ground signal or (ii) a power signal in the chip. The chip further comprises a second metal layer formed over the first metal layer. The second metal layer includes a plurality of islands configured to route at least one of (i) the ground signal or (ii) the power signal in the chip.	04-26-2012

Shunjia Yu, San Jose, CA US

Patent application number	Description	Published
20100246388	REDUNDANT HOST CONNECTION IN A ROUTED NETWORK - One embodiment of the present invention provides a switch. The switch includes a management mechanism and a configuration mechanism. During operation, the management mechanism is configured to operate the switch in conjunction with the partner switch as a single logical switch. The configuration mechanism is configured to assign a virtual switch identifier to the logical switch.	09-30-2010
20110299414	PRESERVING QUALITY OF SERVICE ACROSS TRILL NETWORKS - Systems and techniques for processing and/or forwarding packets are described. An ingress switch can use a QoS mapping mechanism to map a first set of Quality of Service (QoS) bits in a packet received from a customer to a second set of QoS bits for use in a Transparent Interconnection of Lots of Links (TRILL) packet which encapsulates the packet. The first set of QoS bits can be different from the second set of QoS bits. The TRILL packet can be processed and/or forwarded in the network based on the second set of QoS bits. At the egress switch, the TRILL packet can be decapsulated and the original packet with the original QoS bits (or QoS bits that are different from the original QoS bits) can be forwarded to the customer's network. In this manner, some embodiments of the present invention can preserve the QoS bits across a TRILL network.	12-08-2011
20110299527	SUPPORTING MULTIPLE MULTICAST TREES IN TRILL NETWORKS - Systems and techniques for supporting multiple multicast trees are described. Some embodiments provide a system that determines an internal multicast group identifier based on a source address, a multicast address, and a multicast tree identifier field associated with a multicast packet. The system can then forward the multicast packet based on the internal multicast group identifier. Specifically, the system can determine a first set of bits based on the source address and the multicast address of the multicast packet. The system can determine a second set of bits based on the multicast tree identifier field of the multicast packet. Next, the system can combine the first set of bits and the second set of bits to obtain the internal multicast group identifier. In some embodiments, the scope of an internal virtual network identifier does not extend beyond a switch or a forwarding module within a switch.	12-08-2011
20110299528	NETWORK LAYER MULTICASTING IN TRILL NETWORKS - Systems and techniques for performing network layer multicasting in a TRILL network are described. Some embodiments provide a system that receives multicast packet that includes a network-layer multicast-address. The multicast packet can be received on a first multicast tree associated with a first virtual network. Next, the system can determine, based on the network-layer multicast-address, a second multicast tree associated with a second virtual network over which the multicast packet is to be forwarded. The system can then forward the multicast packet on the first multicast tree associated with the first virtual network, and forward a copy of the multicast packet on the second multicast tree associated with the second virtual network.	12-08-2011
20110299531	FLOODING PACKETS ON A PER-VIRTUAL-NETWORK BASIS - Methods and techniques for flooding packets on a per-virtual-network basis are described. Some embodiments provide a method (e.g., a switch) which determines an internal virtual network identifier based on one or more fields in a packet's header. Next, the method performs a forwarding lookup operation based on the internal virtual network identifier. If the forwarding lookup operation succeeds, the method can process and forward the packet accordingly. However, if the forwarding lookup operation fails, the method can determine a set of egress ports based on the internal virtual network identifier. Next, for each egress port in the set of egress ports, the method can flood the packet if a virtual network identifier in the packet's header is associated with the egress port. Flooding packets on a per-virtual-network basis can substantially reduce the amount of resources required to flood the packet when a forwarding lookup operation fails.	12-08-2011
20110299532	REMOTE PORT MIRRORING - A switch that facilitates remote port mirroring is described. The switch can include an encapsulation mechanism and a forwarding mechanism. The encapsulation mechanism can be configured to encapsulate a copy of a first packet in a second packet, thereby preserving header information (e.g., a VLAN identifier and/or a TRILL header) of the first packet. The forwarding mechanism can be configured to forward the first packet using header information of the first packet, and forward the second packet using header information of the second packet. The second packet can be received at a destination switch which extracts the first packet from the second packet, and sends the first packet on a port which is coupled to a network analyzer.	12-08-2011
20110299533	INTERNAL VIRTUAL NETWORK IDENTIFIER AND INTERNAL POLICY IDENTIFIER - Systems and techniques for processing and forwarding packets are described. Some embodiments provide a system (e.g., a switch) which determines an internal virtual network identifier and/or an internal policy identifier for a packet based on a port on which the packet was received and/or one or more fields in the packet. The system can then process and forward the packet based on the internal virtual network identifier and/or internal policy identifier. In some embodiments, the system encapsulates the packet in a TRILL (Transparent Interconnection of Lots of Links) packet by adding a TRILL header to the packet. In some embodiments, the scope of an internal virtual network identifier and/or an internal policy identifier may not extend beyond a switch or a module within a switch.	12-08-2011
20120063316	CONGESTION NOTIFICATION ACROSS MULTIPLE LAYER-2 DOMAINS - One embodiment of the present invention provides a congestion notification. During operation, the system receives a congestion notification message with a destination layer-2 address set as the receiving mechanism's layer-2 address. The system modifies a destination layer-2 address, a source layer-2 address, and optionally a VLAN identifier of the congestion notification message, and forwards the modified congestion notification message.	03-15-2012
20120163164	METHOD AND SYSTEM FOR REMOTE LOAD BALANCING IN HIGH-AVAILABILITY NETWORKS - A system is provided for facilitating remote load balancing in a high-availability network. During operation, the system receives a plurality of data frames destined for a destination device, wherein the destination device is coupled to a network via a trunk link, the trunk link coupling the destination device to at least two separate egress switching devices. The system then forwards the data frames via at least two data paths, each of which leads to a respective egress switching device.	06-28-2012
20120176893	CONGESTION NOTIFICATION IN PRIVATE VLANS - One embodiment of the present invention provides a switch. During operation, in a network with a private VLAN configuration, the switch allows a congestion notification message with an isolated virtual local area network identifier (VLAN ID) to be forwarded via an isolated VLAN port.	07-12-2012
20120201138	QUALITY OF SERVICE IN A HETEROGENEOUS NETWORK - A network device provides priority map storage configured to store one or more mapping data structures for mapping multiple priorities of a first priority scheme to multiple priorities of a second priority scheme. In addition, mapping logic of the network devices is coupled to the priority map storage and configured to translate a first priority of a first frame of the first priority scheme to a second priority of the second priority scheme and to assign the second priority to a second frame carrying payload of the first frame in preparation of transmission of the second frame in accordance with the second priority scheme.	08-09-2012
20120281700	LAYER-3 SUPPORT IN TRILL NETWORKS - One embodiment of the present invention provides a switch. The switch includes an IP header processor and a forwarding mechanism. The IP header processor identifies a destination IP address in a packet encapsulated with an inner Ethernet header, a TRILL header, and an outer Ethernet header. The forwarding mechanism determines an output port and constructs a new header for the packet based on the destination IP address. The switch also includes a packet processor which determines whether (1) an inner destination media access control (MAC) address corresponds to a local MAC address assigned to the switch; (2) a destination RBridge identifier corresponds to a local RBridge identifier assigned to the switch; and (3) an outer destination MAC address corresponds to the local MAC address.	11-08-2012

Patent applications by Shunjia Yu, San Jose, CA US

Siu-Man Yu, San Jose, CA US

Patent application number	Description	Published
20090305778	INSTALLED GAME SOFTWARE SHARING VIA PEER-TO-PEER NETWORK - Updating a run-time version of a game stored on a first location includes causing a first swarm member to store an first version, with first game pieces, on the first location; maintaining a second game version with second pieces, some of which are missing from the first pieces; receiving, from the first swarm member, an upgrade request for the second version; identifying missing pieces; and providing, to the first swarm member, information leading to other swarm members, each of which hosts a missing piece at a second location used for storing a run-time version of the game; causing the first swarm member to retrieve the missing pieces from the second location and store them in at least a portion of the first location, thereby avoiding consumption of additional storage during the update.	12-10-2009

Steve Jia Chang Yu, San Jose, CA US

Patent application number	Description	Published
20100239471	CASSETTE FOR SAMPLE PREPARATION - A cassette for preparing a sample is disclosed herein. The cassette includes a housing, which encloses the structures and the processes used to prepare the sample.	09-23-2010
20100262303	INSTRUMENT FOR CASSETTE FOR SAMPLE PREPARATION - A parallel processing system for processing samples is described. In one embodiment, the parallel processing system includes an instrument interface parallel controller to control a tray motor driving system, a close-loop heater control and detection system, a magnetic particle transfer system, a reagent release system, a reagent pre-mix pumping system and a wash buffer pumping system.	10-14-2010
20110158849	INSTRUMENT FOR CASSETTE FOR SAMPLE PREPARATION - A parallel processing system for processing samples is described. In one embodiment, the parallel processing system includes an instrument interface parallel controller to control a tray motor driving system, a close-loop heater control and detection system, a magnetic particle transfer system, a reagent release system, a reagent pre-mix pumping system and a wash buffer pumping system.	06-30-2011
20120003631	INSTRUMENT FOR CASSETTE FOR SAMPLE PREPARATION - A parallel processing system for processing samples is described. In one embodiment, the parallel processing system includes an instrument interface parallel controller to control a tray motor driving system, a close-loop heater control and detection system, a magnetic particle transfer system, a reagent release system, a reagent pre-mix pumping system and a wash buffer pumping system.	01-05-2012
20120122232	CASSETTE FOR SAMPLE PREPARATION - A cassette for preparing a sample is disclosed herein. The cassette includes a housing, which encloses the structures and the processes used to prepare the sample.	05-17-2012

Patent applications by Steve Jia Chang Yu, San Jose, CA US

Tianyue Yu, San Jose, CA US

Patent application number	Description	Published
20120055338	System and Method for Bubble Removal - In one aspect of the invention, systems, methods, and devices are provided for handling liquid. In some embodiments, such systems, methods, and devices are used to combine fluids while removing gaseous bubbles.	03-08-2012
20130029273	Fabrication Of Fluidic Features Within A Plastic Substrate - In one aspect of the invention, methods, and devices are provided for creating microfluidic and nanofluidic features. In some embodiments, such methods and devices are used to create at least one channel of a desired volume within a channel in a plastic substrate.	01-31-2013

Tyrone C. Yu, San Jose, CA US

Patent application number	Description	Published
20090300073	SYSTEM AND APPARATUS TO ENSURE A LOW-LATENCY READ OF LOG RECORDS FROM A DATABASE MANAGEMENT SYSTEM ("DBMS") - A system and method to ensure a low-latency read of log records from a Database Management System (“DBMS”) in asynchronous log-based database replication capture from a blocking log read Application Programming Interface (“API”). The system may include a replication server with a log read module to initialize a log read thread. The reading module of the log read thread may read a predefined number of DBMS log records. A log flush module of the log flush thread may be executed by the log read thread and waits for a read complete notification. The update module, in response to a log flush thread time out, may also generate a plurality of loggable transactions such that a number of log records in an internal API log satisfies a DMBS threshold and unblocks the DBMS API. Therefore, the latency time may be constant, low, and predictable ensuring an accurate replication capture.	12-03-2009

Weijie Yu, San Jose, CA US

Patent application number	Description	Published
20100117878	PILOT-TONE CALIBRATION FOR TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS - A self-calibrating analog-to-digital converter (ADC). The ADC includes multiple component ADCs to generate respective digital representations of an input signal in response to respective timing signals that are offset in phase from one another, each component ADC having a gain setting that controls a magnitude of the digital representations. The ADC further includes correction circuitry to generate a plurality of fast-Fourier transforms (FFTs) that correspond to the digital representations of the input signal and to adjust the gain settings of the component ADCs and/or phase angles of the timing signals based on gain and phase errors indicated by the FFTs.	05-13-2010

Xianghai Yu, San Jose, CA US

Patent application number	Description	Published
20120224477	PRUNED FORWARDING SET FOR SCALABLE TUNNELING APPLICATIONS IN DISTRIBUTED USER PLANE - A method and system for reducing congestion and latency in a communication system by creating a pruned forwarding set for scalable tunneling applications. The communication system provides a communication link between a mobile communication device and a network, such as the Internet. The method entails using information included within a data packet to determine a corresponding tunnel peer address, which is then resolved onto a set of paths. Each path includes respective adjacency information. A determination of whether to prune each respective path is made by using the respective adjacency information. The pruned set of paths is used to identify available paths for the communication link. By pruning in this manner, the line card being used as the home slot for a given session may also be used as the egress slot, thereby reducing congestion and latency in the communication system.	09-06-2012

Xinhua Yu, San Jose, CA US

Patent application number	Description	Published
20100260201	METHOD AND SYSTEM FOR AN EXTENDED RANGE ETHERNET LINE CODE - Aspects of a method and system for an extended range Ethernet line code are provided. One or more ternary encoded bitstreams may be generated and transmitted. The generating may comprise mapping 3-bit binary IDLE patterns having a least significant bit of zero to a non-zero ternary value, and mapping 3-bit binary IDLE patterns having a non-zero least significant bit to a ternary zero. The generating may comprise receiving binary data via a media independent interface, mapping each 4-bit portion of said received binary data to a ternary symbol comprising two ternary bits, and transmitting said ternary symbol over said one or more physical channels. Data portions of the one or more ternary encoded bitstreams may be generated by mapping 3-bit binary patterns to 2-bit ternary symbols. One of the nine possible 2-bit ternary symbols may be reserved for control portions of said one or more ternary encoded bitstreams.	10-14-2010

Xinyu Yu, San Jose, CA US

Patent application number	Description	Published
20090205436	WIRELESS SENSOR PLATFORM FOR HARSH ENVIRONMENTS - An amplifier system can include an input amplifier configured to receive an analog input signal and provide an amplified signal corresponding to the analog input signal. A tracking loop is configured to employ delta modulation for tracking the amplified signal, the tracking loop providing a corresponding output signal. A biasing circuit is configured to adjust a bias current to maintain stable transconductance over temperature variations, the biasing circuit providing at least one bias signal for biasing at least one of the input amplifier and the tracking loop, whereby the circuitry receiving the at least one bias signal exhibits stable performance over the temperature variations. In another embodiment the biasing circuit can be utilized in other applications.	08-20-2009
20110118025	GAME CONTROLLER WITH TOUCH PAD USER INTERFACE - A game controller with a communications interface, at least one touch sensitive pad having a plurality of touch sensitive elements, and processing circuitry coupled to the communications interface and the at least one touch sensitive pad. The processing circuitry receives touch pad input via the plurality of touch sensitive elements of the at least one touch sensitive pad. The processing circuitry then transmits the touch pad input to a game console via the communications interface. The touch sensitive pad can have a plurality of separate and distinct touch sensitive pads, allowing the processing circuitry to receive touch pad input via each of the plurality of separate and distinct touch sensitive pads. Touch pad input could include user finger and/or user thumb touch pad input.	05-19-2011
20110118026	HAND-HELD GAMING DEVICE THAT IDENTIFIES USER BASED UPON INPUT FROM TOUCH SENSITIVE PANEL - Operating a game controller to identify a user by receiving touch pad input from at least one touch sensitive pad of the game controller that has a plurality of touch sensitive elements. The touch pad input corresponds to the user's touch of at least some of the plurality of touch sensitive elements. The touch pad input is at least partially processed by processing circuitry of the game controller and transmitted to a game console via a communications interface of the game controller for processing of the at least partially processed touch pad input to identify the user via pattern recognition. At least partially processing the touch pad input can be by identifying at least one finger orientation, at least one finger spacing, at least one finger width, a plurality of finger knuckle/joint locations, and/or a plurality of finger lengths based upon the touch pad input.	05-19-2011

Yongshin Yu, San Jose, CA US

Patent application number	Description	Published
20100250605	Method and Apparatus for Social Trust Networks on Messaging Platforms - A social trust network is implemented in combination with a communication network capable of monitoring one or more parameters of communications. The social trust network includes a database containing trust data and possibly profiles of respective entities can be searched to return identities of entities such as subject matter experts with whom a user such as a decision-maker may wish to communicate; which communication may be facilitated by communication contact information corresponding to entities returned by the search. A plurality of trust metrics are computed from the trust data and search results are ordered based on a weighted sum of trust metrics, possibly including ratings of entities, where the relative weights may be manipulated at the will of the user. The monitored parameters of such communications are represented in data stored as trust data in a database which is thus adaptively developed through use of the social trust network.	09-30-2010
20110211687	System and Method for Call Flow Generation Via Real-Time Tracking of Guided Problem Resolution - Systems and methods for adapting an existing call flow wherein the call flow further comprises an associated data set, comprising: activating the existing call flow, the existing call flow generating a series of questions designed to obtain information from a caller; determining if an exception condition has occurred; allowing a user to activate an exception call flow in response to the exception condition; retaining the data set associated with the call flow when the exception condition occurred; adapting the data set such that the call flow addresses the exception condition; analyzing the adapted data set to determine if it is unique; and, modifying the existing call flow to incorporate the adapted data set if the adapted data set is unique.	09-01-2011
20110251971	SYSTEM AND METHOD FOR FACILITATING REAL-TIME COLLABORATION IN A CUSTOMER SUPPORT ENVIRONMENT - An embodiment of the invention comprises a real-time collaborative technical support (RTCTS) system that may automatically generate and/or maintain social networks that may be dynamically evolving. The social networks may be based on the output of at least one multi-modal classification algorithm. These outputs may be occurring in real-time.	10-13-2011

Zhi-Gang Yu, San Jose, CA US

Patent application number	Description	Published
20090015376	RFID TAGS HAVING FERROMAGNETIC PATCHES - RFID tags and devices disclosed herein make use ferromagnetic films to store information. The tags include patches of ferromagnetic materials, each patch having a particular ferromagnetic resonance frequency determined by the composition of the ferromagnetic film. When stimulated, the patches emit microwave or RF signals at their resonance frequencies and at intensities proportional to the patch sizes. The signals are read and the frequency spectrum of the tag may be determined by using a FFT. Identity and other information may be provided by the spectrum.	01-15-2009

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