Patent application number | Description | Published |
20120223433 | SEMICONDUCTOR PACKAGE INCLUDING CONNECTING MEMBER HAVING CONTROLLED CONTENT RATIO OF GOLD - A semiconductor package including connecting members having a controlled content ratio of gold capable of increasing durability and reliability by preventing an intermetallic compound having high brittleness from being formed. The semiconductor package includes a base substrate; a first semiconductor chip disposed on the base substrate; and a first connecting member for electrically connecting the base substrate and the first semiconductor chip, and comprising a first bonding portion that includes gold and has a first content ratio of gold that is controlled to prevent an intermetallic compound of AuSn | 09-06-2012 |
20120280405 | SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACURING THE SAME - Provided are semiconductor devices and methods of manufacturing the same. The semiconductor package includes a substrate, a first semiconductor chip mounted on the circuit substrate and having a first width, a second semiconductor chip overlying the first semiconductor chip and having a second width greater than the first width, and a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip and having an inclined side surface. | 11-08-2012 |
20130087917 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a connection member to electrically connect the first semiconductor chip and the second semiconductor chip. The connection member may include a connection pad disposed on the first semiconductor chip, a connection pillar disposed on the second semiconductor chip, and a bonding member to connect the connection pad and the connection pillar. An anti-contact layer may be formed on at least one surface of the connection pad. | 04-11-2013 |
20130330925 | METHODS OF TREATING A DEVICE-SUBSTRATE AND SUPPORT-SUBSTRATES USED THEREIN - Disclosed are methods of treating a device-substrate, and support-substrates used therein. The methods may include providing the device-substrate having an integrated circuit, bonding a first top surface of the device-substrate to a support-substrate, and polishing a first bottom surface of the device-substrate. The support-substrates include a second top surface, a second bottom surface opposite to the second top surface, and a sidewall connecting the second top and bottom surfaces. Additionally, the support-substrates further include a grooved portion spaced apart from the sidewall and blocking a crack in the support-substrates occurring from the sidewall. | 12-12-2013 |
20140038353 | SEMICONDUCTOR PACKAGES, METHODS OF MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE STRUCTURES INCLUDING THE SAME - A method of manufacturing a semiconductor package includes preparing a parent substrate including package board parts laterally spaced apart from each other, mounting a first chip including a through-via electrode on each of the package board parts, forming a first mold layer on the parent substrate having the first chips, planarizing the first mold layer to expose back sides of the first chips, etching the exposed back sides of the first chips to expose back sides of the through-via electrodes, forming a passivation layer on the planarized first mold layer, the etched back sides of the first chips, and the back sides of the through-via electrodes, and selectively removing the passivation layer to expose the back sides of the through-via electrodes. | 02-06-2014 |
20140291854 | SEMICONDUCTOR PACKAGES HAVING TSV AND ADHESIVE LAYER - A semiconductor package includes a first semiconductor chip on a substrate and having a plurality of through-silicon vias (TSVs). A second semiconductor chip having an active layer is on the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the active layer. Connection terminals extend through the adhesive layer and are connected to the TSVs and the active layer. Side surfaces of the adhesive layer are aligned with side surfaces of the second semiconductor chip. | 10-02-2014 |
20150048493 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - In one embodiment, a semiconductor package includes a circuit substrate, a plurality of semiconductor chips stacked on the circuit substrate, insulating adhesive patterns interposed between the semiconductor chips, a heat slug provided on an uppermost semiconductor chip and adhered to the uppermost semiconductor chip by a heat dissipative adhesive pattern, and a mold structure provided on the circuit substrate to cover sidewalls of the semiconductor chips, the insulating adhesive patterns, the heat dissipative adhesive pattern and the heat slug. A failure of the semiconductor package during a manufacturing process of the mold structure may be reduced. The semiconductor package may therefore have good operating characteristics and reliability. | 02-19-2015 |