| Patent application number | Description | Published |
| 20080251816 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor memory device is composed of a field effect transistor using the interface between a ferroelectric film and a semiconductor film as the channel and including a gate electrode to which a voltage for controlling the polarization state of the ferroelectric film is applied and source/drain electrodes provided on both ends of the channel to detect a current flowing in the channel in accordance with the polarization state. The semiconductor film is made of a material having a spontaneous polarization and the direction of the spontaneous polarization is parallel with the interface between the ferroelectric film and the semiconductor film. | 10-16-2008 |
| 20090055576 | MEMORY CONTROLLER, NONVOLATILE STORAGE DEVICE, NONVOLATILE STORAGE SYSTEM, AND DATA WRITING METHOD - A nonvolatile storage device is provided with a nonvolatile main storage memory ( | 02-26-2009 |
| 20090059047 | SOLID-STATE IMAGING DEVICE - Provided is a solid-state imaging device having pixel units that are two-dimensionally arranged, and including: a photodiode that generates an optical signal charge corresponding to an intensity and an exposure time of light; a MOS transistor that transfers the optical signal charge; an accumulating unit that generates a voltage corresponding to the signal charge through the MOS transistor; a storing unit that stores a voltage corresponding to an optical signal charge in the accumulating unit; and a voltage setting unit that sets a value of a voltage in the accumulating unit to a value corresponding to the voltage in the storing unit. | 03-05-2009 |
| 20090079857 | SOLID-STATE IMAGING DEVICE, RECEIVED-LIGHT INTENSITY MEASURING DEVICE, AND RECEIVED-LIGHT INTENSITY MEASURING METHOD - The received-light intensity measuring device includes: a pixel circuit | 03-26-2009 |
| 20090152607 | FERROELECTRIC STACKED-LAYER STRUCTURE, FIELD EFFECT TRANSISTOR, AND FERROELECTRIC CAPACITOR AND FABRICATION METHODS THEREOF - A ferroelectric stacked-layer structure is fabricated by forming a first polycrystalline ferroelectric film on a polycrystalline or amorphous substrate, and after planarizing a surface of the first ferroelectric film, laminating on the first ferroelectric film a second thin ferroelectric film having the same crystalline structure as the first ferroelectric film. A field effect transistor or a ferroelectric capacitor includes the ferroelectric stacked-layer structure as a gate insulating film or a capacitor film. | 06-18-2009 |
| 20090173978 | SEMICONDUCTOR MEMORY CELL AND SEMICONDUCTOR MEMORY ARRAY USING THE SAME - A memory element including a first FET, and a selection switch including a second FET are connected in series, and a semiconductor film and a dielectric film stacked over a substrate form a common channel and a common gate insulating film in the first and second FETs. A first gate electrode of the first FET and a second gate electrode of the second FET are formed on the dielectric film, and a drain electrode and a source electrode are formed on the semiconductor film. Under the semiconductor film, a back-gate electrode is formed with a ferroelectric film interposed therebetween, and the ends of the semiconductor film that forms the channel are located inwardly of the ends of the back-gate electrode. | 07-09-2009 |
| 20090212985 | SOLID-STATE IMAGING DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT, AND SIGNAL PROCESSING METHOD - A solid-state imaging device includes: pixel circuits arranged in a matrix which perform photoelectric conversion on received light; and an AD conversion unit converting the resultant signal voltage of the photoelectric conversion. The AD conversion unit includes: a reference voltage generation unit generating plural reference voltages which are different from each other within a possible range for a signal voltage; a most significant bit conversion unit that identifies a voltage section including the signal voltage from among the voltage sections each having a corresponding one of the reference voltages as a base point and determines the identified result as the value of the most significant bit of the digital signal; and a least significant bit conversion unit that converts, into the least significant bit of the digital signal, the difference voltage between the signal voltage and the reference voltage as the base point of the identified voltage section. | 08-27-2009 |
| 20090290404 | SEMICONDUCTOR MEMORY DEVICE - A memory cell includes a memory element including a MFSFET having a gate insulating film made of a ferroelectric film, and a selection switching element including a MISFET having a gate insulating film made of a paraelectric film. A load element for a read operation is connected in series to the memory cell. The ferroelectric film and the paraelectric film are stacked with a semiconductor film being interposed therebetween. The semiconductor film forms a common channel shared by the MFSFET and the MISFET. The load element includes a MISFET having a channel made of the semiconductor film or a resistance element having a resistor made of the semiconductor film. | 11-26-2009 |
| 20110121162 | SOLID-STATE IMAGING DEVICE AND DIFFERENTIAL CIRCUIT - A solid-state imaging device that is configurable into a small size appropriate for expanding dynamic range includes: a photodiode which is a photoelectric conversion unit that generates charge by incident light; a MOS transistor which is connected to the photodiode and transfers the charge; a floating diffusion region which is a first accumulation unit which accumulates the charge via the MOS transistor; a MOS transistor which is a second transfer unit connected to the floating diffusion region and connected in series to the MOS transistor; and a MOS transistor which is an output unit which outputs, via the MOS transistor, a signal voltage in accordance with an amount of the charge. | 05-26-2011 |