Patent application number | Description | Published |
20080212376 | METHODS OF OPERATING AND MANUFACTURING LOGIC DEVICE AND SEMICONDUCTOR DEVICE INCLUDING COMPLEMENTARY NONVOLATILE MEMORY DEVICE, AND READING CIRCUIT FOR THE SAME - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 09-04-2008 |
20080242011 | Method of fabricating non-volatile memory device - A method of fabricating a non-volatile memory device according to example embodiments may include forming a semiconductor layer on a substrate. A plurality of lower charge storing layers may be formed on a bottom surface of the semiconductor layer. A plurality of lower control gate electrodes may be formed on the plurality of lower charge storing layers. A plurality of upper charge storing layers may be formed on a top surface of the semiconductor layer. A plurality of upper control gate electrodes may be formed on the plurality of upper charge storing layers, wherein the plurality of lower and upper control gate electrodes may be arranged alternately. | 10-02-2008 |
20080259688 | Non-volatile memory devices and methods of operating the same - A non-volatile memory device includes memory transistors disposed on a semiconductor substrate in a NAND string. A string select transistor is disposed at a first end of the NAND string, and a ground select transistor is disposed at a second end of the NAN string. Bit lines are electrically connected to the semiconductor substrate outside of the string select transistor and a gate electrode of the ground select transistor. | 10-23-2008 |
20080285343 | Memory cell programming method and semiconductor device for simultaneously programming a plurality of memory block groups - Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an i | 11-20-2008 |
20080285352 | Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations - Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes. | 11-20-2008 |
20080293215 | Method of fabricating a semiconductor device having a single gate electrode corresponding to a pair of fin-type channel regions - Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed. | 11-27-2008 |
20080304328 | Nonvolatile memory devices and methods of operating the same - Example embodiments include nonvolatile memory devices that have good operation performance and may be made in a highly integrated structure, and methods of operating the same. Example embodiments of the nonvolatile memory devices include a substrate electrode, and a semiconductor channel layer on the substrate electrode, a floating gate electrode on the substrate electrode, wherein a portion of the floating gate electrode faces the semiconductor channel layer, a control gate electrode on the floating gate electrode, and wherein a distance between a portion of the floating gate electrode and the substrate electrode is smaller than a distance between the semiconductor channel layer and the substrate electrode wherein charge tunneling occurs. | 12-11-2008 |
20080315285 | Non-volatile memory devices and methods of fabricating the same - Non-volatile memory devices and methods of fabricating the same are provided. The non-volatile memory devices may include a semiconductor substrate having a pair of sidewall channel regions extending from the semiconductor substrate and opposite to each other, and a floating gate electrode between the pair of sidewall channel regions and protruding from the semiconductor substrate. A control gate electrode may be formed on the semiconductor substrate and a portion of the floating gate electrode. | 12-25-2008 |
20080316807 | Semiconductor memory device having metal-insulator transition film resistor - A semiconductor memory device may have a lower leakage current and/or higher reliability, e.g., a longer retention time and/or a shorter refresh time. The device may include a switching device and a capacitor. A source of the switching device may be connected to a first end of a metal-insulator transition film resistor, and at least one electrode of the capacitor may be connected to a second end of the metal-insulator transition film resistor. The metal-insulator transition film resistor may transition between an insulator and a conductor according to a voltage supplied to the first and second ends thereof. | 12-25-2008 |
20080316824 | Non-volatile memory device and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 12-25-2008 |
20090016107 | Methods of operating nonvolatile memory devices - Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell. | 01-15-2009 |
20090026519 | Capacitorless dram and methods of manufacturing and operating the same - A capacitorless DRAM and methods of manufacturing and operating the same are provided. The capacitorless DRAM includes a source, a drain and a channel layer, formed on a substrate. A charge reserving layer is formed on the channel layer. The capacitorless DRAM includes a gate that contacts the channel layer and the charge reserving layer. | 01-29-2009 |
20090045450 | Non-volatile memory device and method of fabricating the same - Provided are a non-volatile memory device, which may have higher integration density, improved or optimal structure, and/or reduce or minimize interference between adjacent cells without using an SOI substrate, and a method of fabricating the non-volatile memory device. The non-volatile memory device may include: a semiconductor substrate comprising a body, and a pair of fins protruding from the body; a buried insulating layer filling between the pair of fins; a pair of floating gate electrodes on outer surfaces of the pair of fins to a height greater than that of the pair of fins; and a control gate electrode on the pair of floating gate electrodes. | 02-19-2009 |
20090065835 | Capacitorless DRAM and methods of manufacturing and operating the same - Example embodiments provide a capacitorless dynamic random access memory (DRAM), and methods of manufacturing and operating the same. The capacitorless DRAM according to example embodiments may include a semiconductor layer separated from a top surface of a substrate and that contains a source region, a drain region, and a channel region, a charge reserving layer formed on the channel region, and a gate formed on the substrate to contact the channel region and the charge reserving layer. | 03-12-2009 |
20090091974 | Methods of programming non-volatile memory cells - A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit. | 04-09-2009 |
20090091975 | Non-volatile memory device and operation method of the same - Provided are a non-volatile memory device and an operation method of the same. The non-volatile memory device may include one or more main strings each of which may include first and second substrings which may separately include a plurality of memory cell transistors; and a charge supply line which may be configured to provide charges to or block charges from the first and second substrings of each of the main strings, wherein each of the main strings may include a first ground selection transistor which may be connected to the first substring; a first substring selection transistor which may be connected to the first ground selection transistor; a second ground selection transistor which may be connected to the second substring; and a second substring selection transistor which may be connected to the second ground selection transistor. | 04-09-2009 |
20090096060 | Antifuse structures, antifuse array structures, methods of manufacturing the same - Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array. | 04-16-2009 |
20090097321 | Non-volatile memory device, method of operating the same, and method of fabricating the same - A non-volatile memory device may include at least one semiconductor layer, a plurality of control gate electrodes, a plurality of charge storage layers, at least one first auxiliary electrode, and/or at least one second auxiliary electrode. The plurality of control gate electrodes may be recessed into the semiconductor layer. The plurality of charge storage layers may be between the plurality of control gate electrodes and the semiconductor layer. The first and second auxiliary electrodes may be arranged to face each other. The plurality of control gate electrodes may be between the first and second auxiliary electrodes and capacitively coupled with the semiconductor layer. | 04-16-2009 |
20090109748 | Apparatus and method of multi-bit programming - Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may include: a first control unit that allocates any one of 2 | 04-30-2009 |
20090109761 | Method of operating nonvolatile memory device - Provided is a method of operating a three-dimensional nonvolatile memory device which may increase the reliability and efficiency of the three-dimensional nonvolatile memory device. The method of operating a nonvolatile memory device may include: resetting the nonvolatile memory device by injecting charges into charge storage layers of a plurality of memory cells of a block; and setting the nonvolatile memory device by removing at least some of the charges injected into the charge storage layers of one or more memory cells selected from among the plurality of memory cells. | 04-30-2009 |
20090122613 | Non-volatile memory device and method of operating the same - A non-volatile memory device may include a plurality of stacked semiconductor layers, a plurality of NAND strings, a common bit line, a common source line, and/or a plurality of string selection lines. The plurality of NAND strings may be on the plurality of semiconductor layers. Each of the plurality of NAND strings may include a plurality of memory cells and/or at least one string selection transistor arranged in a NAND-cell array. The common bit line may be commonly connected to each of the NAND strings at a first end of the memory cells. The common source line may be commonly connected to each of the NAND strings at a second end of the memory cells. The plurality of string selection lines may be coupled to the at least one string selection transistor included in each of the NAND strings such that a signal applied to the common bit line is selectively applied to the NAND strings. | 05-14-2009 |
20090141547 | Non-volatile memory devices and methods of fabricating and using the same - Provided are a non-volatile memory device, which may have a stacked structure and may be easily integrated at increased density, and a method of fabricating and using the non-volatile memory device. The non-volatile memory device may include at least one pair of first electrode lines. At least one second electrode line may be between the at least one pair of first electrode lines. At least one data storage layer may be between the at least one pair of first electrode lines and the at least one second electrode line and may locally store a resistance change. | 06-04-2009 |
20090184360 | Non-volatile memory device and method of fabricating the same - Provided are a non-volatile memory device that may expand to a stacked structure and may be more easily highly integrated and an economical method of fabricating the non-volatile memory device. The non-volatile memory device may include at least one semiconductor column. At least one first control gate electrode may be arranged on a first side of the at least one semiconductor column. At least one second control gate electrode may be arranged on a second side of the at least one semiconductor column. A first charge storage layer may be between the at least one first control gate electrode and the at least one semiconductor column. A second charge storage layer may be between the at least one second control gate electrode and the at least one semiconductor column. | 07-23-2009 |
20090190396 | Memory device and method of reading memory data - A memory device and a method of reading multi-bit data stored in a multi-bit cell array may be provided. The memory device may include a multi-bit cell array including a least one memory page with each memory page having a plurality of multi-bit cells, and a determination unit to divide the plurality of multi-bit cells into a first group and second group. The first group may include multi-bit cells with a threshold voltage higher than a reference voltage. The second group may include multi-bit cells with a threshold voltage lower than the reference voltage. The determination unit may sequentially update the first group and second group while changing the reference voltage. | 07-30-2009 |
20090190397 | Memory device and data reading method - A memory device and a memory data reading method are provided. The memory device may include: a multi-bit cell array; a programming unit that stores N data pages in a memory page in the multi-bit cell array; and a control unit that divides the N data pages into a first group and second group, reads data of the first group from the memory page, and determines a scheme of reading data of the second group from the memory page based on the read data of the first group. | 07-30-2009 |
20090207643 | Data storage devices using magnetic domain wall movement and methods of operating the same - Data storage devices using movement of magnetic domain walls and methods of operating the same are provided. A data storage device includes a magnetic track having a verifying region. Within the verifying region, first and second magnetic domains are arranged alternately. The first magnetic domains correspond to first data and the second magnetic domains correspond to second data. A verification sensor is arranged at an end of the verifying region. A current applying element is configured to apply one or more pulse currents to the magnetic track. A first counter is connected to the verification sensor and configured to count the number of magnetic domains passing through the verification sensor. | 08-20-2009 |
20090207718 | Information storage devices using magnetic domain wall motion and methods of operating the same - An information storage device using magnetic domain wall motion and a method of operating the same are provided. The information storage device includes a magnetic track having a plurality of magnetic domains and magnetic domain walls arranged alternately. A current supply unit is configured to apply current to the magnetic track, and a plurality of reading/writing units are arranged on the magnetic track. The information storage device further includes a plurality of storage units. Each of the plurality of storage units is connected to a corresponding one of the plurality of reading/writing units for storing data temporarily. | 08-20-2009 |
20090210776 | Memory device and memory data reading method - Example embodiments may provide a memory device and memory data reading method. The memory device according to example embodiments may include a multi-bit cell array, an error detector which may read a first data page from a memory page in the multi-bit cell array and may detect an error-bit of the first data page, and an estimator which may identify a multi-bit cell where the error-bit is stored and may estimate data stored in the identified multi-bit cell among data of a second data page. Therefore, the memory device and memory data reading method may have an effect of reducing an error when reading data stored in the multi-bit cell and monitoring a state of the multi-bit cell without additional overhead. | 08-20-2009 |
20090212320 | Semiconductor devices and semiconductor apparatuses including the same - Semiconductor devices and semiconductor apparatuses including the same are provided. The semiconductor devices include a body region disposed on a semiconductor substrate, gate patterns disposed on the semiconductor substrate and on opposing sides of the body region, and first and second impurity doped regions disposed on an upper surface of the body region. The gate patterns may be separated from the first and second impurity doped regions by, or greater than, a desired distance, such that the gate patterns do not to overlap the first and second impurity doped regions in a direction perpendicular to the first and second impurity doped regions. | 08-27-2009 |
20090212364 | Semiconductor substrates and manufacturing methods of the same - Semiconductor substrates and methods of manufacturing the same are provided. The semiconductor substrates include a substrate region, an insulation region and a floating body region. The insulation region is disposed on the substrate region. The floating body region is separated from the substrate region by the insulation region and is disposed on the insulation region. The substrate region and the floating body region are formed of materials having identical characteristics. The method of manufacturing the semiconductor substrate including forming at least one floating body pattern by etching a bulk substrate, separating the bulk substrate into a substrate region and a floating body region by etching a lower middle portion of the floating body pattern, and filling an insulating material between the floating body region and the substrate region. | 08-27-2009 |
20090244514 | DISTANCE MEASURING SENSORS INCLUDING VERTICAL PHOTOGATE AND THREE-DIMENSIONAL COLOR IMAGE SENSORS INCLUDING DISTANCE MEASURING SENSORS - A distance measuring sensor may include: a photoelectric conversion region; first and second charge storage regions; first and second trenches; and/or first and second vertical photogates. The photoelectric conversion region may be in a substrate and/or may be doped with a first impurity in order to generate charges in response to received light. The first and second charge storage regions may be in the substrate and/or may be doped with a second impurity in order to collect charges. The first and second trenches may be formed to have depths in the substrate that correspond to the first and second charge storage regions, respectively. The first and second vertical photogates may be respectively in the first and second trenches. A three-dimensional color image sensor may include a plurality of unit pixels. Each unit pixel may include a plurality of color pixels and the distance measuring sensor. | 10-01-2009 |
20090244980 | Method for reducing lateral movement of charges and memory device thereof - Provided is a method and device for reducing lateral movement of charges. The method may include pre-programming at least one memory cell that is in an erased state by applying a pre-programming voltage to the at least one memory cell to have a narrower distribution of threshold voltages than the at least one erased state memory cell and verifying that the pre-programmed memory cell is in the pre-programmed state using a negative effective verifying voltage. | 10-01-2009 |
20090251581 | Sub-pixels, unit pixels, image sensors and methods of operating the same - An image sensor includes a plurality of unit pixels arranged in an array. Each unit pixel includes a plurality of sub-pixels configured to be irradiated by light having the same wavelength. Each sub-pixel includes a plurality of floating body transistors. Each floating body transistor includes a source region, a drain region, a floating body region between the source region and the drain region, and a gate electrode formed on the floating body region. | 10-08-2009 |
20090251963 | Non-volatile memory device and method of manufacturing the same - A multi-layered non-volatile memory device and a method of manufacturing the same. The non-volatile memory device may include a plurality of first semiconductor layers having a stack structure. A plurality of control gate electrodes may extend across the first semiconductor layers. A first body contact layer may extend across the first semiconductor layers. A plurality of charge storage layers may be interposed between the control gate electrodes and the first semiconductor layers. | 10-08-2009 |
20090253255 | Semiconductor device having a pair of fins and method of manufacturing the same - Example embodiments relate to a semiconductor device and a method of manufacturing the same. A semiconductor device according to example embodiments may have reduced disturbances during reading operations and a reduced short channel effect. The semiconductor device may include a semiconductor substrate having a body and a pair of fins protruding from the body. Inner spacer insulating layers may be formed on an upper portion of an inner sidewall of the pair of fins so as to reduce the entrance to the region between the pair of fins. A gate electrode may cover a portion of the external sidewalls of the pair of fins and may extend across the inner spacer insulating layers so as to define a void between the pair of fins. Gate insulating layers may be interposed between the gate electrode and the pair of fins. | 10-08-2009 |
20090261314 | Non-volatile memory device and method of fabricating the same - Provided are a non-volatile memory device that may be configured in a stacked structure and may be more easily highly integrated, and a method of fabricating the non-volatile memory device. At least one first electrode and at least one second electrode are provided. The at least one second electrode may cross the at least one first electrode. At least one data storage layer may be at an intersection between the at least one first electrode and the at least one second electrode. Any one of the at least one first electrode and the at least one second electrode may include at least one junction diode connected to the at least one data storage layer. | 10-22-2009 |
20090284731 | Distance measuring sensor including double transfer gate and three dimensional color image sensor including the distance measuring sensor - Provided are a distance measuring sensor including a double transfer gate, and a three dimensional color image sensor including the distance measuring sensor. The distance measuring sensor may include first and second charge storage regions which are spaced apart from each other on a substrate doped with a first impurity, the first and second charge storage regions being doped with a second impurity; a photoelectric conversion region between the first and second charge storage regions on the substrate, being doped with the second impurity, and generating photo-charges by receiving light; and first and second transfer gates which are formed between the photoelectric conversion region and the first and second charge storage regions above the substrate to selectively transfer the photo-charges in the photoelectric conversion region to the first and second charge storage regions. | 11-19-2009 |
20090284830 | Optical amplifying medium, method of manufacturing the optical amplifying medium, and optical device comprising the optical amplifying medium - An optical amplifying medium, a method of manufacturing the optical amplifying medium are provided, and an optical device comprising the optical amplifying medium. The optical amplifying medium includes a multi-layer structure in which a first material layer doped with an activator and a second material layer that comprises a sensitizer are stacked. | 11-19-2009 |
20090294633 | Image sensor using photo-detecting molecule and method of operating the same - Provided is an image sensor using a photo-detecting molecule and a method of operating the image sensor. The image sensor may include a plurality of first electrodes disposed parallel to each other and a plurality of second electrodes disposed parallel to each other in a direction perpendicular to the first electrodes and above the first electrodes, and a plurality of subpixels formed in regions where the first electrodes cross the second electrodes. Each of the subpixels may comprise a photo-detecting molecule layer that may generate charges by absorbing light having a certain wavelength, a charge generation layer that may form a plurality of secondary electrons by receiving the charges from the photo-detecting molecule layer when a known voltage is applied between the first electrodes and the second electrodes, and a variable resistance layer, an electrical state of which is changed by receiving the secondary electrons generated from the charge generation layer. | 12-03-2009 |
20090304389 | Semiconductor apparatuses having optical connections between memory controller and memory module - Semiconductor apparatuses having optical connections between a memory controller and a memory module are provided. A semiconductor apparatus includes a memory controller, at least one socket configured to receive a memory module, and a first optical-electrical module. A second optical-electrical module is mounted in the socket and optically coupled to the first optical-electrical module via at least one optical channel. | 12-10-2009 |
20090315084 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SUBSTRATE - A semiconductor device includes a semiconductor substrate, a gate pattern disposed on the semiconductor substrate, a body region disposed on the gate pattern and a first impurity doping region and a second impurity doping region. The gate pattern is disposed below the body region and the first impurity doping region and the second impurity doping region. | 12-24-2009 |
20100002506 | Memory device and memory programming method - Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a first data page in the plurality of multi-level cells and programs a second data page in a multi-level cell from among the plurality of multi-level cells in which the first data page is programmed; an error analysis unit that analyzes read error information corresponding to the first data page based on a read voltage level to determine whether to correct a read error based on the analyzed read error information; and a controller that adjusts the read voltage level of the first data page depending on the determination result. Through this, it is possible to reduce an error occurrence when reading and/or programming a data page. | 01-07-2010 |
20100006919 | NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATION - A nonvolatile memory device is provided that includes; a first semiconductor layer extending in a first direction, a second semiconductor layer extending in parallel with and separated from the first semiconductor layer, an isolation layer between the first semiconductor layer and second semiconductor layer, a first control gate electrode between the first semiconductor layer and the isolation layer, a second control gate electrode between the second semiconductor layer and the isolation layer, wherein the second control gate electrode and first control gate electrode are respectively disposed at opposite sides of the isolation layer, a first charge storing layer between the first control gate electrode and the first semiconductor layer, and a second charge storing layer between the second control gate electrode and the second semiconductor layer. | 01-14-2010 |
20100008136 | Methods of operating memory devices - Provided are methods of operating NAND nonvolatile memory devices. The operating methods include applying a read voltage or a verify voltage to a selected memory cell from among a plurality of memory cells of a cell string to verify or read a programmed state of the selected memory cell; applying a first pass voltage to non-selected memory cells closest to the selected memory cell of the cell string; applying a second pass voltage to second closest non-selected memory cells to the selected memory cell; and applying a third pass voltage to other non-selected memory cells, where the first pass voltage is less than each of the second and third pass voltages and the second pass voltage is greater than the third pass voltage. | 01-14-2010 |
20100019296 | IMAGE SENSOR HAVING NANODOT - An image sensor includes a plurality of pixels disposed in an array, each pixel comprising a first region and a second region, the first region and the second region separated from each other in a semiconductor layer, and doped with impurities having different conductivities from each other, a photoelectric conversion region formed between the first and second regions, and at least one metal nanodot that focuses an incident light onto the photoelectric conversion region. | 01-28-2010 |
20100033611 | Pixel array of three-dimensional image sensor - Provided is a pixel array of a three-dimensional image sensor. The pixel array includes unit pixel patterns each including a color pixel and a distance-measuring pixel arranged in an array form. The unit pixel patterns are arranged in such a way that a group of distance-measuring pixels are disposed adjacent to each other. | 02-11-2010 |
20100041224 | Non-volatile memory device and method of manufacturing the same - The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode. | 02-18-2010 |
20100044778 | Non-volatile memory device and method of manufacturing same - A non-volatile memory device and a method of manufacturing the non-volatile memory device are provided. At least one first semiconductor layer and at least one second semiconductor layer are disposed. At least one control gate electrode is disposed between the at least one first semiconductor layer and the at least one second semiconductor layer. At least one first layer selection line is capacitively coupled to the at least one first semiconductor layer. At least one second layer selection line is capacitively coupled to the at least one second semiconductor layer. | 02-25-2010 |
20100073462 | Three dimensional image sensor - A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal. | 03-25-2010 |
20100117054 | NON-VOLATILE MEMORY DEVICE WITH DATA STORAGE LAYER - Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode. | 05-13-2010 |
20100126584 | SOLAR CELLS AND SOLAR CELL MODULES - A solar cell module includes a solar cell provided at a center area of a support to expose an edge area of the support. An optical waveguide layer is provided on the edge area of the support to concentrate light to the solar cell. | 05-27-2010 |
20100133600 | Semiconductor devices having increased sensing margin - One transistor (1-T) dynamic random access memories (DRAM) having improved sensing margins that are relatively independent of the amount of carriers stored in a body region thereof. | 06-03-2010 |
20100133647 | Semiconductor devices and semiconductor device manufacturing methods - Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure. | 06-03-2010 |
20100141821 | Image Sensor Devices Having Dual-Gated Charge Storage Regions Therein - An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first and second diodes include respective first conductivity type regions responsive to first and second gate signals, respectively. These first and second gate signals are active during non-overlapping time intervals. | 06-10-2010 |
20100177566 | Non-volatile memory device having stacked structure, and memory card and electronic system including the same - Provided are a non-volatile memory devices having a stacked structure, and a memory card and a system including the same. A non-volatile memory device may include a substrate. A stacked NAND cell array may have at least one NAND set and each NAND set may include a plurality of NAND strings vertically stacked on the substrate. At least one signal line may be arranged on the substrate so as to be commonly coupled with the at least one NAND set. | 07-15-2010 |
20100237312 | Nonvolatile memory device - The nonvolatile memory device includes at least one pair of first electrode lines, at least one device structure disposed between the at least one pair of first electrode lines and a dielectric layer disposed between the at least one device structure and the at least one pair of first electrode lines. The at least one device structure includes a second electrode line including a first conductive type semiconductor, a resistance changing material layer adjacent to the second electrode line, a channel adjacent to the resistance changing material layer and including a second conductive type semiconductor different from the first conductive type semiconductor and a third electrode line adjacent to the channel and including the first conductive type semiconductor. | 09-23-2010 |
20100277622 | Image sensor including noise removing unit, image pickup device having the image sensor, and image sensing method performed in the image sensor - An image sensor including a noise removing unit may sense images accurately by measuring the amount of noise generated when the image sensor does not perform a sensing operation, storing information about the measured noise amount in each pixel, and removing photocharge corresponding to the information about the measured noise amount during image sensing. | 11-04-2010 |
20100296344 | Methods of operating nonvolatile memory devices - Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell. | 11-25-2010 |
20100296347 | Method of erasing device including complementary nonvolatile memory devices - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 11-25-2010 |
20100320515 | High sensitivity image sensors and methods of operating the same - A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.) | 12-23-2010 |
20110001205 | Image sensor and semiconductor device including the same - Example embodiments relate to a three-dimensional image sensor including a color pixel array on a substrate, a distance pixel array on the substrate, an RGB filter on the color pixel array and configured to allow visible light having a first wavelength to pass, a near infrared light filter on the distance pixel array and configured to allow near infrared light having a second wavelength to pass, and a stack type single band filter on the RGB filter and the near infrared light filter and configured to allow light having a third wavelength between the first wavelength and the second wavelength to pass. According to example embodiments, a semiconductor device may include a color pixel array on a substrate; a distance pixel array on the substrate; a light-inducing member on the color pixel array and the distance pixel array; a RGB filter on the light-inducing member and configured to allow visible light to pass; a near infrared light filter on the light-inducing member and configured to allow near infrared light to pass; and a plurality of lenses on the RGB filter and the near infrared light filter. | 01-06-2011 |
20110019049 | PHOTO DETECTING APPARATUS AND UNIT PIXEL THEREOF - A unit pixel of a photo detecting apparatus includes a photogate, a transfer gate and a floating diffusion region. The photogate includes a junction gate extending in a first direction and a plurality of finger gates extending from the junction gate in a second direction substantially perpendicular to the first direction. The transfer gate is formed adjacent to the junction gate. The floating diffusion region is formed adjacent to the first transfer gate. | 01-27-2011 |
20110069464 | Memory module, memory system having the memory module, and method for manufacturing the memory module - Provided is a memory module, a system using the memory module, and a method of fabricating the memory module. The memory module may include a printed circuit board and a memory package on the printed circuit board. The printed circuit board may include an embedded optical waveguide and a first optical window extending from the optical waveguide to a first surface of the printed circuit board. The memory package may also include a memory die having an optical input/output section and a second optical window. The optical input/output section, the second optical window, and the first optical window may be arranged in a line and the first optical window and the second optical window may be configured to at least one of transmit an optical signal from the optical waveguide to the optical input/output section and transmit an optical signal from the optical input/output section to the optical waveguide. | 03-24-2011 |
20110074989 | IMAGE SENSORS - Provided is an image sensor having a depth sensor. The image sensor includes a substrate including a visible light region and a non-visible light region, a first well and a second well having a first conductivity type and in the non-visible light perception region, and a first gate and a second gate configured to receive voltages of opposite phases, respectively, and apply voltages to the first well and the second well, respectively. | 03-31-2011 |
20110096215 | Image Sensors and Methods of Manufacturing Image Sensors - An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed. | 04-28-2011 |
20110102547 | Three-Dimensional Image Sensors and Methods of Manufacturing the Same - Image sensors include three-dimensional (3D) color image sensors having an array of sensor pixels therein. A 3-D color image sensor may include a 3-D image sensor pixel having a plurality of color sensors and a depth sensor therein. The plurality of color sensors may include red, green and blue sensors extending adjacent the depth sensor. A rejection filter is also provided. This rejection filter, which extends opposite a light receiving surface of the 3-D image sensor pixel, is configured to be selectively transparent to visible and near-infrared light relative to far-infrared light. The depth sensor may also include an infrared filter that is selectively transparent to near-infrared light having wavelengths greater than about 700 nm relative to visible light. | 05-05-2011 |
20110109762 | PIXEL AND IMAGE PROCESSING DEVICES HAVING THE SAME - A pixel of an image sensor, the pixel including a plurality of photoelectric conversion elements arranged in a semiconductor substrate; and a first transfer circuit for sequentially transferring photo-charges generated by each of the plurality of photoelectric conversion elements to a first floating diffusion node. | 05-12-2011 |
20110121390 | Semiconductor substrates and manufacturing methods of the same - Semiconductor substrates and methods of manufacturing the same are provided. The semiconductor substrates include a substrate region, an insulation region and a floating body region. The insulation region is disposed on the substrate region. The floating body region is separated from the substrate region by the insulation region and is disposed on the insulation region. The substrate region and the floating body region are formed of materials having identical characteristics. The method of manufacturing the semiconductor substrate including forming at least one floating body pattern by etching a bulk substrate, separating the bulk substrate into a substrate region and a floating body region by etching a lower middle portion of the floating body pattern, and filling an insulating material between the floating body region and the substrate region. | 05-26-2011 |
20110129123 | IMAGE SENSORS FOR SENSING OBJECT DISTANCE INFORMATION - An image sensor includes a clock signal generator configured to generate and output at least first and second clock signals, a plurality of pixels configured to generate associated distance signals based on corresponding clock signals from among the at least first and second clock signals and light reflected by an object, and a distance information deciding unit configured to determine distance information with respect to the object by using the associated distance signals. At least one first pixel from among the plurality of pixels is configured to generate the associated distance signal based on at least the first clock signal, and at least one second pixel from among the plurality of pixels, which is adjacent to the at least one first pixel, is configured to generate the associated distance signal based on at least the second clock signal. | 06-02-2011 |
20110133063 | Optical waveguide and coupler apparatus and method of manufacturing the same - Optical waveguide and coupler devices and methods include a trench formed in a bulk semiconductor substrate, for example, a bulk silicon substrate. A bottom cladding layer is formed in the trench, and a core region is formed on the bottom cladding layer. A reflective element, such as a distributed Bragg reflector can be formed under the coupler device and/or the waveguide device. Because the optical devices are integrated in a bulk substrate, they can be readily integrated with other devices on a chip or die in accordance with silicon photonics technology. Specifically, for example, the optical devices can be integrated in a DRAM memory circuit chip die. | 06-09-2011 |
20110198499 | Near-infrared photodetectors, image sensors employing the same, and methods of manufacturing the same - Silicon photodetectors using near-infrared dipole antennas. The photodetectors include a silicon region formed on a semiconductor substrate, dipole antenna forming two arms that are spaced apart with the silicon region therebetween and inducing an electromagnetic wave signal of incident light, and electrodes disposed in a vertical direction of the dipole antenna and spaced apart with the silicon region therebetween, where a critical bias voltage is applied to the electrodes to induce an avalanche gain operation in the silicon region. | 08-18-2011 |
20110199602 | SENSOR AND METHOD USING THE SAME - A sensor, including a plurality of photo gate pairs on a semiconductor substrate, each of the photo gate pairs including a first photo gate and a second photo gate, a first shared floating diffusion region in the semiconductor substrate, and a plurality of first transmission transistors on the semiconductor substrate, wherein each of the plurality of first transmission transistors is adapted to transmit charges to the first shared floating diffusion region in response to a first transmission control signal, the charges being generated in the semiconductor substrate under the first photo gate of each of the plurality of photo gate pairs. | 08-18-2011 |
20120012899 | Distance measuring sensor including double transfer gate and three dimensional color image sensor including the distance measuring sensor - Provided are a distance measuring sensor including a double transfer gate, and a three dimensional color image sensor including the distance measuring sensor. The distance measuring sensor may include first and second charge storage regions which are spaced apart from each other on a substrate doped with a first impurity, the first and second charge storage regions being doped with a second impurity; a photoelectric conversion region between the first and second charge storage regions on the substrate, being doped with the second impurity, and generating photo-charges by receiving light; and first and second transfer gates which are formed between the photoelectric conversion region and the first and second charge storage regions above the substrate to selectively transfer the photo-charges in the photoelectric conversion region to the first and second charge storage regions. | 01-19-2012 |
20120026790 | Non-volatile memory device including block state confirmation cell and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 02-02-2012 |
20120038904 | UNIT PIXEL, PHOTO-DETECTION DEVICE AND METHOD OF MEASURING A DISTANCE USING THE SAME - A unit pixel included in a photo-detection device, the unit pixel including a floating diffusion region in a semiconductor substrate, a ring-shaped collection gate over the semiconductor substrate, a ring-shaped drain gate over the semiconductor substrate, and a drain region in the semiconductor substrate, wherein the collection gate and the drain gate are respectively arranged between the floating diffusion region and the drain region. | 02-16-2012 |
20120132804 | THERMAL IMAGE SENSOR WITH CHALCOGENIDE MATERIAL AND METHOD OF FABRICATING THE SAME - A thermal image sensor including a chalcogenide material, and a method of fabricating the thermal image sensor are provided. The thermal image sensor includes a first metal layer formed on a substrate; a cavity exiting the first metal layer adapted for absorbing infrared rays; a bolometer resistor formed on the cavity and including a chalcogenide material; and a second metal layer formed on the bolometer resistor. The thermal image sensor includes a first metal layer formed on a substrate; an insulating layer formed on the first metal layer; a bolometer resistor formed on the insulating layer, including a chalcogenide material and having a thickness corresponding to ¼ of an infrared wavelength (λ); the thermal image sensor further includes a second metal layer formed on the bolometer resistor. | 05-31-2012 |
20120154537 | IMAGE SENSORS AND METHODS OF OPERATING THE SAME - According to example embodiments, a method of operating a three-dimensional image sensor comprises measuring a distance of an object from the three-dimensional image sensor using light emitted by a light source module, and adjusting an emission angle of the light emitted by the light source module based on the measured distance. The three-dimensional image sensor includes the light source module. | 06-21-2012 |
20120155170 | NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A multi-layered non-volatile memory device and a method of manufacturing the same. The non-volatile memory device may include a plurality of first semiconductor layers having a stack structure. A plurality of control gate electrodes may extend across the first semiconductor layers. A first body contact layer may extend across the first semiconductor layers. A plurality of charge storage layers may be interposed between the control gate electrodes and the first semiconductor layers. | 06-21-2012 |
20120161277 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE MANUFACTURING METHODS - Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure. | 06-28-2012 |
20120236121 | Methods of Operating a Three-Dimensional Image Sensor Including a Plurality of Depth Pixels - In a method of operating a three-dimensional image sensor according to example embodiments, modulated light is emitted to an object of interest, the modulated light that is reflected from the object of interest is detected using a plurality of depth pixels, and a plurality of pixel group outputs respectively corresponding to a plurality of pixel groups are generated based on the detected modulated light by grouping the plurality of depth pixels into the plurality of pixel groups including a first pixel group and a second pixel group that have different sizes from each other. | 09-20-2012 |
20120249740 | THREE-DIMENSIONAL IMAGE SENSORS, CAMERAS, AND IMAGING SYSTEMS - A three-dimensional image sensor may include a light source module configured to emit at least one light to an object, a sensing circuit configured to polarize a received light that represents the at least one light reflected from the object and configured to convert the polarized light to electrical signals, and a control unit configured to control the light source module and sensing circuit. A camera may include a receiving lens; a sensor module configured to generate depth data, the depth data including depth information of objects based on a received light from the objects; an engine unit configured to generate a depth map of the objects based on the depth data, configured to segment the objects in the depth map, and configured to generate a control signal for controlling the receiving lens based on the segmented objects; and a motor unit configured to control focusing of the receiving lens. | 10-04-2012 |
20120268566 | THREE-DIMENSIONAL COLOR IMAGE SENSORS HAVING SPACED-APART MULTI-PIXEL COLOR REGIONS THEREIN - A three-dimensional color image sensor includes color pixels and depth pixels therein. A semiconductor substrate is provided with a depth region therein, which extends adjacent a surface of the semiconductor substrate. A two-dimensional array of spaced-apart color regions are provided within the depth region. Each of the color regions includes a plurality of different color pixels therein (e.g., red, blue and green pixels) and each of the color pixels within each of the spaced-apart color regions are spaced-apart from all other color pixels within other color regions. | 10-25-2012 |
20130020463 | IMAGE-SENSING DEVICES AND METHODS OF OPERATING THE SAME - In a method of operating an image sensor, a noise voltage of a floating diffusion region is sampled after a reset voltage is applied to the floating diffusion region. A storage region, in which a photo-charge is stored, is electrically connected to the floating diffusion region after sampling the noise voltage, and a demodulation voltage of the floating diffusion region is sampled after the storage region and the floating diffusion region are electrically-connected. A voltage is determined based on the noise voltage and the demodulation voltage. | 01-24-2013 |
20130119234 | UNIT PIXEL AND THREE-DIMENSIONAL IMAGE SENSOR INCLUDING THE SAME - A unit pixel of a three-dimensional image sensor includes a non-silicon photodetector and at least one readout circuit. The non-silicon photodetector is formed at a silicon substrate, and the non-silicon photodetector comprising at least one of non-silicon materials to generate a photocharge in response to incident light. The at least one readout circuit is formed at the silicon substrate, the at least one readout circuit outputs a sensing signal based on the photocharge, and the sensing signal generates depth information on a distance to an object. | 05-16-2013 |
20130123015 | IMAGE SENSOR, OPERATION METHOD THEREOF AND APPARATUSES INCUDING THE SAME - An operation method of an image sensor includes determining a distance between the image sensor and an object, and activating at least one of a color pixel, a depth pixel and a thermal pixel included in a pixel array of the image sensor based on a determined distance and a reference distance. | 05-16-2013 |
20130126716 | PIXEL CIRCUIT, DEPTH SENSOR AND OPERATING METHOD - A pixel circuit for a depth sensor operating in a detection period and an output period in either a first operating mode (high incident light intensity) or a second operating mode (low incident light intensity). The pixel circuit includes a light receiving unit generating charge in response to the incident light, a signal generation unit accumulating charge in a FDN in response to a transmission signal, reset signal and selection signal during the detection period, and generating an analog signal having a level corresponding to a voltage apparent at the FDN during the output period, and a refresh transistor coupled between a supply voltage and the light receiving unit and discharging charge to the supply voltage in response to a refresh signal. | 05-23-2013 |
20130161727 | NON-VOLATILE MEMORY DEVICE HAVING STACKED STRUCTURE, AND MEMORY CARD AND ELECTRONIC SYSTEM INCLUDING THE SAME - Provided are a non-volatile memory devices having a stacked structure, and a memory card and a system including the same. A non-volatile memory device may include a substrate. A stacked NAND cell array may have at least one NAND set and each NAND set may include a plurality of NAND strings vertically stacked on the substrate. At least one signal line may be arranged on the substrate so as to be commonly coupled with the at least one NAND set. | 06-27-2013 |
20130320406 | IMAGE SENSOR DEVICES HAVING DUAL-GATED CHARGE STORAGE REGIONS THEREIN - An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first and second diodes include respective first conductivity type regions responsive to first and second gate signals, respectively. These first and second gate signals are active during non-overlapping time intervals. | 12-05-2013 |
20140008707 | HIGH SENSITIVITY IMAGE SENSORS AND METHODS OF OPERATING THE SAME - A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions. | 01-09-2014 |
20140048853 | Image Sensors - An image sensor includes a first substrate including a driving element, a first insulation layer on the first substrate and on the driving element, a second substrate including a photoelectric conversion element, and a second insulation layer on the second substrate and on the photoelectric conversion element. A surface of the second insulation layer is on an upper surface of the first insulation layer. The image sensor includes a conductive connector penetrating the second insulation layer and a portion of the first insulation layer. Methods of forming image sensors are also disclosed. | 02-20-2014 |