Patent application number | Description | Published |
20090021331 | STEP ATTENUATOR - There is provided a step attenuator having two Pi-type attenuators and one bridged-T type attenuator that share some resistors. The step attenuator is used to prevent a reduction in frequency range caused by use of MOS transistors and reduce attenuation of signal power and frequency band by the MOS transistors, thereby obtaining a low attenuation value and reducing input and output mismatch. | 01-22-2009 |
20090051440 | ACTIVE BALUN CIRCUIT - There is provided an active balun circuit including: a load circuit unit including a first and a second load; a differential amplifying unit including a first amplifying unit connected to the first load, and a second amplifying unit connected to the second load and forming a differential amplifying unit together with the first amplifying unit, the differential amplifying unit differentially amplifying an input signal, and outputting first and second output signals out-of-phase with each other through first and second output terminals, respectively; a current source connected between a ground and a common connection node of the first and second amplifying units, and maintaining a constant amount of current flowing through the differential amplifying unit; and a compensation amplifying unit amplifying the input signal supplied through the input terminal, transmitting the amplified input signal to the second amplifying unit, and rejecting common mode noise of the differential amplifying unit. | 02-26-2009 |
20090058524 | RECEIVED SIGNAL STRENGTH INDICATOR SELF-CALIBRATING GAIN OF LIMITER - A received signal strength indicator according to an aspect of the invention may include a gain calibration section including a calibration limiter, a calibration load unit and a comparison and adjustment unit. The calibration load unit is connected to output terminals of the calibration limiter, and generating an output differential voltage whose gain is a unit gain when a predetermined input differential voltage is input to the calibration limiter, and a comparison and adjustment unit comparing the input differential voltage with the output differential voltage, and adjusting an output of a variable current source included in the calibration limiter so that the input differential voltage becomes identical to the output differential voltage. | 03-05-2009 |
20090124221 | DUAL BAND RECEIVER - There is provided a dual band receiver receiving frequency signals in different bands, the receiver including: a first down converter converting a first band signal into a first intermediate frequency signal; a second down converter converting a second band signal into a second intermediate frequency signal; a first voltage control oscillator supplying a first oscillation frequency to the first down converter; a second voltage control oscillator supplying a second oscillation frequency to the second down converter; a first filter passing the first intermediate frequency signal within a desired bandwidth; a second filter passing the second intermediate frequency signal within a desired bandwidth; and a clock generator converting the first oscillation frequency of the first voltage control oscillator into sampling frequencies corresponding to integer multiples of first and second oscillation frequencies and supplying the sampling frequencies to first and second AD converters, respectively. | 05-14-2009 |
20090153256 | FREQUENCY GENERATOR - There is provided a feedback circuit including: an oscillator generating an oscillation frequency signal; a mixer unit having an input terminal, a feedback terminal, and an output terminal and outputting a frequency signal through the output terminal, the frequency signal obtained by adding or subtracting frequency of a feedback signal, input through the feedback terminal, to or from frequency of the oscillation frequency signal input through the input terminal from the oscillator; a first frequency divider dividing the frequency signal output from the mixer unit at a division ratio of N (N is a multiple of 2) to generate an output signal; and a feedback circuit adjusting the output signal of the first frequency divider for the first frequency divider to output a frequency signal in a desired band and feeding back the adjusted signal to the feedback terminal of the mixer unit. | 06-18-2009 |
20100073040 | FREQUENCY DIVIDER USING LATCH STRUCTURE - There is provided a frequency divider using a latch structure including: a first latch sampling and latching an input signal in response to a first clock signal and a second clock signal having an inverse phase with respect to the first clock signal; a second latch toggled with the first latch, the second latch sampling and latching the input signal in response to the first and second clock signals; a bias adjustor generating a sampling bias current and a latching bias current to supply to the first and second latches, respectively and adjusting a relative ratio between the sampling bias current and the latching bias current to vary a minimum power point oscillating frequency of the first and second latches. | 03-25-2010 |
20100134188 | BUFFER AMPLIFIER - A buffer amplifier has high input impedance and is less affected by temperature by supplying independent bias power to each of amplification units. The buffer amplifier includes a bias supply unit supplying bias power having a preset voltage level, an amplification unit receiving preset driving power and the bias power from the bias supply unit to amplify an input signal, and a compensation unit compensating for current unbalance of the driving power supplied to the amplification unit. | 06-03-2010 |
20100308920 | WIDE-BAND AMPLIFIER CIRCUIT WITH IMPROVED GAIN FLATNESS - There is provided a wide-band amplifier circuit with improved gain flatness. The wide-band amplifier circuit includes a first resonant load unit connected to an operating power terminal, providing a preset first load, and forming a preset first resonant point, a second resonant load unit connected to the operating power terminal, providing a preset second load, and forming a second resonant point set to a frequency different from the first resonant point; a first amplification unit receiving operating power via the first load of the first resonant load unit, having an amplification band characteristic determined according to the first resonant point of the first resonant load unit, and amplifying an input signal; and a second amplification unit receiving operating power via the second load, having an amplification band characteristic determined according to the second resonant point, and amplifying an input signal from the first amplification unit. | 12-09-2010 |
20100321120 | FRACTIONAL-N FREQUENCY SYNTHESIZER AND METHOD THEREOF - The present relates to a fractional-N frequency synthesizer improving noise characteristics and a method thereof. The fractional-N frequency synthesizer includes a reference oscillator that generates a reference frequency signal; a sigma-delta modulator that generates a desired decimal value based on the reference frequency signal; a divider that divides a voltage controlled oscillation frequency signal; first to M phase/frequency detectors that detect a difference in phase and frequency between the reference frequency signal and the divided voltage controlled oscillation frequency signal; first to M charge pumps that are connected to each of the phase/frequency detectors in series and charges or pumps charge amount according to output signals from each of the phase/frequency detectors; a loop filter that controls the amount of supplied current based on output signals from the charge pumps to filter low-pass frequency components; and a voltage controlled oscillator that is oscillated in response to the output signal from the loop filter and generates voltage controlled oscillation frequency signals. | 12-23-2010 |
20110025421 | STEP VARIABLE GAIN AMPLIFIER - Disclosed is a step variable gain amplifier for linearly amplifying a signal received from an antenna. The step variable gain amplifier includes: an amplification unit for converting and amplifying a voltage component of a received signal into a current voltage according to a step amplification control signal; a controller for generating a step amplification control signal of the received signal and controlling on/off of the amplification unit according to the control signal; and an output unit connected to the amplification unit, the output unit outputting a voltage component from the signal that has been subjected to conversion into the current component and amplification processes. | 02-03-2011 |
20110032011 | AUTO FREQUENCY CALIBRATOR, METHOD THEREOF AND FREQUENCY SYNTHESIZER USING IT - The present invention relates to and auto frequency calibrator, a method thereof, and a frequency synthesizer using it. The auto frequency calibrator includes a capacitor bank selector that is operated as an open loop and compares a frequency signal having integer-divided reference frequency with the reference frequency signal to select a capacitor bank corresponding to an output frequency; and a capacitor bank controller that is operated as a closed loop when the capacitor bank is selected and compares the output voltage corresponding to the output frequency with a preset voltage range to control the capacitor bank selected in the capacitor bank selector. | 02-10-2011 |
20110037507 | MIXER WITH DIFFERENTIAL DC OFFSET CANCELLATION FUNCTION - A mixer with a differential DC offset cancellation function includes: a load unit including a first load unit and a second load unit; a mixing unit biased by current transferred from the load unit to mix inputs signal and oscillation signals; a first output voltage detection unit detecting an output voltage of the first output terminal; a second output voltage detection unit detecting an output voltage of the second output terminal; a first injection/extraction circuit unit injecting current into the first load unit or extracting current from the first load unit according to the size of a first detection voltage; a second injection/extraction circuit unit injecting current into the second load unit or extracting current from the second load unit according to the size of a second detection voltage; and a current regulation unit regulating an overall current flowing across the first and second injection/extraction circuit units. | 02-17-2011 |
20110037522 | ACTIVE BALUN WITH STACKED STRUCTURE - An active balun with a stacked structure includes: a first amplification unit including a first transistor having a first terminal connected with a first input terminal, a second terminal connected with a power voltage terminal, and a third terminal connected with an output terminal; a second amplification unit including a second transistor having a first terminal connected with a second input terminal, a second terminal connected with the output terminal, and a third terminal connected with a ground; and a capacitance matching unit connected between the first terminal and the third terminal of the first transistor and having a pre-set matching capacitance. | 02-17-2011 |
20110133834 | POWER AMPLIFIER - There is provided a power amplifier with a variable supply of bias power according to a look-up table having a voltage value determined based on a level of an RF signal being input to the power amplifier to thereby increase power efficiency. A power amplifier according to an aspect of the invention may include an amplification section amplifying an input signal according to a bias voltage being supplied; and a bias supply section comparing a level of the input signal with a look-up table set in advance and supplying a bias voltage to the amplification section according to a result of the comparison. | 06-09-2011 |
20110143821 | POWER AMPLIFICATION MODULE FOR MOBILE COMMUNICATION TERMINAL - Disclosed herein is a power amplification module for a mobile communication terminal. The power amplification module includes a balanced power amplifier configured to divide an input signal using a phase difference, amplify resulting signals, and combine the amplified signals with each other, and a transmission power detection unit connected to an isolation terminal formed on an output side of the balanced power amplifier and configured to amplify a micro-power signal, which is transmitted to the isolation terminal from an outside of the transmission power detection unit, and to transmit the amplified signal. Accordingly, since the detection signal to input terminal and detection signal output terminal of a transmission power detection unit can be easily implemented using an internal circuit, the entire size of the power amplification module can be reduced. Further, characteristic of isolation between the detection signal input terminal and the detection signal output terminal can be improved. | 06-16-2011 |
20110156813 | POWER AMPLIFIER - There is provided a power amplifier that can maintain a constant gain by detecting a level of a signal being input and a level of a signal being output. A power amplifier according to an aspect of the invention may include: an amplification section having at least one amplification unit amplifying an input signal according to an adjustable gain to thereby output the amplified input signal; a detection section detecting signal levels of an input signal and an output signal of the amplification section; and a gain maintaining section controlling a bias power according to a detection result of the detection section so that a gain of the amplification section is maintained within a predetermined gain range. | 06-30-2011 |
20110156817 | POWER AMPLIFIER - Disclosed herein is a power amplifier. The power amplifier includes a first common source transistor for amplifying an input signal into a predetermined level, a second common source transistor for compensating for input capacitance and performing auxiliary amplification for the first common source transistor, and a common gate transistor connected to the first common source transistor in a cascode structure, configured to be connected in parallel to the second common source transistor and prevent the first common source transistor from breaking down, and configured to output a signal amplified by a value obtained by adding the gain of the first common source transistor and the gain of the second common source transistor to each other. | 06-30-2011 |
20110304395 | POWER AMPLIFIER - Disclosed is a power amplifier. A power amplifier according to an aspect of the invention may include: a first amplification section having a first N metal oxide semiconductor (MOS) amplifier and a second N MOS amplifier connected in a cascode configuration and amplifying an input signal; a second amplification section having a first P MOS amplifier and a second P MOS amplifier connected in a cascode configuration and amplifying the input signal; and a power combining section combining respective output signals of the first amplification section and the second amplification section. | 12-15-2011 |
20110304398 | CMOS POWER AMPLIFIER AND TEMPERATURE COMPENSATION CIRCUIT THEREOF - Disclosed is a CMOS power amplifier. A temperature compensation circuit of a CMOS power amplifier may include: a bias circuit unit supplying a gate bias voltage to a power amplification circuit part; a bias detection unit determining a class type of the power amplification circuit part according to the gate bias voltage; a temperature detection unit detecting a temperature-proportional voltage in proportion to ambient temperature; a temperature compensation control unit generating a compensation control value according to the temperature-proportion voltage in the class type determined by the bias detection unit; and a conversion unit converting the compensation control value of the temperature compensation control unit into a linear bias control value and providing the linear bias control value to the bias circuit unit, wherein the bias circuit unit compensates the gate bias voltage according to the linear bias control value of the conversion unit. | 12-15-2011 |
20120007674 | POWER AMPLIFIER REDUCING GAIN MISMATCH - There is provided a power amplifier reducing a gain mismatch in order to reduce a gain mismatch between an N MOS amplifier and a P MOS amplifier by cross-connecting outputs from a two-stage amplification unit in a power amplifier having amplification units with a stacked structure in which the N MOS amplifier and the P MOS amplifier are connected in series with each other. | 01-12-2012 |
20120025907 | POWER AMPLIFIER - There is provided a power amplifier capable of supplying variable bias to an amplifier circuit by accurately transferring the envelope components of an input signal during the supply of active bias power to the amplifier circuit. The power amplifier includes: an envelope detector detecting an envelope of an input signal; a bias power generator including at least one P-type MOSFET and one N-type MOSFET connected to each other in an inverter manner between a driving power terminal supplying driving power having a preset voltage level and a reference bias power terminal supplying preset reference bias power to generate bias power varied according to detection results from the envelope detector; and an amplifier amplifying the input signal according to the bias power level from the bias power generator. | 02-02-2012 |
20120286877 | POWER AMPLIFIER - There is provided a power amplifier including an amplifying unit having at least two cascode amplifiers connected in parallel to amplify an input signal; and a bias supply unit supplying bias power to a common gate node of the two cascode amplifiers, and removing a signal of a pre-set frequency band corresponding to a baseband at the common gate node by controlling impedance of the common gate node. | 11-15-2012 |
20120299657 | MULTI-MODE POWER AMPLIFIER - There is provided a multi-mode power amplifier operable in a low power mode having a preset power range and in a high power mode having a power range higher than the power range of the low power mode. The multi-mode power amplifier includes: a high power amplifying unit including at least one cascode amplifier to amplify an input signal to a high power level having a preset power range; a low power amplifying unit sharing a common source node of the at least one cascode amplifier to amplify the input signal to a low power level having a power range lower than the high power level; and a coupling unit coupling a transfer path of a signal output from the high power amplifying unit and a transfer path of a signal output from the low power amplifying unit to each other. | 11-29-2012 |
20130057349 | CMOS POWER AMPLIFIER - There is provided a complementary metal oxide semiconductor (CMOS) power amplifier including: a load unit connected between an operating voltage supply terminal and an output terminal; an amplifying unit formed as a cascode structure between the load unit and a ground, amplifying a power of an input signal input through an input terminal and outputting the amplified signal through an output terminal; and a threshold voltage control unit varying a threshold voltage of the amplifying unit according to a magnitude of the input signal input through the input terminal. | 03-07-2013 |
20130069722 | MULTI-BAND AMPLIFIER AND METHOD OF AMPLIFYING MULTI-BAND - Provided is a multi-band amplifier and a method of amplifying a multi-band. The multi-band amplifier includes a wireless signal input terminal into which a first frequency band signal and a second frequency band signal are input, a first impedance matching part connected to the wireless signal input terminal and configured to match an input impedance in a first frequency band, a second impedance matching part connected to the wireless signal input terminal and configured to match an input impedance in a second frequency band, a common source amplifier to which the first impedance matching part and the second impedance matching part, and a common gate amplifier connected to the common source amplifier. Accordingly, performance degradation can be reduced in comparison with a conventional amplifier, broadband amplification as well as narrow band amplification can be performed, and an amplification gain can be adjusted. | 03-21-2013 |
20130076447 | POWER AMPLIFIER MODULE HAVING BIAS CIRCUIT - There is provided a power amplifier module having a bias circuit, in which a bias power is supplied to an amplifier by differently setting an impedance between an input signal terminal and a reference power terminal and an impedance between the input signal terminal and a ground. The power amplifier module includes: an amplifier unit receiving a bias power to amplify an input signal; and a bias unit supplying the bias power to the amplifier, by differently setting an impedance between an input signal terminal transmitting the input signal therethrough and a reference power terminal transmitting a reference power having a predetermined voltage level and an impedance between the input signal terminal and a ground. | 03-28-2013 |
20130079065 | MULTI-MODE POWER AMPLIFIER - There is provided a multi-mode power amplifier having increased isolation, including: a high power mode amplifying unit amplifying an input signal by a pre-set gain when the input signal has a power level higher than a pre-set reference level; a low power mode amplifying unit amplifying the input signal by a pre-set gain when the input signal has a power level lower than the pre-set reference level; a switch unit including one or more switches selectively proving a signal transmission path to the high power mode amplifying unit and the low power mode amplifying unit; and a controller providing a control signal having a pre-set voltage level for switching the one or more switches of the switch unit on or off, the voltage level of the control signal for switching the one or more switches off being set to be a negative voltage. | 03-28-2013 |
20130082777 | BIAS CONTROLLING APPARATUS - The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor. | 04-04-2013 |
20130120048 | DC OFFSET CANCELATION CIRCUIT - There is provided a DC offset cancellation circuit including: a capacitor circuit unit including at least one capacitor connected between an input terminal and an input of an amplifier; a MOSFET circuit unit including a plurality of MOSFETs connected in series between a first connection node connected to a predetermined one of both terminals of the capacitor circuit unit and a ground and operating in a linear region; and a switching circuit unit including a plurality of switch elements for selecting several MOSFETs previously selected from among the plurality of MOSFETs of the MOSFET circuit unit, respectively. | 05-16-2013 |
20130127575 | TRANSFORMER AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a transformer and a method of manufacturing the same. The transformer includes: a primary side winding having a loop shape; a secondary side winding formed on the same plane as that of the primary side winding in a remaining section except for at least a section at which it intersects with the primary side winding and having the same loop shape as that of the primary side winding so as to be electromagnetically coupled to the primary side winding; and an intersecting section formed so that the primary side and secondary side windings having the sum of the turn numbers of 3 or more intersect with each other in a two-layer structure, wherein the intersecting section includes at least one point of intermediate node having one side connected in a first layer and the other side connected in a second layer. | 05-23-2013 |
20130141167 | POWER AMPLIFIER - Disclosed herein is a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier. The power amplifier includes: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal. Although output impedance is changed, damage to the power amplifier can be prevented. Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal. | 06-06-2013 |
20130162350 | POWER AMPLIFIER - There is provided a power amplifier capable of increasing linear output power and efficiency without sacrificing an overall gain by employing a vector modulation function in a driving stage, with no separate vector modulator. The power amplifier includes a driving stage performing vector-modulation on an input RF signal to provide an I channel signal and a Q channel signal having different phases and amplifying the I channel signal and the Q channel signal to set gains; and a power stage amplifying power levels of the signals amplified by the driving stage. | 06-27-2013 |