Patent application number | Description | Published |
20080219279 | SCALABLE AND CONFIGURABLE QUEUE MANAGEMENT FOR NETWORK PACKET TRAFFIC QUALITY OF SERVICE - Various embodiments are directed to scalable and configurable queue management for network packet traffic Quality of Service (QoS). In one or more embodiments, the queue management may be implemented by a network processor comprising a queue manager to assert interrupts indicating that one or more queues require service, and a core processor to apply an interrupt mask to a status register value identifying the one or more queues that require service and to provide service during a particular service cycle to only those queues that are not masked out. Other embodiments are described and claimed. | 09-11-2008 |
20080237310 | Die backside wire bond technology for single or stacked die package - Methods and apparatus to provide die backside connections are described. In one embodiment, the backside of a die is metallized and coupled to another die or a substrate. Other embodiments are also described. | 10-02-2008 |
20080315421 | Die backside metallization and surface activated bonding for stacked die packages - Methods and apparatus to provide die backside metallization and/or surface activated bonding for stacked die packages are described. In one embodiment, an active metal layer of a first die may be coupled to an active metal layer of a second die through silicon vias and/or a die backside metallization layer of the second die. Other embodiments are also described. | 12-25-2008 |
20090019196 | Quality of Service (QoS) Processing of Data Packets - The present disclosure provides a method for providing Quality of Service (QoS) processing of a plurality of data packets stored in a first memory. The method may include determining a queue of a plurality of queues causing an interrupt using contents of an interrupt status register, the queue comprising address of at least one data packet of the plurality of data packets. The method may further include performing a logical operation between the contents of the interrupt status register and an interrupt mask of a plurality of interrupt masks, the plurality of interrupt masks stored in a second memory. The method may also include processing the plurality of data packets based on the logical operation and incrementing an interrupt mask address pointer stored in a third memory, thereby pointing to another interrupt mask of the plurality of interrupt masks. Of course, many alternatives, variations and modifications are possible without departing from this embodiment. | 01-15-2009 |
20090065951 | STACKED DIE PACKAGE - The formation of electronic assemblies is described. One embodiment includes first and second semiconductor die structures each including a front side and a backside, the front side including an active region and the backside including metal regions and non-metal regions thereon. The first and second semiconductor die structures include a plurality of vias, the vias forming electrical connections between the active region and the backside metal regions. The first and second semiconductor die structures are stacked together with at least one of the metal regions on the backside of the first semiconductor die structure in direct contact with at least one of the metal regions on the back side of the second semiconductor die structure. Other embodiments are described and claimed. | 03-12-2009 |
20090122702 | Bandwidth allocation for network packet traffic - Bandwidth is allocated among network interfaces of, for example, a switch, router, or server among based on network packet traffic. In one example the network device has a plurality of network interfaces, a performance monitoring unit to monitor buffer events for the network interfaces and to generate an interrupt if a network interface buffer is near an overflow state, and a processor to receive the interrupt and increase a priority of the associated network interface in response thereto. | 05-14-2009 |
20100031060 | SECURITY FOR RAID SYSTEMS - Methods and apparatus for accessing a redundant array of independent drives (RAID) storage device are disclosed. In some embodiments file data is broken into multiple segments. A cryptographic operation is performed on one or more segments to generate encrypted segment(s). One or more parity syndrome is computed from the encrypted segment(s) and the unencrypted segment(s). The encrypted segment(s), the unencrypted segment(s) and the parity syndrome(s) are striped onto different individual drives. Since the cryptographic operation is not performed on all the segments, it may also be performed concurrently with computing of parity syndrome(s) from other unencrypted segments. | 02-04-2010 |
20100054477 | ACCELERATED CRYPTOGRAPHY WITH AN ENCRYPTION ATTRIBUTE - Methods and systems for encrypting and decrypting are presented. In one embodiment, the method comprises encrypting one or more segments of a data with a key. The data is associated with at least one encryption attribute and having a plurality of segments. The encryption attribute includes information to identify one or more segments of the data to encrypt. The method further comprises encrypting the encryption attribute and storing the data including the partly encrypted data and the encrypted encryption attribute. | 03-04-2010 |
20100083039 | REDUNDANT ARRAY OF INDEPENDENT DISKS-RELATED OPERATIONS - In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one access request involving a redundant array of independent disks (RAID) storage. The storage may be capable of accessing, in response, at least in part, to the at least one request an encryption and/or parity information. The encryption may be of at least one portion of the data and/or the parity information. The encryption may be stored in (1) encrypted disk stripes in the storage such that the data is unrecoverable based solely upon remaining unencrypted portion of the data and the parity information stored in the storage, and/or (2) one or more respective disk stripes having a number that is determined based at least in part upon one or more encryption levels, if any, associated with at least one characteristic of the data. | 04-01-2010 |
20100169750 | FIRMWARE VERIFICATION USING SYSTEM MEMORY ERROR CHECK LOGIC - Embodiments of an invention for verifying firmware using system memory error check logic are disclosed. In one embodiment, an apparatus includes an execution core, firmware, error check logic, non-volatile memory, comparison logic, and security logic. The error check logic is to generate, for each line of firmware, an error check value. The comparison logic is to compare stored error check values from the non-volatile memory with generated error check values from the error check logic. The security logic is to prevent the execution core from executing the firmware if the comparison logic detects a mismatch between the stored error code values and the generated error code values. | 07-01-2010 |
20110145443 | DFX SOFTWARE DEBUG FEATURE FOR IO AND OTHER NON-MEMORY TYPED TRANSACTIONS - A system and method for monitoring a data-path between a plurality of devices which are communicably interfaced with a bus for a transaction. The transaction is copied to a replicate transaction, and the original transaction is allowed to proceed to whichever of the plurality of devices to which it is uniquely addressed according to the transaction. A destination address of the replicate transaction is modified to a specified memory device which is also communicably interfaced with the bus, and the replicate transaction is then released onto the data-path, thus allowing the replicate transaction to proceed to the specified memory device based on the modified destination address. | 06-16-2011 |
20110154478 | ELECTRONIC DEVICE SECURITY - An apparatus comprises logic to manage data access in an electronic device by performing operations, comprising detecting at least one of a motion, vibration or change in orientation of the electronic device and in response to a detection, implementing a security policy for the electronic device. Other embodiments may be described. | 06-23-2011 |
20120003792 | STACKED DIE PACKAGE - The formation of electronic assemblies is described. One embodiment includes first and second semiconductor die structures each including a front side and a backside, the front side including an active region and the backside including metal regions and non-metal regions thereon. The first and second semiconductor die structures include a plurality of vias, the vias forming electrical connections between the active region and the backside metal regions. The first and second semiconductor die structures are stacked together with at least one of the metal regions on the backside of the first semiconductor die structure in direct contact with at least one of the metal regions on the back side of the second semiconductor die structure. Other embodiments are described and claimed. | 01-05-2012 |
20120005512 | METHOD, SYSTEM AND APPARATUS FOR DYNAMIC BUFFER MANAGEMENT FOR POWER SAVING - A method and apparatus may detect an event related to an external device communicating with a host controller. One or more external device characteristics of the external device may be determined. One or more physical memory cells for the host controller may be modified based on the one or more external device characteristics. | 01-05-2012 |
20120057696 | MULTI-KEY CRYPTOGRAPHY FOR ENCRYPTING FILE SYSTEM ACCELERATION - Embodiments of methods and systems for encrypting and decrypting with encryption attributes are presented. An encryption attribute contains information to identify one or more segments of a file to be encrypted. An encryption process encrypts those one or more segments to generate a partly encrypted file instead of encrypting the entire file. That is, the file includes some data that are encrypted and some data that are not. In one embodiment, at least three encryption keys are used such that the encryption attribute is encrypted with using a third key. | 03-08-2012 |
20120102576 | Scalable Memory Protection Mechanism - An apparatus to protect contents of a memory region is presented. In one embodiment, the apparatus includes a non-volatile memory, memory check logic to generate check values for protected memory regions, and comparison logic to compare stored check values from the non-volatile memory with generated check values from the memory check logic. The apparatus also includes security logic to prevent executing code in the protected memory regions if the comparison logic detects a mismatch between the stored check values and the generated check values. | 04-26-2012 |
20130268618 | DETERMINING, AT LEAST IN PART, ONE OR MORE RESPECTIVE AMOUNTS OF BUFFER MEMORY FIELD - An embodiment may include determining at least one respective amount of buffer memory to be used to store at least one respective portion of network traffic. The determining may be based at least in part upon at least one respective parameter associated with the at least one respective network traffic portion. The at least one respective amount may be sufficient to store the at least one respective portion of the network traffic. The at least one respective parameter may reflect at least one actual characteristic of the at least one respective portion of the network traffic. This embodiment also may permit at least one respective portion of the buffer memory that may correspond to the at least one respective amount to be selectively powered-on to permit the at least one portion of the buffer memory to be used to store the at least one respective network traffic portion. | 10-10-2013 |
20130275691 | METHOD, APPARATUS AND SYSTEM FOR MEMORY VALIDATION - Techniques and mechanisms for assuring that one or more addressable locations in memory of a computer platform are transitioned from potentially invalid state to known-valid state. In an embodiment, a memory validation agent separate from a processor of the computer platform performs memory validation writes in response to an indication of power state transition. In another embodiment, the memory validation agent determines information to be included in write commands which implement the memory validation, where the determining the information is decoupled from operation of the processor. | 10-17-2013 |
20140015964 | TECHNIQUES FOR VIDEO ANALYTICS OF CAPTURED VIDEO CONTENT - Examples are disclosed for video analytics of captured video content. In some examples, information may be received from a host processing system for a camera to capture video content. The camera may be a surveillance camera or a camera located with a display device. Video analytics may be performed on the captured video and the captured video content may be encoded. Data associated with the video analytics may then be sent to the host processing system. In some examples, the data as well as encoded captured video content or streaming video may be sent via communication channels included in an interconnect. Other examples are described and claimed. | 01-16-2014 |
20140068129 | METHOD FOR IMPLEMENTING SECURE DATA CHANNEL BETWEEN PROCESSOR AND DEVICES - Apparatuses, systems, and methods are directed to securely store, transfer, and/or process data especially sensitive data sent from input devices to processors. In one embodiment, sensitive data may be packaged with at least one interrupt vector to provide a single posted write transaction initiated by an input device. The single posted write transaction may then be directly sent to a predetermined memory block allocated from a processor. In response to the single posted write transaction, a memory decoder associated with the processor may generate an emulated message signaled interrupt (MSI) signal to invoke an interrupt handler or an interrupt service routine (ISR) to service the emulated MSI using interrupt data, including the sensitive data, retrieved from the predetermined memory block. Once the sensitive data are processed by the processor, they may be removed from the processor before the processor exits the interrupt handler. | 03-06-2014 |
20140175670 | STACKED DIE PACKAGE - The formation of electronic assemblies is described. One embodiment includes first and second semiconductor die structures each including a front side and a backside, the front side including an active region and the backside including metal regions and non-metal regions thereon. The first and second semiconductor die structures include a plurality of vias, the vias forming electrical connections between the active region and the backside metal regions. The first and second semiconductor die structures are stacked together with at least one of the metal regions on the backside of the first semiconductor die structure in direct contact with at least one of the metal regions on the back side of the second semiconductor die structure. Other embodiments are described and claimed. | 06-26-2014 |
20140223201 | TECHNIQUES FOR SOLAR CELL MANAGEMENT FOR COMPUTING DEVICES - Embodiments of an apparatus, system and method are described for managing one or more solar cells for a mobile computing device. An apparatus may comprise, for example, a power management module operative to manage a power output received from a plurality of solar cells and an interface management module operative to identify one or more solar cells having a lower power output than other solar cells and to adjust one or more graphical user interface (GUI) elements based on the identification. Other embodiments are described and claimed. | 08-07-2014 |
20150019881 | ACCELERATED CRYPTOGRAPHY WITH AN ENCRYPTION ATTRIBUTE - Methods and systems for encrypting and decrypting are presented. In one embodiment, the method comprises encrypting one or more segments of a data with a key. The data is associated with at least one encryption attribute and having a plurality of segments. The encryption attribute includes information to identify one or more segments of the data to encrypt. The method further comprises encrypting the encryption attribute and storing the data including the partly encrypted data and the encrypted encryption attribute. | 01-15-2015 |