| Patent application number | Description | Published |
|---|
| 20090090987 | Mems element, mems device and mems element manufacturing method - An MEMS element (A | 04-09-2009 |
| 20100000324 | ACCELERATION SENSOR AND METHOD OF FABRICATING IT - Provided is an acceleration sensor that has high detection sensitivity and that can enhance production efficiency. The acceleration sensor ( | 01-07-2010 |
| 20110043375 | AIR PRESSURE MANAGEMENT DEVICE FOR VEHICLE TIRE AND VEHICLE TIRE CAPABLE OF OUTPUTTING AIR PRESSURE INFORMATION - Vibration electric power generation is carried out by a relative parallel movement of a ferroelectric member including floating electrodes arranged in parallel and a movable member including electrets maintaining a surface electric potential of approximately 100 volts at a temperature of 100° C. and opposed electrode portions alternately arranged, the ferroelectric member and the movable member being provided in a tire. | 02-24-2011 |
| 20110062820 | Power Generation Apparatus - A power generation apparatus includes a dielectric, a movable member being opposed to the dielectric with a predetermined distance, and an electret and an opposing electrode that are formed on the surface of the movable member facing the dielectric so as to generate a fringe electric field penetrating the dielectric between the two electrodes. When the volume occupancy of the dielectric between the electret and the opposing electrode varies in accordance with a displacement of the movable member, the power generation apparatus outputs the electric charge induced in the opposing electrode as electric current. | 03-17-2011 |
| 20120154504 | THERMAL PRINTER HEAD AND MANUFACTURING METHOD THEREOF - A thermal printer head that is highly efficient to manufacture is provided, which includes: a first substrate ( | 06-21-2012 |
| Patent application number | Description | Published |
|---|
| 20080237848 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a data processor chip simultaneously accesses. Address system bonding pads to which a plurality of memory chips correspond are commonly coupled by a wire to a bonding lead at one end of the module board wiring whose other end is coupled by a wire to an address system bonding pads of the data processor. Data system bonding pads of the data processor chip are individually coupled to data system bonding pads of the memory chip. With respect to an arrangement of the plurality of data system bonding pads of the data processor chip, an arrangement of the data system bonding pads to which the memory chip, coupled by the data system wiring, corresponds is made such that memory chips are disposed in an alternating sequence. | 10-02-2008 |
| 20100244238 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a data processor chip simultaneously accesses. Address system bonding pads to which a plurality of memory chips correspond are commonly coupled by a wire to a bonding lead at one end of the module board wiring whose other end is coupled by a wire to an address system bonding pads of the data processor. Data system bonding pads of the data processor chip are individually coupled to data system bonding pads of the memory chip. With respect to an arrangement of the plurality of data system bonding pads of the data processor chip, an arrangement of the data system bonding pads to which the memory chip, coupled by the data system wiring, corresponds is made such that memory chips are disposed in an alternating sequence. | 09-30-2010 |
| 20100314761 | SEMICONDUCTOR DEVICE WITH REDUCED CROSS TALK - Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other. A major signal wiring of an external output system connected to the external output terminal, which may be a noise source, is made to be in a wiring layer distant from the semiconductor integrated circuit. | 12-16-2010 |
| 20110127671 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a data processor chip simultaneously accesses. Address system bonding pads to which a plurality of memory chips correspond are commonly coupled by a wire to a bonding lead at one end of the module board wiring whose other end is coupled by a wire to an address system bonding pads of the data processor. Data system bonding pads of the data processor chip are individually coupled to data system bonding pads of the memory chip. With respect to an arrangement of the plurality of data system bonding pads of the data processor chip, an arrangement of the data system bonding pads to which the memory chip, coupled by the data system wiring, corresponds is made such that memory chips are disposed in an alternating sequence. | 06-02-2011 |
