Patent application number | Description | Published |
20090231017 | Counter circuit - Reduction in power consumption of a counter circuit for continuous operation is demanded. Therefore, provided is a counter circuit including: a first counter of m bits for counting and storing a value of a predetermined bit width according to an input clock; a clock transmission control circuit for controlling whether to transmit the input clock based on a value output according to a counting result of the first counter; and a second counter of n bits for counting and storing another value of the predetermined bit width according to the input clock transmitted from the clock transmission control circuit. | 09-17-2009 |
20100202813 | IMAGE FORMING MECHANISM AND IMAGE FORMING DEVICE - There is provided an image forming mechanism including: an image carrier containing a lubricant in a photosensitive layer that is formed on a surface of the image carrier, and on which an electrostatic latent image is formed; a developing section developing the electrostatic latent image into a visible image by a developer that contains the lubricant; and a cleaning member formed with a first layer that contacts the photosensitive layer, and a second layer that is formed of a material having a lower modulus of repulsion elasticity than the first layer and that is layered with the first layer and that does not contact the surface of the image carrier. | 08-12-2010 |
20100237900 | Semiconductor integrated circuit including a power controllable region - Provided is a semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit including a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to the outside of the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to the outside of the chip. In the case of inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain. | 09-23-2010 |
20100296622 | Counter circuit - A counter circuit adding a first value indicated by a plurality of bits and a second value in response to a clock signal, a first part of the plurality of bits being lower order than a second part of the plurality of bits, the counter circuit including a first counter configured to add the first part of the plurality of bits and the second value in response to the clock signal to output a third value regarding a result of adding the first and the second values, a second counter configured to add the second part of the plurality of bits and a fourth value in response to the clock signal, and a clock transmission control circuit coupled to the first and second counters to receive the clock signal and the third value, and to control whether or not to supply the clock signal to the second counter in accordance with the received third value. | 11-25-2010 |
20110156950 | Positioning System and Positioning Method - It is an object of the present invention to perform positioning at favorable positioning precision and in a favorable positioning time, according to whether a receiver is indoors or outdoors. A positioning server | 06-30-2011 |
20110156951 | Positioning System and Positioning Method - It is an object of the present invention to obtain a positioning result corresponding to the state of a receiver in less time. A positioning server | 06-30-2011 |
20110156952 | Positioning System and Positioning Method - It is an object of the present invention to perform positioning at the proper positioning time and positioning precision in response to a requirement with respect to positioning. A positioning server | 06-30-2011 |
20110189960 | Estimating Whether A Wireless Terminal Is Indoors Using Pattern Classification - A method and apparatus for estimating whether or not a wireless terminal is indoors are disclosed. The illustrative embodiment employs a pattern classifier that is trained on a plurality of input/output mappings, where each mapping corresponds to a respective location, the output of the mapping is a Boolean value that indicates whether the location is indoors, and the input of the mapping is based on empirical and predicted signal data for the location. In accordance with the illustrative embodiment, a computer-executable program is generated based on the trained pattern classifier. The computer-executable program estimates whether or not a wireless terminal is indoors based on empirical data reported by the terminal, and on a location estimate for the terminal that might be crude or inaccurate (e.g., based on Cell Identifier [Cell-ID], GPS, etc.). | 08-04-2011 |
20110200163 | Counter Circuit - A system includes a memory and a counter circuit associated with the memory and configured to receive a clock signal and a plurality of input bits, and configured to output a plurality of output bits to the memory. The counter circuit includes a first counter configured to receive a part of the plurality of input bits and to output a part of the plurality of output bits and a first signal, a control circuit configured to receive the clock signal and the first signal, and to output a second signal, and a second counter configured to receive another part of the plurality of input bits and the second signal, and to output another part of the plurality of output bits. | 08-18-2011 |
20110234267 | Semiconductor device and method for controlling flip-flop - A semiconductor device according to one aspect of the present invention includes: a flip-flop; a clock control circuit that controls a clock signal supplied to the flip-flop; and a controller that supplies a data retention signal to the flip-flop and controls the clock control circuit. When the flip-flop is driven by a negative edge of the clock signal and retains data when the clock signal is at a high level, the controller controls the clock control circuit so as to supply a high-level clock signal to the flip-flop after the input clock signal is fixed and before the flip-flop retains data. This prevents the occurrence of unintended latching of data when the flip-flop having a retention function retains data. | 09-29-2011 |
20110316582 | Semiconductor integrated circuit including a power controllable region - A semiconductor chip includes a first power supply line and a second power supply line. A first switch is coupled between the first power supply line and the second power supply line, and a second switch is coupled between the first power supply line and the second power supply line. A circuit is coupled to the second power supply line. A first control signal line is coupled to the first switch, and a second control signal line coupled to the second switch. A logic gate is coupled to the first and the second control signal lines and a terminal is coupled to the logic gate to output a signal to an outside of the semiconductor chip. | 12-29-2011 |
20120163839 | IMAGE FORMING APPARATUS AND CONSUMABLE SUPPLY MANAGEMENT SYSTEM - An image forming apparatus includes an image forming section that forms an image, a plurality of detectors that detect an amount of variation of indicators respectively determining an amount consumed of the consumable supply, a determination section that determines whether or not the amount of variation has reached any one of first lifespan values, an interruption section that interrupts an image forming operation based on the first lifespan values, and an extension setting section that inhibits the interruption of the image forming operation and sets an extension mode of extending a period of execution of the image forming operation, wherein the determination section determines whether or not an amount of variation of one indicator has reached an extended lifespan value when the extension mode is set, and wherein the interruption section interrupts the image forming operation based on extended lifespan value when the extension mode is set. | 06-28-2012 |
20130002328 | SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING FLIP-FLOP - A semiconductor integrated circuit includes a first retention flip-flop configured in a first type in which a retention flip-flop is able to retain data based on one of a low-level clock signal and a high-level clock signal, and unable to retain data based on another one of the low-level clock signal and high-level clock signal, and a second retention flip-flop configured in a second type in which a retention flip-flop is able to retain data based on the low-level clock signal and also able to retain data based on the high-level clock signal. | 01-03-2013 |
20130011145 | IMAGE FORMING APPARATUS, IMAGE FORMING METHOD, AND COMPUTER READABLE MEDIUM - An image forming apparatus includes an image carrier unit, a determining section, an acquiring section, and a removal capability increasing section. The image carrier unit includes an image carrier and a cleaning member, and has a lubricant in the area of the cleaning member that contacts the image carrier when the image carrier unit is in an unused condition. The determining section determines whether or not the image carrier unit is unused. The acquiring section acquires the elapsed time since manufacture of the image carrier unit. The removal capability increasing section increases the removal capability for removing the lubricant from the surface of the image carrier by the cleaning member, in a case where it is determined that the image carrier unit is unused and the acquired elapsed time is equal to or more than a predetermined time, in comparison to other cases. | 01-10-2013 |
20130017478 | IMAGE-FORMING APPARATUS, ELECTROPHOTOGRAPHIC PHOTORECEPTOR, AND PROCESS CARTRIDGEAANM Oda; YasuhiroAACI KanagawaAACO JPAAGP Oda; Yasuhiro Kanagawa JP - An image-forming apparatus includes an electrophotographic photoreceptor including an outermost layer having a crosslinked structure formed by dehydration condensation of a charge transport monomer containing a hydroxyl group and a developing unit that develops an electrostatic latent image on a surface of the electrophotographic photoreceptor with a developer containing a toner manufactured by dispersing particles for forming the toner in a solvent containing water and aggregating and heating the particles to form a toner image. The apparatus satisfies at least one of the following conditions:
| 01-17-2013 |
20130162345 | SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING A POWER CONTROLLABLE REGION - A semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit includes a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to outside the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to outside of the chip. When inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain. | 06-27-2013 |
20130251413 | IMAGE FORMING APPARATUS - An image forming apparatus includes a rotatable photoconductor and a developing device that uses a developer that exhibits magnetism, the developing device including a housing having an opening for development at a position facing the photoconductor, and plural developing rollers that are exposed through the opening in the housing, that rotate without contacting a surface of the photoconductor, and that are arranged without contacting each other in a direction in which the surface of the photoconductor rotates, wherein a minimum distance between an inner surface portion extending to the opening of the housing of the developing device and one of the developing rollers arranged close to the inner surface portion and a minimum distance between the housing and the surface of the photoconductor are each equal to or larger than a minimum distance between the developing rollers. | 09-26-2013 |
20130275932 | TIMING ANALYSIS PROGRAM, TIMING ANALYSIS APPARATUS, AND TIMING ANALYSIS METHOD - A timing analysis program for performing analysis condition generation processing which generates a first analysis condition in which the variation width of a first delay value of a first circuit cell is shifted on the basis of a first variation coefficient and a second analysis condition in which the variation width of a second delay value of a second circuit cell is shifted on the basis of a second variation coefficient. | 10-17-2013 |
20140161474 | IMAGE FORMING APPARATUS - An image forming apparatus includes an image output unit that forms an image with developer, a gathering unit that gathers developer not used by the image output unit as waste developer, plural collection containers that store and collect the waste developer, a transport device that transports the waste developer toward one of the collection containers and includes a discharge portion which is connected to the one of the collection containers, a moving device that moves the collection containers together to respective predetermined arrangement positions including a collection position for connection to the discharge portion and an attachment/detachment position, and a full-state detector that detects that the collection container at the collection position is in an almost full state. A selected one of the collection containers is preferentially moved to the collection position when the other collection container detected by the full-state detector is detached. | 06-12-2014 |