Patent application number | Description | Published |
20130016162 | LIQUID DROPLET DISCHARGE HEAD AND IMAGE FORMING APPARATUS INCLUDING SAMEAANM Yasu; KazukiAACI KanagawaAACO JPAAGP Yasu; Kazuki Kanagawa JPAANM Sasaki; ShinoAACI KanagawaAACO JPAAGP Sasaki; Shino Kanagawa JP - A liquid droplet discharge head includes: a liquid chamber including an inner wall; a plurality of nozzles on a part of the inner wall; a diaphragm to change a pressure inside the liquid chamber; a piezoelectric element to displace the diaphragm; a drive voltage generator to generate a pulse voltage for normal driving; a micro-drive voltage generator to generate a pulse voltage for micro-driving; a voltage applying means to apply a voltage waveform including each pulse voltage to the piezoelectric element; and a nozzle activation ratio processor to calculate a nozzle activation ratio based on drive data for discharging liquid droplets from the nozzle. Based on the nozzle activation ratio, the micro-drive voltage generator generates a pulse voltage for the micro-driving including a peak voltage corresponding to the nozzle activation ratio, and the voltage applying means applies an appropriate voltage waveform to the piezoelectric element. | 01-17-2013 |
20140132658 | IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD - An image forming apparatus includes a pretreatment unit to apply a pretreatment liquid on a recording medium before an image is formed on the recording medium, a posttreatment unit to apply a posttreatment liquid on the recording medium after the image is formed on the recording medium, and a dry unit to dry the image formed on the recording medium and the posttreatment liquid. The pretreatment unit controls an applying amount of the pretreatment liquid based on resolution of the image to be formed on the recording medium, the posttreatment unit controls an applying amount of the posttreatment liquid based on the resolution of the image to be formed on the recording medium, and the dry unit controls drying strength based on the resolution of the image to be formed on the recording medium. | 05-15-2014 |
20140253651 | IMAGE FORMING APPARATUS, IMAGE FORMING SYSTEM, IMAGE FORMING METHOD AND PRINTING METHOD OF PRINTED MATTER - An image forming apparatus discharges ink onto a recording medium to form an image on a surface of the recording medium. The image forming apparatus includes a preprocessing unit that applies preprocess liquid on the surface of the recording medium before the image is formed; and a postprocessing unit that applies postprocess liquid, which is different from the preprocess liquid, onto the recording medium after the image is formed. An application quantity of the preprocess liquid is determined based at least on a kind of the ink, and an application quantity of the postprocess liquid is determined based at least on the kind of the ink. | 09-11-2014 |
20150056423 | IMAGE FORMING APPARATUS, IMAGE FORMING METHOD, AND METHOD OF MANUFACTURING PRINTED MATTER - An image forming apparatus discharging liquid droplets onto a recording medium to form an image on a surface of the recording medium, includes a preprocess unit configured to apply a preprocess liquid to the surface of the recording medium before the image is formed; and a postprocess unit configured to discharge a postprocess liquid onto the surface of the recording medium after the image has been formed, the postprocess liquid being different from the preprocess liquid. The preprocess unit applies the preprocess liquid with an amount of the preprocess liquid determined based on at least image forming speed of the image to be formed on the recording medium. The postprocess unit discharges the postprocess liquid with an amount of the postprocess liquid determined based on at least the image forming speed. | 02-26-2015 |
Patent application number | Description | Published |
20130262813 | STORAGE CONTROL APPARATUS, STORAGE SYSTEM, AND STORAGE CONTROL METHOD - In a storage control apparatus, an acquiring unit acquires first information indicating the frequency of random access to a first logical region and second information indicating the data size of random access, based on the content of access from the information processing apparatus. A controlling unit determines the size of storage areas to be allocated to a second logical region based on the second information indicating the data size of random access when the first information, indicates that the frequency of random access is equal to or greater than a threshold value. The controlling unit creates the second logical region using a plurality of storage devices. The controlling unit controls access from the information processing apparatus such that the access is made to the second logical region instead of the first logical region. | 10-03-2013 |
20140082412 | STORAGE CONTROL SYSTEM, RECORDING MEDIUM STORING RECOVERY PROGRAM, AND METHOD - A storage control system includes: storage units each including a first storage area storing information and a second storage area storing management information that contains attribute information of partition information indicating how information is stored in partitions obtained by partitioning the first storage area; an obtaining unit to obtain the management information from the plurality of storage units; a determination unit to determine whether abnormal management information is present in the obtained management information by comparing the obtained management information with itself; and a recovery unit to reconfigure, when it is determined there is the abnormal management information, for each unit of partition, information stored in the first storage area of the storage unit from which the abnormal management information has been obtained by using one of the storage units from which normal management information has been obtained, based on attribute information of the normal management information in each partition. | 03-20-2014 |
20150347124 | FIRMWARE UPDATE APPARATUS AND STORAGE CONTROL APPARATUS - A storage unit stores information on the compatibility between different versions of firmware used for controlling two redundant modules provided in a storage apparatus. Upon updating firmware of the modules from a first version to a second version incompatible with the first version, a computing unit applies, alternately to one of the modules, firmware of a version that is one of versions from the first version to the second version, that is compatible with firmware of a version currently applied to the other one of the modules, and that is more recent than the version currently applied to the other one of the modules, by referring to the information. | 12-03-2015 |
20160062761 | STORAGE DEVICE AND METHOD OF UPDATING FIRMWARE - A storage device includes first and second data transceivers connected to an upper level device through first and second paths, respectively, and a third processor. The first data transceiver includes a first processor configured to perform an access control of a first logical memory group by executing first firmware. The second data transceiver performs an access control of a second logical memory group. The third processor is configured to change, when all of logical memories included in the first logical memory group are included in the second logical memory group, recommendation levels of the first path and the second path such that a first recommendation level of the first path is lower than a second recommendation level of the second path if the first recommendation level is higher than or equal to the second recommendation level, and update the first firmware when no data is flowing through the first path. | 03-03-2016 |
Patent application number | Description | Published |
20090267686 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block. | 10-29-2009 |
20090322402 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device provided with a first circuit block BLK | 12-31-2009 |
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20110068826 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block. | 03-24-2011 |
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20120187981 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided. | 07-26-2012 |
20130228939 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided. | 09-05-2013 |
20140167819 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH INDEPENDENT POWER DOMAINS - A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided. | 06-19-2014 |
20150295572 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided. | 10-15-2015 |