Yao-Hong
Yao-Hong Liu, Taipei City TW
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20100195765 | RADIO FREQUENCY MODULATING CIRCUIT, AND TRANSMITTER HAVING THE SAME - A radio frequency modulating circuit of a transmitter includes a phase multiplexer including a plurality of phase followers each coupled to a selector and operating in accordance with a corresponding pair of complementary-level carrier signals received thereby. The selector is operable to enable conduction of one of the phase followers therethrough in response to a data sequence modulated from a data stream by a phase shift keying modulating circuit. A conversion amplifier is operable in accordance with the complementary-level carrier signals of a conducting one of the phase followers so as to output a phase-modulated output corresponding to the data stream. The phase-modulated output is amplified by a power amplifier and is transmitted through an antenna. | 08-05-2010 |
20110133801 | PULSE WIDTH DIGITIZING METHOD AND PULSE WIDTH DIGITIZER USING THEREOF - A pulse width (PW) digitizer comprises a current pump, a capacitor, a quantizer, a feedback controller, and a digital filter. The current pump provides a current signal in response to a PW signal. The capacitor obtains a voltage signal in response to the current signal. The quantizer obtains a digital signal in response to the voltage signal. The feedback controller determines a feedback PW signal in response to the digital signal. The feedback PW signal is fed back to the current pump for controlling the current signal converging to a specific value and controlling the digital signal switching between a first code and a second code. The digital filter counts times that the digital signal indicating the first code/the second code and accordingly obtains the PW of the PW signal. | 06-09-2011 |
Yao-Hong Liu, Taipei TW
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20080297269 | FREQUENCY SHIFT KEYING MODULATOR HAVING SIGMA-DELTA MODULATED PHASE ROTATOR - A frequency shift keying modulator having sigma-delta modulated phase rotator is disclosed, which includes a phase-locked loop for generating a voltage-controlled signal; a multi-phase generator for receiving the voltage-controlled signal and generating N phase-shift signals having same frequency according to the voltage-controlled signal, the N phase-shift signals having a same phase shift between the phase-shift signals adjacent to each other; a sigma-delta modulator for receiving transmission data and randomly outputting a modulation bit at a modulation clock according to the transmission data; and a phase rotator for receiving the N phase-shift signals and selectively outputting one of the N phase-shift signals and a frequency-divided signal according to the modulation bit, wherein the frequency of the frequency-divided signal is 1/(1+n/N) of the frequency of any one of the N phase-shift signals. | 12-04-2008 |
20120177150 | RECEIVER - A receiver comprises an input-stage circuit, a filter circuit, an output-stage circuit and a digital control oscillator. The input-stage circuit has a mixer configured for mixing the GFSK signal and a feedback signal to generate an input-stage current signal to the filter circuit. Then the filter circuit filters the input-stage current signal, and converts it into a voltage signal. The output-stage circuit is coupled to the filter circuit, for converting the voltage signal into a digital output data. In addition, the digital control oscillator is coupled to the output-stage circuit, for outputting the feedback signal based on the digital output data. | 07-12-2012 |
Yao-Hong Liu, Sinjhuang TW
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20150137898 | Oscillator Buffer and Method for Calibrating the Same - A buffering circuit for buffering an oscillator signal. The buffering circuit includes a plurality of PMOS and NMOS transistor pairs connected in parallel, each pair having connected gate terminals and connected drain terminals forming an inverter circuit, each pair arranged for receiving via a direct coupling an oscillator signal at its gate terminal, and each pair further being connected with an additional PMOS and NMOS transistor. The buffering circuit also includes a control circuit arranged for receiving an output signal provided by the inverter circuits, for deriving information on the DC level of the output signal, and for adjusting a voltage transfer curve expressing a relationship between a voltage at the input and output of the buffering circuit, by switching on or off the additional PMOS and NMOS transistors based on the derived information | 05-21-2015 |
Yao-Hong Wang, Taipei TW
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20130274665 | DRUG DELIVERY CHIP AND FABRICATING METHOD THEREOF - A drug-delivery chip and a method of fabricating the same are provided. The drug-delivery chip has a main body having at least one drug receiving space individually formed with an opening for storing drugs therein; a thin film for sealing up the at least one drug receiving space; a first conductive wire connecting to one end of the thin film; a second conductive wire connecting to another end of the thin film; a signal-receiving module for receiving actuated signals; and a control module for applying voltages to first and second wire conductive s according to the actuated signal, thereby generating heat to break off the thin film for the release of a drug or drugs received in the at least one drug receiving space. | 10-17-2013 |