| Patent application number | Description | Published |
|---|
| 20080309535 | Feedforword Sigma-Delta Ad Converter with an Optimized Built-In Filter Function - The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path ( | 12-18-2008 |
| 20080309536 | Analog-to-Digital Converter of the Sigma Delta Type - An analog-to-digital converter (ADC | 12-18-2008 |
| 20100062721 | SYSTEM AND METHOD FOR PROCESSING A RECEIVED SIGNAL - In a method for processing a signal received by a receiver, at a first wireless receiver ( | 03-11-2010 |
| 20100219997 | CONTINUOUS-TIME SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH CAPACITOR AND/OR RESISTANCE DIGITAL SELF-CALIBRATION MEANS FOR RC SPREAD COMPENSATION - A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) comprising at least one combiner (C | 09-02-2010 |
| 20100291891 | IMPROVEMENTS IN OR RELATING TO RADIO RECEIVERS - A radio receiver comprises an input ( | 11-18-2010 |
| 20110002424 | METHOD OF OPERATING A MULTI-STREAM RECEPTION SCHEME - A method of operating a multi-stream reception scheme, such as DOCSIS (Data Over Cable Service Interface Specifications), comprising at least two receivers ( | 01-06-2011 |
| 20110032067 | 8-SHAPED INDUCTOR - In a first aspect, the invention provides to a device comprising a substrate and an electrical conductor arranged between two terminals (A, B) and shaped for forming an inductor comprising at least two loops ( | 02-10-2011 |
| 20110148467 | PHASE-DETECTOR FOR DETECTING PHASE DIFFERENCE OF [PI]2N - A basic symmetric Π/2 phase-detector receives four control signals that control a differential current at the detector's output. Each respective control signal is a linear combination of a respective pair of signals chosen from a first input signal, its logic complement, a second input signal and the logic complement of the latter. Operation is based on time-averaging the differential current, the result being zero at a phase difference of Π/2. By means of adding one or more additional current sources to the output, controlled by one or more of the control signals, the basic operation is skewed. The time-averaged output current is now made zero only at a value of the phase difference different from Π/2. In an embodiment with uniform current sources and resistors, the modified detector is configured for a phase difference of Π/2 | 06-23-2011 |
