Yamada, CA
Akio Yamada, Cupertino, CA US
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20110131578 | SYSTEMS AND METHODS FOR CHANGING COMPUTATIONAL TASKS ON COMPUTATION NODES TO MINIMIZE PROCESSING TIME VARIATION - Systems and methods are disclosed to process streaming data units (tuples) for an application using a plurality of processing units, the application have a predetermined processing time requirement, by changing an operator-set applied to the tuple by a processing unit, on a tuple-by-tuple basis; estimating code requirement for potential operators based on processing unit capability; and assigning the potential operators to the processing units. | 06-02-2011 |
Alyson Marie Yamada, Stanford, CA US
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20150128980 | Stylus For Cosmetics, Nail Polish Applicator and Systems and Kits Based Thereon - A stylus for use in the application of a cosmetic includes a wand member having a beveled end with a bevel angle and a second end opposite the beveled end; a cup member having beveled end with the bevel angle and second end opposite the beveled end; a connection member comprising one of a magnet or a metallic material, the connection member being fixably attached to the second end of the cup member; and a protrusion extending from the end face of the second end of the cup member; wherein the wand member and cup member are rotatably connected along an axis of rotation at their respective beveled ends. | 05-14-2015 |
Douglas Yamada, Los Angeles, CA US
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20100092979 | METHODS AND COMPOSITIONS FOR ISOLATING NUCLEIC ACID - The present invention relates to compositions and methods for isolating and purifying nucleic acid. In particular, the present invention relates to methods of isolating nucleic acid from cells for use in further analysis. | 04-15-2010 |
20120231466 | METHODS AND COMPOSITIONS FOR ISOLATING NUCLEIC ACID - The present invention relates to compositions and methods for isolating and purifying nucleic acid. In particular, the present invention relates to methods of isolating nucleic acid from cells for use in further analysis. | 09-13-2012 |
Hirotomo Yamada, Torrance, CA US
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20150314811 | VEHICLE BODY FRONT STRUCTURE FOR AUTOMOBILE - In a vehicle front structure, without increasing the thickness of the material of a damper housing structure and reinforcement portions, an adequate mechanical strength in supporting the damper can be ensured, and the cost of the manufacturing facilities can be minimized. The damper housing structure is formed by a damper base, a damper housing main body, a front reinforcement portion and a rear reinforcement portion, and the damper base. Each of the damper housing main body, the front reinforcement portion and the rear reinforcement portion includes a closed cross section portion extending linearly with a same cross section. | 11-05-2015 |
Ichiro Yamada, San Carlos, CA US
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20110096471 | MOBILE DEVICE SHUTTER DOOR - A mobile device has a first portion and a second portion. The first portion includes a body and a first magnet member. The second portion may be movably connected with the first portion and includes a body, a shutter door and a second magnet member. An opening is defined in the body of the second portion and the shutter door is operable to move from an open position to a closed position to cover at least a portion of the opening when the shutter door. The second magnet member is connected to the shutter door so that, when the second magnet member is aligned with the first magnet member, the shutter door is positioned in the closed position. | 04-28-2011 |
20120027224 | Acoustic System for Slide-Type Mobile Device - A mobile device comprises a housing including a bottom section and a top section slidably connected to the bottom section so as to be movable relative to the bottom section between closed and open positions. A speaker disposed within the bottom section of the housing. An acoustic port extends from the speaker in the bottom section of the housing and through the top section of the housing to project sound produced by the speaker toward the front of the mobile device. | 02-02-2012 |
Ichiro Yamada, Del Mar, CA US
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20110149484 | KEYBOARD AND DISPLAY SCREEN IN SEPARATE HOUSINGS CONNECTED BY CAM ASSEMBLIES THAT TILT RESPONSIVE TO MOVEMENT BETWEEN THE HOUSINGS - An electronic device includes separate housings, one includes a keyboard and the other includes a display screen, a pair of cam assemblies and a pair of actuator arms. Each cam assembly has first and second connection parts that are rotationally connected, and are configured so that the first and second connection parts tilt relative to each other responsive to rotation of one relative to the other. The first connection parts of both cam assemblies are connected to spaced apart locations on the first housing. The actuator arms are connected on one end to spaced apart locations on the second housing and are connected on the other end to different ones of the second connection parts of both cam assemblies. Relative movement of the first and second housings rotates the first connection part relative to the second connection part of both cam assemblies and tilts the first housing relative to the second housing. | 06-23-2011 |
20110164352 | DOUBLE SLIDING MECHANISM FOR USER DEVICES - A sliding mechanism including a first base member including a first slider mechanism having a first range of motion; a second base member including a second slider mechanism having a second range of motion; and a synchronization linker that links the first range of motion associated with the first slider mechanism during a sliding operation and the second range of motion associated with the second slider mechanism during the sliding operation, wherein a coupling of the first range of motion and the second range of motion during the sliding operation causes the first base member to gradually arc away and tilt from the second base member. | 07-07-2011 |
20120157171 | DOUBLE-FOLDED FLEXIBLE PRINTED CIRCUIT BOARD FOR SLIDER DEVICES - A sliding mechanism comprising a double-folded flexible printed circuit board (FPC); a stiffener coupled to the double-folded FPC; first pins; second pins; and an opening defined by a first cover, wherein when the double-folded FPC and the stiffener move, within the opening, in synchronization along a first range of motion to an open position of the slider mechanism, the stiffener makes contact with the first pins at the open position, and when the double-folded FPC and the stiffener move, within the opening, in synchronization along a second range of motion to a closed position of the slider mechanism, the stiffener makes contact with the second pins at the closed position. | 06-21-2012 |
Jason M. Yamada, Rolling Hills Estates, CA US
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20100274300 | Bone grafting material packing instrument - A bone graft material condensing instrument comprising a longitudinally extending handle and a laterally extending distal head having an upper surface bounded by vertically extending substantially flat sides and a flat horizontally extending lower surface. | 10-28-2010 |
20110117519 | Sinus membrane lifting and lateral separation instrument - A sinus membrane lifting instrument comprising a longitudinally extending handle portion, an angled neck extending longitudinally from the handle portion and a disc-shaped tip extending from the angled neck, the angled neck including means for sensing tension in a sinus membrane as it is being lifted by the instrument from its bony support floor. | 05-19-2011 |
20110160780 | Bone breaking instrument - In an internal sinus manipulation procedure for augmenting bone of a dental patient between a bony floor of the patient's sinus and a raised portion of the patient's sinus membrane, a process for removing bone fragments extending laterally into an upward channel adjacent its upper end comprising selecting a bone breaking instrument including longitudinally elongated handle and a laterally extending head secured to an upper end of the handle and including a substantially flat lower surface that is inclined upwardly and laterally toward the handle at an angle of less that 90 degrees, inserting the selected instrument upward into the channel with the head of the instrument above a bone fragment and with its flat lower surface hooking over the fragment and pulling down on the handle to break off the bone fragment. | 06-30-2011 |
20110230921 | Bone grafting material packing instrument - In an internal sinus manipulation procedure for augmenting bone of a dental patient between a bony floor of the patient's sinus and a raised portion of the patient's sinus membrane, employing a bone graft material condensing instrument comprising a longitudinally extending handle and a laterally extending distal head having an upper surface bounded by vertically extending substantially flat sides and a flat horizontally extending lower surface and placed within the raised portion of the patient's sinus membrane to condense a previously placed bone graft forming material upon a turning thereof. | 09-22-2011 |
John A. Yamada, San Lorenzo, CA US
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20100228538 | COMPUTATIONAL LINGUISTIC SYSTEMS AND METHODS - An apparatus and corresponding method are disclosed for selecting and managing morphological, syntactic and semantic information found in natural languages using a reduced instruction set grammar (RISG). The apparatus and corresponding method 1) convert natural language inputs into morphological tokens and stores those tokens, 2) convert morphological tokens into syntactic groups and stores those groups, and/or 3) convert syntactic groups into semantic blocks and stores those blocks, and vice versa. The process can start with text and find the corresponding morphological tokens, syntactic groups and/or semantic blocks or start with semantic block(s) and find the corresponding morphological tokens. | 09-09-2010 |
Koichi Yamada, Los Gatos, CA US
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20090006793 | Method And Apparatus To Enable Runtime Memory Migration With Operating System Assistance - In a method for switching to a spare memory module during runtime, a processing system determines that utilization of an active memory module in the processing system should be discontinued. The processing system may then activate a mirror copy mode that causes a memory controller in the processing system to copy data from the active memory module to the spare memory module when the data is accessed in the active memory module. An operating system (OS) in the processing system may then access data in the active memory module to cause the memory controller to copy data from the active memory module to the spare memory module. The processing system may then reconfigure the memory controller to direct reads and writes to the spare memory module instead of the active memory module. Other embodiments are described and claimed. | 01-01-2009 |
20090007121 | Method And Apparatus To Enable Runtime Processor Migration With Operating System Assistance - In a method for switching to a spare processor during runtime, a processing system determines that execution should be migrated off of an active processor. An operating system (OS) scheduler and at least one device are then paused, and the active processor is put into an idle state. State data from writable and substantial non-writable stores in the active processor is loaded into the spare processor. Interrupt routing table logic for the processing system is dynamically reprogrammed to direct external interrupts to the spare processor. The active processor may then be off-lined, and the device and OS scheduler may be unpaused or resumed. Threads may then be dispatched to the spare processor for execution. Other embodiments are described and claimed. | 01-01-2009 |
20100011187 | Performance enhancement of address translation using translation tables covering large address spaces - An embodiment of the present invention is a technique to enhance address translation performance. A register stores capability indicators to indicate capability supported by a circuit in a chipset for address translation of a guest physical address to a host physical address. A plurality of multi-level page tables is used for page walking in the address translation. Each of the page tables has page table entries. Each of the page table entries has at least an entry specifier corresponding to the capability indicated by the capability indicators. | 01-14-2010 |
20100332721 | OPERATING SYSTEM VIRTUAL MEMORY MANAGEMENT FOR HARDWARE TRANSACTIONAL MEMORY - Operating system virtual memory management for hardware transactional memory. A method may be performed in a computing environment where an application running on a first hardware thread has been in a hardware transaction, with transactional memory hardware state in cache entries correlated by memory hardware when data is read from or written to data cache entries. The data cache entries are correlated to physical addresses in a first physical page mapped from a first virtual page in a virtual memory page table. The method includes an operating system deciding to unmap the first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction. | 12-30-2010 |
20110145552 | Handling Operating System (OS) Transitions In An Unbounded Transactional Memory (UTM) Mode - In one embodiment, the present invention includes a method for receiving control in a kernel mode via a ring transition from a user thread during execution of an unbounded transactional memory (UTM) transaction, updating a state of a transaction status register (TSR) associated with the user thread and storing the TSR with a context of the user thread, and later restoring the context during a transition from the kernel mode to the user thread. In this way, the UTM transaction may continue on resumption of the user thread. Other embodiments are described and claimed. | 06-16-2011 |
20110153307 | Transitioning From Source Instruction Set Architecture (ISA) Code To Translated Code In A Partial Emulation Environment - In one embodiment, a processor can operate in multiple modes, including a direct execution mode and an emulation execution mode. More specifically, the processor may operate in a partial emulation model in which source instruction set architecture (ISA) instructions are directly handled in the direct execution mode and translated code generated by an emulation engine is handled in the emulation execution mode. Embodiments may also provide for efficient transitions between the modes using information that can be stored in one or more storages of the processor and elsewhere in a system. Other embodiments are described and claimed. | 06-23-2011 |
20110167416 | SYSTEMS, APPARATUSES, AND METHODS FOR A HARDWARE AND SOFTWARE SYSTEM TO AUTOMATICALLY DECOMPOSE A PROGRAM TO MULTIPLE PARALLEL THREADS - Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. In some embodiments, the systems and apparatuses execute a method of original code decomposition and/or generated thread execution. | 07-07-2011 |
20120284485 | OPERATING SYSTEM VIRTUAL MEMORY MANAGEMENT FOR HARDWARE TRANSACTIONAL MEMORY - Operating system virtual memory management for hardware transactional memory. A system includes an operating system deciding to unmap a first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction. | 11-08-2012 |
20130198458 | TRANSITIONING FROM SOURCE INSTRUCTION SET ARCHITECTURE (ISA) CODE TO TRANSLATED CODE IN A PARTIAL EMULATION ENVIRONMENT - In one embodiment, a processor can operate in multiple modes, including a direct execution mode and an emulation execution mode. More specifically, the processor may operate in a partial emulation model in which source instruction set architecture (ISA) instructions are directly handled in the direct execution mode and translated code generated by an emulation engine is handled in the emulation execution mode. Embodiments may also provide for efficient transitions between the modes using information that can be stored in one or more storages of the processor and elsewhere in a system. Other embodiments are described and claimed. | 08-01-2013 |
20130283249 | INSTRUCTION AND LOGIC TO PERFORM DYNAMIC BINARY TRANSLATION - A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic binary translation. The method may comprise executing original software code compiled targeting a first instruction set, using processor hardware to detect a hot spot in the software code and passing control to a binary translation translator, determining a hot spot region for translation, generating the translated code using a second instruction set, placing the translated code in a translation cache, executing the translated code from the translated cache, and transitioning back to the original software code after the translated code finishes execution. | 10-24-2013 |
20130311758 | HARDWARE PROFILING MECHANISM TO ENABLE PAGE LEVEL AUTOMATIC BINARY TRANSLATION - A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation. | 11-21-2013 |
20140019723 | BINARY TRANSLATION IN ASYMMETRIC MULTIPROCESSOR SYSTEM - An asymmetric multiprocessor system (ASMP) may comprise computational cores implementing different instruction set architectures and having different power requirements. Program code for execution on the ASMP is analyzed and a determination is made as to whether to allow the program code, or a code segment thereof to execute on a first core natively or to use binary translation on the code and execute the translated code on a second core which consumes less power than the first core during execution. | 01-16-2014 |
20140245446 | PERFORMING SECURITY OPERATIONS USING BINARY TRANSLATION - In an embodiment, a processor includes a binary translation engine to receive a code segment, to generate a binary translation of the code segment, and to store the binary translation in a translation cache, where the binary translation includes at least one policy check routine to be executed during execution of the binary translation on behalf of a security agent. Other embodiments are described and claimed. | 08-28-2014 |
20140281376 | Creating An Isolated Execution Environment In A Co-Designed Processor - In an embodiment, a processor includes a binary translation (BT) container having code to generate a binary translation of a first code segment and to store the binary translation in a translation cache, a host entity logic to manage the BT container and to identify the first code segment, and protection logic to isolate the BT container from a software stack. In this way, the BT container is configured to be transparent to the software stack. Other embodiments are described and claimed. | 09-18-2014 |
20140282587 | MULTI-CORE BINARY TRANSLATION TASK PROCESSING - Embodiments of techniques and systems associated with binary translation (BT) in computing systems are disclosed. In some embodiments, a BT task to be processed may be identified. The BT task may be associated with a set of code and may be identified during execution of the set of code on a first processing core of the computing device. The BT task may be queued in a queue accessible to a second processing core of the computing device, the second processing core being different from the first processing core. In response to a determination that the second processing core is in an idle state or has received an instruction through an operating system to enter an idle state, at least some of the BT task may be processed using the second processing core. Other embodiments may be described and/or claimed. | 09-18-2014 |
20150039869 | Handling Operating System (Os) Transitions In An Unbounded Transactional Memory (Utm) Mode - In one embodiment, the present invention includes a method for receiving control in a kernel mode via a ring transition from a user thread during execution of an unbounded transactional memory (UTM) transaction, updating a state of a transaction status register (TSR) associated with the user thread and storing the TSR with a context of the user thread, and later restoring the context during a transition from the kernel mode to the user thread. In this way, the UTM transaction may continue on resumption of the user thread. Other embodiments are described and claimed. | 02-05-2015 |
20150067763 | HARDWARE AND SOFTWARE EXECUTION PROFILING - Technologies for assembling an execution profile of an event are disclosed. The technologies may include monitoring the event for a branch instruction, generating a callback to a security module upon execution of the branch instruction, filtering the callback according to a plurality of event identifiers, and validating a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction. | 03-05-2015 |
20150095590 | METHOD AND APPARATUS FOR PAGE-LEVEL MONITORING - An apparatus and method for page level monitoring are described. For example, one embodiment of a method for monitoring memory pages comprises storing information related to each of a plurality of memory pages including an address identifying a location for a monitor variable for each of the plurality of memory pages in a data structure directly accessible only by a software layer operating at or above a first privilege level; detecting virtual-to-physical page mapping consistency changes or other page modifications to a particular memory page for which information is maintained in the data structure; responsively updating the monitor variable to reflect the consistency changes or page modifications; checking a first monitor variable associated with a first memory page prior to execution of first program code; and refraining from executing the first program code if the first monitor variable indicates consistency changes or page modifications to the first memory page. | 04-02-2015 |
20150095628 | TECHNIQUES FOR DETECTING RETURN-ORIENTED PROGRAMMING - Various embodiments are generally directed to techniques to detect a return-oriented programming (ROP) attack by verifying target addresses of branch instructions during execution. An apparatus includes a processor component, and a comparison component for execution by the processor component to determine whether there is a matching valid target address for a target address of a branch instruction associated with a translated portion of a routine in a table comprising valid target addresses. Other embodiments are described and claimed. | 04-02-2015 |
20150186290 | SYSTEM, APPARATUS, AND METHOD FOR TRANSPARENT PAGE LEVEL INSTRUCTION TRANSLATION - Detailed herein are systems, apparatuses, and methods for transparent page level instruction translation. Exemplary embodiments include an instruction translation lookaside buffer (iTLB), wherein each iTLB entry includes a linear address of a page in memory, a physical address of the page in memory, and a remapping indicator. | 07-02-2015 |
20150268956 | SHARING IDLED PROCESSOR EXECUTION RESOURCES - A processor including a plurality of logical processors, and an instruction set, the instruction set including of one or more instructions which when executed by a first logical processor, cause the first logical processor to make a processor execution resource previously reserved for the first processor available to a second processor in the plurality of processors in response to the first logical processor being scheduled to enter an idle state. | 09-24-2015 |
Koichi Yamada, Santa Clara, CA US
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20130268742 | CORE SWITCHING ACCELERATION IN ASYMMETRIC MULTIPROCESSOR SYSTEM - An asymmetric multiprocessor system (ASMP) may comprise computational cores implementing different instruction set architectures and having different power requirements. Program code executing on the ASMP is analyzed by a binary analysis unit to determine what functions are called by the program code and select which of the cores are to execute the program code, or a code segment thereof. Selection may be made to provide for native execution of the program code, to minimize power consumption, and so forth. Control operations based on this selection may then be inserted into the program code, forming instrumented program code. The instrumented program code is then executed by the ASMP. | 10-10-2013 |
Nazumi Alice Yamada, Santa Clara, CA US
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20140212869 | Nucleic Acid Proximity Assay Involving the Formation of a Three-way junction - Provided herein is a proximity assay that, in certain embodiments, involves: (a) hybridizing a first oligonucleotide and a second oligonucleotide with a target nucleic acid, wherein the first oligonucleotide comprises: i. a region that is complementary to a first sequence in the target nucleic acid and ii. a barcode sequence; and the second oligonucleotide comprises i. a region that is complementary to a second region in the target and ii. the complement of the barcode sequence; and (b) detecting hybridization between the barcode sequence and the complement of the barcode sequence, wherein hybridization between the barcode sequence and the complement of the barcode sequence indicates that the first and second target sequences are proximal to one another in the sample. | 07-31-2014 |
Nazumi Alice Yamada, San Jose, CA US
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20130014295 | METHOD FOR POSITIONING AN ATOMIC FORCE MICROSCOPY TIP IN A CELL - A method for positioning a tip of an atomic force microscope relative to a intracellular target site in a cell is provided. In general terms, the method comprises: a) positioning a fluorescent tip of an atomic force microscope over a cell comprising a fluorescent intracellular target site so that said tip is above target site; b) moving the tip toward said target site while obtaining images of the distal end of said tip and/or the target site using a fluorescence microscope; and c) arresting the movement of the tip when the target site and the distal end of the tip are both in focus in the fluorescence microscope. A microscope system for performing the method is also provided. | 01-10-2013 |
Paul Yamada, Alhambra, CA US
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20140321786 | INTEGRATED CARTRIDGE DOUBLE-ROW BALL BEARING FOR A NUCLEAR REACTOR CONTROL ROD DRIVE MECHANISM - A duplex bearing is configured for use with a nuclear reactor control rod drive mechanism. The duplex includes an outer member and an inner member wherein each defines an interior surface and an exterior surface. The outer member interior surface defines a first and second outer raceway; and the inner member defines a first and second inner raceway. A first plurality of load-carrying rolling elements and a first plurality of spacer rolling elements are disposed in a first annular cavity defined between the first inner raceway and first outer raceway. A second plurality of load-carrying rolling elements and a second plurality of spacer rolling elements are disposed in a second annular cavity defined between the second inner raceway and the second outer raceway. The duplex bearing is configured to operate with sealed de-ionized water exhibiting a temperature in the range of up to about 1200° F. as a sole lubricant. | 10-30-2014 |
Ronald Yamada, Manteca, CA US
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20120041260 | Endoscope gripping device - A gripping device for an endoscope insertion tube utilizing first and second arms that are hingedly attached to one another. Each arm includes an opening to accommodate the insertion tube of an endoscope such that the endoscope insertion tube spans both arms. First and second jaws are associated with first and second arms and are positioned in opposition to one another. The movement of the arms toward one anther causes the jaws to engage the insertion tube which is guided through the arms by the apertures found in the arms. | 02-16-2012 |
Ronald Yamada, Santa Clara, CA US
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20100211834 | DATA INTEGRITY IN MEMORY CONTROLLERS AND METHODS - The present disclosure includes methods, devices, and systems for data integrity in memory controllers. One memory controller embodiment includes a host interface and first error detection circuitry coupled to the host interface. The memory controller can include a memory interface and second error detection circuitry coupled to the memory interface. The first error detection circuitry can be configured to calculate error detection data for data received from the host interface and to check the integrity of data transmitted to the host interface. The second error detection circuitry can be configured to calculate error correction data for data and first error correction data transmitted to the memory interface and to check integrity of data and first error correction data received from the memory interface. | 08-19-2010 |
20130283124 | DATA INTEGRITY IN MEMORY CONTROLLERS AND METHODS - The present disclosure includes methods, devices, and systems for data integrity in memory controllers. One memory controller embodiment includes a host interface and first error detection circuitry coupled to the host interface. The memory controller can include a memory interface and second error detection circuitry coupled to the memory interface. The first error detection circuitry can be configured to calculate error detection data for data received from the host interface and to check the integrity of data transmitted to the host interface. The second error detection circuitry can be configured to calculate error correction data for data and first error correction data transmitted to the memory interface and to check integrity of data and first error correction data received from the memory interface. | 10-24-2013 |
20150220386 | DATA INTEGRITY IN MEMORY CONTROLLERS AND METHODS - The present disclosure includes methods, devices, and systems for data integrity in memory controllers. One memory controller embodiment includes a host interface and first error detection circuitry coupled to the host interface. The memory controller can include a memory interface and second error detection circuitry coupled to the memory interface. The first error detection circuitry can be configured to calculate error detection data for data received from the host interface and to check the integrity of data transmitted to the host interface. The second error detection circuitry can be configured to calculate error correction data for data and first error correction data transmitted to the memory interface and to check integrity of data and first error correction data received from the memory interface. | 08-06-2015 |
Roppei Yamada, Alhambra, CA US
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20130071328 | Propynoic Acid Carbamoyl Methyl-Amides and Pharmaceutical Compositions and Methods Based Thereon - This invention discloses a series of novel propynoic acid carbamoyl methyl-amides (PACMAs), methods for synthesizing the PACMAs and pharmaceutical compositions containing the PACMAs. These novel compounds and compositions show cytotoxicity in cancer cells and are useful as lead compounds for anti-cancer drugs or pharmaceutical agents. This invention also discloses treatment methods that uses the PACMAs and pharmaceutical compositions as well as methods for promoting the release and nuclear localization of the transcription factor Nrf2. | 03-21-2013 |
Taku Yamada, Irvine, CA US
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20110174926 | System and Method for Providing an Integrated User Interface System at a Seat - A light-weight and low-power integrated system module suitable for installation at a passenger seat disposed aboard a passenger vehicle and methods for manufacturing and using same. By integrating selected interface system components with the associated interconnections, the integrated system module provides an intuitive user interface system for interacting with a passenger entertainment system. The integrated system module can be installed within a seatback of the passenger seat that compliments the look and feel of the user interface system, creating an immersive entertainment experience during travel. | 07-21-2011 |
20150227277 | SYSTEM AND METHOD FOR PROVIDING AN INTEGRATED USER INTERFACE SYSTEM AT A SEAT - A light-weight and low-power integrated system module suitable for installation at a passenger seat disposed aboard a passenger vehicle and methods for manufacturing and using same. By integrating selected interface system components with the associated interconnections, the integrated system module provides an intuitive user interface system for interacting with a passenger entertainment system. The integrated system module can be installed within a seatback of the passenger seat that compliments the look and feel of the user interface system, creating an immersive entertainment experience during travel. | 08-13-2015 |
Todd H. Yamada, Los Angeles, CA US
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20090235471 | MULTI-POSITIONABLE ELECTRONIC TOOTHBRUSH - A multi-positionable electronic toothbrush includes a toothbrush body, and a brush head capable of operating at a plurality of angles with respect to said toothbrush body. | 09-24-2009 |
20100017984 | MULTI-POSITIONABLE MANUAL TOOTHBRUSH - A multi-positionable manual toothbrush includes a toothbrush body, a toothbrush head, and a spring capable of engaging the toothbrush head at a plurality of angles with respect to the toothbrush body. | 01-28-2010 |
Tomoo Yamada, Cupertino, CA US
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20140165264 | BRACE FOR PREVENTING SYMPTOMS OF FEMORAL ACETABULAR IMPINGEMENT - Tension members anchored to a wearer's body to resist femoral acetabular impingement (FAI)-causing movements. A first tension member is anchored to the body of a subject, and produces a force on the subject's body to primarily limit the ability of the subject's thigh to internally rotate and the ability of the subject's knee to adduct. Thus, this first tension member resists the tendency of the subject's leg to twist inward or deflect inward, each of which may contribute to FAI. A second tension member is anchored to the subject's body, and provides a force to the subject's body to primarily limit the ability of the subject's hip joint to move in flexion. Thus, the second tension member resists the tendency of the subject's leg to raise too high, which may also contribute to FAI. | 06-19-2014 |