| Patent application number | Description | Published |
| 20080210978 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a gate electrode formed above a semiconductor region; a drain region and a source region formed in portions of the semiconductor region located below sides of the gate electrode in a gate length direction, respectively; a plurality of drain contacts formed on the drain region to be spaced apart in a gate width direction of the gate electrode; and a plurality of source contacts formed on the source region to be spaced apart in the gate width direction of the gate electrode. The intervals between the drain contacts are greater than the intervals between the source contacts. | 09-04-2008 |
| 20090059453 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes an external pad, a ground line, a first protection circuit between the external pad and the ground line, and a second protection circuit between the external pad and the ground line. The second protection circuit is formed by a first protection element, a second protection element, and a resistor. With this structure, the resistance value of the resistor is set to an arbitrary value, so that an unnecessary current which would be generated at the time of power-off of the LSI can be decreased to a value which does not deteriorate the reliability of the LSI. | 03-05-2009 |
| 20100148267 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a well | 06-17-2010 |
| 20100207163 | SEMICONDUCTOR DEVICE INCLUDING ELECTROSTATIC-DISCHARGE PROTECTION CIRCUIT - A semiconductor device includes a protected circuit and an electrostatic-discharge protection circuit. The electrostatic-discharge protection circuit includes a first well of a first conductivity type and a second well of a second conductivity type formed in contact with each other in a semiconductor substrate, a first impurity diffusion layer of the first conductivity type and a third impurity diffusion layer of the second conductivity type formed apart from each other in the first well, and a second impurity diffusion layer of the second conductivity type and a fourth impurity diffusion layer of the first conductivity type formed apart from each other in the second well. The second and the third impurity diffusion layers are formed adjacent to each other interposing an element isolation region provided across a border between the first and the second wells. | 08-19-2010 |
| 20110227197 | SEMICONDUCTOR INTEGRATED CIRCUIT COMPRISING ELECTRO STATIC DISCHARGE PROTECTION ELEMENT - An electro static discharge protection element being formed by a diode including a well region of a first conductivity type on a surface of a semiconductor substrate, and a first diffusion layer of a second conductivity type in the well region. The first diffusion layer is surrounded by a second diffusion layer of the first conductivity type in the well region. The first diffusion layer has a surface on which a first contact region connected to an input/output terminal is formed. The first diffusion layer has a surface on which a second contact region connected to a reference voltage terminal is formed. | 09-22-2011 |
| 20110284963 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a gate electrode formed above a semiconductor region; a drain region and a source region formed in portions of the semiconductor region located below sides of the gate electrode in a gate length direction, respectively; a plurality of drain contacts formed on the drain region to be spaced apart in a gate width direction of the gate electrode; and a plurality of source contacts formed on the source region to be spaced apart in the gate width direction of the gate electrode. The intervals between the drain contacts are greater than the intervals between the source contacts. | 11-24-2011 |
| Patent application number | Description | Published |
| 20090248609 | OPTIMUM ROUTE SEARCHING APPARATUS, METHOD AND PROGRAM - An optimum route searching apparatus, method and program is provided, which make it possible to obtain the optimum cable laying route in a short period of time regardless of the quantity of search data. The optimum route searching apparatus embodied by a computer for searching for an optimum cable laying route, comprising: an external storage device for storing search data comprising information related to a route that has a node as a connection point; simplification means for creating simplified data by extracting, from among the information related to the route, information related to a node constituting a branching point, a bending point and a terminal point; connection information creation means for creating a connection information file of cable laying route based on the simplified data; and searching means for searching for an optimum cable laying route candidate based on the connection information file. | 10-01-2009 |
| 20090309875 | DRAWING GENERATION DEVICE, METHOD AND PROGRAM FOR ELECTRIC CABLE HOUSING COMPONENTS - To make possible using three-dimensional data of electric cable housing components to automatically generate and output a drawing that is simple and useful as two-dimensional data for clearly representing the relationship between upper and lower components. Determination controller | 12-17-2009 |
| 20100094598 | THREE-DIMENSIONAL DATA GENERATION DEVICE, METHOD AND PROGRAM THEREOF - Three-dimensional data can be easily and automatically generated using existing non-three-dimensional data in the form of isometric drawings or the like, without resorting to three-dimensional arrangement adjustment CAD. In three-dimensional data generation unit | 04-15-2010 |
| 20100235147 | GENERATION DEVICE OF THREE-DIMENSIONAL ARRANGEMENT ADJUSTMENT CAD DATA FOR CABLE HOUSING COMPONENTS, AND CONTROL METHOD AND CONTROL PROGRAM FOR SAME - A device even at the time of initial planning of plant design easily and rapidly generates three-dimensional arrangement adjustment CAD data which describes a route for arrangement of cable housing components. An area generation section | 09-16-2010 |
| Patent application number | Description | Published |
| 20090136756 | Nanodisk Comprising Block Copolymer - This invention provides a nanodisk, which can be formed of a wide variety of materials and has a high level of application, and a method for manufacturing the same. The nanodisk comprises fundamental units formed of two-molecule block copolymers arranged in series in a main chain direction, the fundamental units having been aggregated in a plane direction. The nanodisk has a thickness of 1 nm to 100 nm, a diameter of 10 nm to 5 μm, and an aspect ratio of not less than 1. Since the thickness of the nanodisk is not more than 100 nm, the nanodisk is transparent to light in a visible region. Further, when a metal element is held on the crosslinked structure part, the nanodisk can be utilized as a nanodisk having magnetic properties and electroconductive properties, or a nanodisk having catalytic activity and a high refractive index. Thus, the nanodisk can be applied to a wide variety of fields such as fine particle/powder technology, colloid surface science, electronic materials, and optical materials. | 05-28-2009 |
| 20120041150 | INORGANIC - ORGANIC HYBRID PARTICLE AND METHOD FOR PRODUCING THE SAME - An object o of the present invention is to provide an inorganic-organic hybrid particle which has a structure where an organic material composed of two or more different components forms separate phases, wherein an inorganic material is included in the phase, and a method for producing the inorganic-organic hybrid particle. The above object is solved by an inorganic-organic hybrid particle which has a structure where an organic material composed of two or more different components forms separate phases, wherein one or more inorganic materials are included in at least one phase. | 02-16-2012 |
| Patent application number | Description | Published |
| 20080316447 | EXPOSURE APPARATUS AND METHOD OF MANUFACTURING DEVICE - An exposure apparatus the present invention comprises: an illumination optical system configured to illuminate an illumination area on an original with light from a light source; a projection optical system configured to project a pattern of the original onto a substrate; a first stage configured to hold the original; a second stage configured to hold the substrate; and a controller configured to control driving of at least one of the first stage, the second stage, and an optical element which forms the projection optical system so as to reduce variations in imaging characteristics of the projection optical system, based on a dependence of a transmittance of the pattern on a position in the illumination area. | 12-25-2008 |
| 20090153828 | EXPOSURE APPARATUS, EXPOSURE METHOD, AND DEVICE FABRICATION METHOD - The present invention provides an exposure apparatus comprising a projection optical system configured to project a pattern of a reticle onto a substrate, a specifying unit configured to specify a first region on a pupil plane of the projection optical system based on the pattern of the reticle and a shape of an effective light source on the pupil plane of the projection optical system, and an adjusting unit configured to adjust an aberration of the projection optical system, wherein the adjusting unit adjusts the aberration of the projection optical system so that an aberration in the first region specified by the specifying unit becomes smaller than an aberration in a second region on the pupil plane of the projection optical system, which is different from the first region. | 06-18-2009 |
| 20090257035 | EXPOSURE APPARATUS, MEASUREMENT METHOD, STABILIZATION METHOD, AND DEVICE FABRICATION METHOD - The present invention provides an exposure apparatus including a projection optical system configured to project a reticle pattern onto a wafer, a selector configured to select a dummy wafer to be placed near an image plane of the projection optical system, from a plurality of dummy wafers having the same shape as that of the wafer and different reflectance with each other, a transfer unit configured to place the dummy wafer selected by the selector near the image plane of the projection optical system, and a controller configured to perform control such that dummy exposure is performed by irradiating the dummy wafer, which is placed near the image plane of the projection optical system by the transfer unit, with light via the projection optical system. | 10-15-2009 |
| 20090305149 | DUMMY LIGHT-EXPOSED SUBSTRATE, METHOD OF MANUFACTURING THE SAME, IMMERSION EXPOSURE APPARATUS, AND DEVICE MANUFACTURING METHOD - A dummy light-exposed substrate used for dummy light-exposure in an immersion exposure apparatus which exposes a substrate to light via a projection optical system and a liquid, comprises a lyophilic region, and a liquid repellent region surrounding the lyophilic region. | 12-10-2009 |
| 20110212394 | EXPOSURE APPARATUS, MEASUREMENT METHOD, STABILIZATION METHOD, AND DEVICE FABRICATION METHOD - The present invention provides an exposure apparatus including a projection optical system configured to project a reticle pattern onto a wafer, a selector configured to select a dummy wafer to be placed near an image plane of the projection optical system, from a plurality of dummy wafers having the same shape as that of the wafer and different reflectance with each other, a transfer unit configured to place the dummy wafer selected by the selector near the image plane of the projection optical system, and a controller configured to perform control such that dummy exposure is performed by irradiating the dummy wafer, which is placed near the image plane of the projection optical system by the transfer unit, with light via the projection optical system. | 09-01-2011 |
| Patent application number | Description | Published |
| 20080200075 | JOINT CONNECTOR - A joint connector according to the present invention is provided with a circuit board, a male connector having male terminals provided on the circuit board at a predetermined interval and standing in one direction and a direction that crosses the one direction, the male terminals being selectively connected by a copper foil circuit, and a female connector in which female connector elements each having female terminals inserted and interlocked in female terminal holders are stacked, wherein the male connector and the female connector are fit to each other. This achieves cost reduction and improvement in work efficiency in electric wire connection by attaining easy electric wire connection and branching. | 08-21-2008 |
| 20090098778 | JOINT CONNECTOR - A joint connector according to the present invention is provided with a circuit board, a male connector having male terminals provided on the circuit board at a predetermined interval and standing in one direction and a direction that crosses the one direction, the male terminals being selectively connected by a copper foil circuit, and a female connector in which female connector elements each having female terminals inserted and interlocked in female terminal holders are stacked, wherein the male connector and the female connector are fit to each other. This achieves cost reduction and improvement in work efficiency in electric wire connection by attaining easy electric wire connection and branching. | 04-16-2009 |
| 20100186229 | METHOD FOR CONNECTING CONNECTOR TERMINAL - A method is provided for firmly connecting a connector terminal to a flat conductor. This is a method for electrically connecting the pierce terminal | 07-29-2010 |
| 20100197164 | CONNECTION STRUCTURE OF CONNECTING TERMINAL AND METHOD OF CONNECTING THE SAME - An objective is to provide a connection structure of a connecting terminal by which it becomes able to perform a connection of any of pieces for piercing as assuredly without being bended that is piercing through an electrically conductive flat square body, and to provide a method of connecting such the terminal. A unit for connecting a pierced terminal ( | 08-05-2010 |