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Yaari
Gur Yaari, Tel Aviv IL
| Patent application number | Description | Published |
|---|---|---|
| 20100313267 | SYSTEMS AND METHODS FOR EFFICIENT KEYWORD SPOTTING IN COMMUNICATION TRAFFIC - Methods and systems related to keyword searching processes. A list of keywords may be first represented by a set of short substrings. The substrings are selected such that an occurrence of a substring indicates a possible occurrence of one or more of the keywords. Input data may be initially pre-processed, so as to identify locations in the input data in which the substrings occur. Then, the identified locations are searched for occurrences of the actual keywords. The pre-processing scheme enables the keyword search process to search only in the identified locations of the substrings instead of over the entire input data. | 12-09-2010 |
Rona Yaari, New York, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090271671 | APPARATUS AND METHOD FOR IMPROVED TEST CONTROLLABILITY AND OBSERVABILITY OF RANDOM RESISTANT LOGIC - A method for implementing improved observability of random resistant logic included in an integrated circuit (IC) design includes configuring a multiplexer device to pass, to a preexisting storage latch within the design, one of: a signal from one or more observation points within the random resistant logic and an output of first preexisting combinational logic; and selecting a preexisting net within the IC design to generate a randomized logic signal that, in a test mode, is passed to the multiplexer device to serve as a control signal thereto; wherein, in the test mode, the existing storage latch captures data randomly selected from either the existing combinational logic and the one or more observation points and in a normal mode, the existing storage latch captures data from only the existing combinational logic, facilitating random testing of the random resistant logic in a manner that avoids adding latches to the design. | 10-29-2009 |
Yaakov Yaari, Haifa IL
| Patent application number | Description | Published |
|---|---|---|
| 20090133005 | METHOD FOR VALIDATION OF BINARY CODE TRANSFORMATIONS - A method of validating binary code transformation in one aspect includes analyzing original program and transform program. Control flow graphs are generated for both programs. The two graphs are traversed to create respective linear invariant representations. The linear representations are compared to identify incorrect transformations. | 05-21-2009 |
| 20090193402 | Iterative Compilation Supporting Entity Instance-Specific Compiler Option Variations - Optimizing a computer program by setting a first compiler optimization configuration for a first entity of a computer program, setting a second compiler optimization configuration for a second entity of the computer program, where the first and second entities are of the same type and where the first and second compiler optimization configurations differ, and compiling the computer program in accordance with the compiler optimization configurations, thereby creating a compiled program. | 07-30-2009 |
| 20110093682 | METHOD AND APPARATUS FOR PACKING DATA - An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to pack the packed data responsive to a pack instruction received by the decoder. A first packed data element and a second packed data element are received from the first source register. A third packed data element and a fourth packed data element are received from the second source register. The circuit packs packing a portion of each of the packed data elements into a destination register resulting with the portion from second packed data element adjacent to the portion from the first packed data element, and the portion from the fourth packed data element adjacent to the portion from the third packed data element. | 04-21-2011 |