Patent application number | Description | Published |
20100027606 | Adaptive equalization employing pattern recognition - In described embodiments, an adaptive equalizer employed by a receiver in a communication channel, such as Fibre Channel, employs pattern recognition. When a repeating pattern, such as an IDLE or ARBFF pattern, is employed by a standard to, for example, maintain a communication link, an equalizer of the receiver might adaptively set its equalizer parameters based on characteristics of the signal energy of the repeating pattern rather than adaptively set its equalizer parameters based on characteristics of the signal energy of generally random user data carried on the link. Pattern recognition by the receiver allows for maintaining adaptive equalizer parameters at settings preferred for data detection of the typical random data, improving data detection performance of the receiver when the channel transitions from a preset or synchronization repeating pattern to a user random data pattern. | 02-04-2010 |
20100027611 | Adaptive equalization employing pattern recognition - In described embodiments, an adaptive equalizer employed by a receiver in a communication channel, such as Fibre Channel, employs pattern recognition. When a repeating pattern, such as an IDLE or ARBFF pattern, is employed by a standard to, for example, maintain a communication link, an equalizer of the receiver might adaptively set its equalizer parameters based on characteristics of the signal energy of the repeating pattern rather than adaptively set its equalizer parameters based on characteristics of the signal energy of generally random user data carried on the link. Pattern recognition by the receiver allows for maintaining adaptive equalizer parameters at settings preferred for data detection of the typical random data, improving data detection performance of the receiver when the channel transitions from a preset or synchronization repeating pattern to a user random data pattern. | 02-04-2010 |
20100290515 | Multi-Band Gain Adaptation for Receiver Equalization Using Approximate Frequency Separation - A receiver comprises equalization circuitry implementing at least first and second gain adaptation loops associated with respective first and second frequency bands. The equalization circuitry in one aspect is operative to identify a pattern in a portion of a received serial data stream, and to perform gain adaptation for the receiver utilizing a particular one of the gain adaptation loops responsive to the identified pattern. For example, the gain adaptation may be performed utilizing a low frequency gain adaptation loop if the detected pattern is of a first type generally associated with a low frequency band, and may be performed utilizing a high frequency gain adaptation loop if the detected pattern is of a second type generally associated with a high frequency band. In other aspects, the first and second gain adaptation loops may be activated in a particular serial order or in parallel. | 11-18-2010 |
20100329318 | Asynchronous Calibration for Eye Diagram Generation - Techniques are disclosed for asynchronous calibration for eye diagram generation. For example, a method for calibrating a process for generating a data eye associated with a received signal comprises the following steps. Samples of the received signal are obtained for a first unit interval using a first data latch and a roaming latch. A delay offset is determined between the first data latch and the roaming latch by comparing at least one sample obtained using the first data latch and at least one sample obtained using the roaming latch, wherein the delay offset determined by the comparison is used to calibrate the process for generating the data eye associated with the received signal. A similar comparison may be done for a second data latch and used to calibrate the process. The method is able to find the accurate position of each data latch with respect to the roaming latch so as to improve the accuracy of data decoding in a digital receiver, i.e., provide receiver optimization. | 12-30-2010 |
20100329319 | System Optimization Using Soft Receiver Masking Technique - Communication system optimization using a soft receiver masking technique is disclosed. For example, a method for testing a communication device comprises obtaining a software representation of a receiver portion of a given communication device. A data signal received from a transmitter through a given link channel is then processed, wherein the processing step is performed using the software representation of the receiver portion of the communication device. An output signal is caused to be generated by the software representation of the receiver portion. An eye mask test is then applied to the output signal. Based on a result of the eye mask test, one or more parameters of the transmitter may be adjusted. | 12-30-2010 |
20110060433 | BILINEAR ALGORITHMS AND VLSI IMPLEMENTATIONS OF FORWARD AND INVERSE MDCT WITH APPLICATIONS TO MP3 AUDIO - Provided herein are hardware efficient bilinear algorithms and methods to compute MDCT/IMDCT of 2̂n and 4.3̂n points. The algorithms and methods for composite lengths have practical applications in MP3 audio encoding and decoding. The MDT/IMDCT can be converted to type-IV discrete cosine transforms (DCT-IV). Using group theory, the methods decomposes DCT-IV transform kernel matrix into groups of cyclic and Hankel product matrices. Bilinear algorithms are then applied to efficiently evaluate these groups. When implemented in VLSI, bilinear algorithms have improved the critical path delays over existing solutions. For MPEG-1/2 layer III (MP3) audio, proposed herein are several different versions of unified hardware architectures for both the short and long blocks and the forward and inverse transforms. | 03-10-2011 |
20130251007 | Phase Alignment Between Phase-Skewed Clock Domains - In order to compensate for phase offset between different sets of circuitry having different synchronous clock domains, transmit (TX) circuitry of one domain is configured to transmit a pattern signal (e.g., a pseudo random bit sequence) to receive (RX) circuitry of the other domain. The RX circuitry cycles through a number of different phase-shifted RX clock signals to determine which selected clock signals result in valid RX pattern signals. The RX circuitry is then able to select one of the phase-shifted clock signals for use in normal processing of an RX data signal received from the TX circuitry. | 09-26-2013 |
20140025350 | STATISTICAL MODELING BASED ON BIT-ACCURATE SIMULATION OF AN ELECTRONIC DEVICE - Operations of an electronic device are simulated by generating and executing a bit-accurate model of the device using an input signal having at least one transition that corresponds to a step input having a pre-transition value (e.g., 0 for a positive transition) for a specified duration before the transition and a post-transition value (e.g., | 01-23-2014 |