| Patent application number | Description | Published |
| 20090042342 | METHOD FOR CRYSTALLIZATION OF AMORPHOUS SILICON BY JOULE HEATING - The present invention provides a method for preparation of crystallization of amorphous silicon thin film, which comprises providing a forming a amorphous silicon on a dielectric film formed on a transparent substrate; then forming a conductive layer on the top surface of substrate; applying an electric field to the conductive layer so as to generate heat; and crystallization of amorphous silicon thin film by the generated heat. | 02-12-2009 |
| 20100233858 | METHOD OF PREVENTING GENERATION OF ARC DURING RAPID ANNEALING BY JOULE HEATING - Disclosed herein is a rapid annealing method in a mixed structure composed of a heat treatment-requiring material, dielectric layer and conductive layer, comprising that during rapid annealing on a predetermined part of the heat treatment-requiring material, by instantaneously generated intense heat due to Joule heating by application of an electric field to the conductive layer, the potential difference between the heat treatment-requiring material and the conductive layer is set lower than the dielectric break-down voltage of the dielectric layer, thereby preventing generation of arc by dielectric breakdown of the dielectric layer during the annealing. | 09-16-2010 |
| 20100244038 | THIN FILM TRANSISTOR AND FABRICATING METHOD OF THE SAME - Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer of a thin film transistor using a polysilicon layer crystallized by a high temperature heat generated by Joule heating of a conductive layer. As a result, a process can be simplified using a gate line included in the thin film transistor as the conductive layer, and the channel region of the semiconductor layer can be formed of polysilicon having a uniform degree of crystallinity. The thin film transistor includes a straight gate line disposed in one direction, a semiconductor layer crossing the gate line, and source and drain electrodes connected to source and drain regions of the semiconductor layer. | 09-30-2010 |
| 20100270558 | FABRICATING METHOD OF POLYCRYSTALLINE SILICON THIN FILM, POLYCRYSTALLINE SILICON THIN FILM FABRICATED USING THE SAME - Provided are a method of fabricating a polycrystalline silicon thin film using high temperature heat generated by Joule heating induced by application of an electrical field to a conductive layer, which can ensure process stability at high temperature and thus processing time can be reduced and a polycrystalline silicon thin film having excellent crystallinity can be obtained, a polycrystalline thin film using the method and a thin film transistor including the polycrystalline thin film. The method includes providing a substrate, forming a metal or metal alloy layer having a melting point of 13000 C or more on the substrate, forming an insulating layer on the metal or metal alloy layer, forming an amorphous silicon (a-Si) thin film, an amorphous/polycrystalline composite silicon thin film, or a poly-Si thin film on the insulating layer, and applying an electrical filed to the metal or metal alloy layer to induce Joule heating and generate high temperature heat, and crystallizing and annealing the amorphous silicon (a-Si) thin film, the amorphous/polycrystalline composite silicon thin film, or the poly-Si thin film using the high temperature heat. | 10-28-2010 |
| 20100313397 | APPARATUS FOR MANUFACTURING POLYCRYSTALLINE SILICON THIN FILM - Provided is an apparatus for manufacturing a polysilicon thin film by depositing an amorphous silicon thin film and an upper silicon dioxide substrate on a lower silicon dioxide substrate, forming a conductive thin film on the upper silicon dioxide substrate, and applying an electric field and performing Joule heating to crystallize the amorphous silicon thin film, the apparatus comprising power terminals for elastically contacting both upper ends of the conductive thin film and supplying power to the conductive thin film, and support members for elastically supporting the substrate such that the power terminals closely contact both upper ends of the conductive thin film to form a uniform electric field at the conductive thin film. Therefore, it is possible to apply an electric field to a conductive thin film and perform Joule heating to crystallize an amorphous silicon thin film, and support members are installed at both lower surfaces of a silicon dioxide substrate to elastically support the silicon dioxide substrate such that power terminals closely contact both upper ends of the conductive thin film, thereby forming a uniform electric field at the conductive thin film to efficiently perform crystallization within a short time. | 12-16-2010 |
| 20110121308 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - Provided are a thin film transistor including a polycrystalline silicon layer having improved crystallinity by applying Joule heat to form stress gradient in a glass substrate that is disposed under an amorphous silicon layer from a surface to a predetermined depth of the glass substrate, thereby crystallizing the amorphous silicon layer into a polycrystalline silicon layer, and a method of fabricating the same. The film transistor includes a glass substrate having stress gradient from an upper surface to a predetermined depth, a semiconductor layer disposed on the glass substrate, and formed of a polycrystalline silicon layer crystallized by Joule heating, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes disposed on the interlayer insulating layer, and electrically connected to source and drain regions of the semiconductor layer. | 05-26-2011 |
| 20120043017 | Joule Heat Encapsulating Apparatus and Encapsulating Method Using the Same - In a Joule heat encapsulating apparatus and an encapsulating method using the same, a panel is mounted on a stage, the panel including a thermal-hardening type sealant for surrounding and sealing a display unit formed between a first substrate and a second substrate, a heat-generating wiring overlapping the thermal-hardening type sealant, and an electric current application wiring connected to the heat-generating wiring. A cap is employed to form a sealed space, in which the panel is arranged, between the stage and the cap. An exhaustion mechanism for exhausting air in the sealed space, and a power applying mechanism connected to the electric current application wiring for supplying a current to the heat-generating wiring, are provided. As a result, a stable encapsulating structure which prevents permeation of oxygen or moisture may be easily formed. | 02-23-2012 |
| 20120056523 | Flat panel display apparatus and mother substrate for flat panel display apparatus - A flat panel display apparatus includes a first substrate having a display region, a second substrate facing the first substrate and bonded to the first substrate, a groove portion in an edge of at least one of the first substrate and the second substrate, and a wiring portion and a bonding member arranged in the groove portion. The bonding member contacts the wiring portion. The wiring portion is configured to receive power and to supply heat to the bonding member. The bonding member is configured to bond the first substrate and the second substrate using the heat supplied from the wiring portion disposed in the groove portion. | 03-08-2012 |