Patent application number | Description | Published |
20110126408 | Method of making high density interposer and electronic package utilizing same - A method of making an electronic package designed for interconnecting high density patterns of conductors of an electronic device (e.g., semiconductor chip) and less dense patterns of conductors of hosting circuitized substrates (e.g., chip carriers, PCBs). In one embodiment, the method includes bonding a chip to a single dielectric layer, forming a high density pattern of conductors on one surface of the layer, forming openings in the layer and then depositing metallurgy to form a desired circuit pattern which is then adapted for engaging and being electrically coupled to a corresponding pattern on yet another hosting substrate. According to another embodiment of the invention, an electronic package using a dual layered interposer is provided. Also provided are methods of making circuitized substrate assemblies using the electronic packages made using the invention's teachings. | 06-02-2011 |
20110127664 | Electronic package including high density interposer and circuitized substrate assembly utilizing same - An electronic package for interconnecting a high density pattern of conductors of an electronic device (e.g., semiconductor chip) of the package and a less dense pattern of conductors on a circuitized substrate (e.g., PCB), the package including in one embodiment but a single thin dielectric layer (e.g., Kapton) with a high density pattern of openings therein and a circuit pattern on an opposing surface which includes both a high density pattern of conductors and a less dense pattern of conductors. Conductive members are positioned in the openings to electrically interconnect conductors of the electronic device to conductors of the circuitized substrate when the package is positioned thereon. In another embodiment, the interposer includes a second dielectric layer bonded to the first, with conductive members extending through the second layer to connect to the less dense pattern of circuitized substrate conductors. Circuitized substrate assemblies using the electronic packages of the invention are also provided. | 06-02-2011 |
20120015532 | HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME - A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal. | 01-19-2012 |
20120031649 | CORELESS LAYER BUILDUP STRUCTURE WITH LGA AND JOINING LAYER - A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging. | 02-09-2012 |
20120160544 | CORELESS LAYER BUILDUP STRUCTURE WITH LGA - A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging. | 06-28-2012 |
20120160547 | CORELESS LAYER BUILDUP STRUCTURE - A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. | 06-28-2012 |
20120243147 | LAND GRID ARRAY (LGA) CONTACT CONNECTOR MODIFICATION - A method of converting a land grid array (LGA) module to a ball grid array (BGA) module by removing and oxidizing portions of the LGA conductive pad features on the upper surface of the LGA module. A BGA solder ball is deposited on the remaining portion of the conductive feature of the LGA module, with subsequent reflowing of the BGA solder ball. By modifying the LGA module to support a BGA structure, excessive heat generated by components placed on the modified LGA pad can be conducted through the BGA structure and into the element on which the LGA module is attached, such as a PCB. | 09-27-2012 |
20130025839 | THERMAL SUBSTRATE - An organic substrate capable of providing effective heat transfer through its entire thickness by the use of parallel, linear common thermally conductive openings that extend through the substrate, the substrate having thin dielectric layers bonded together to form an integral substrate structure. The structure is adapted for assisting in providing cooling of high temperature electrical components on one side by effectively transferring heat from the components to a cooling structure positioned on an opposing side. Methods of making the substrate are also provided, as is an electrical assembly including the substrate, component and cooling structure. | 01-31-2013 |