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Welc
Adam Welc, San Francisco, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100162247 | METHODS AND SYSTEMS FOR TRANSACTIONAL NESTED PARALLELISM - Methods and systems for executing nested concurrent threads of a transaction are presented. In one embodiment, in response to executing a parent transaction, a first group of one or more concurrent threads including a first thread is created. The first thread is associated with a transactional descriptor comprising a pointer to the parent transaction. | 06-24-2010 |
Adam Welc, Mountain View, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090172303 | HYBRID TRANSACTIONS FOR LOW-OVERHEAD SPECULATIVE PARALLELIZATION - A method and apparatus for a hybrid transactional memory system is herein described. A first transaction is executed utilizing a first style of a transactional memory system and a second transaction is executed in parallel utilizing a second style of a transactional memory system. For example, a main thread is executed utilizing an update-in place Software Transactional Memory (STM) system while a parallel thread, such as a helper thread, is executed utilizing a write buffering STM. As a result, a main thread may directly update memory locations, while a helper thread's transactional writes are buffered to ensure they do not invalidate transactional reads of the main thread. Therefore, parallel execution of threads is achieved, while ensuring at least one thread, such as a main thread, does not degrade below an amount of execution cycles it would take to execute the main thread serially. | 07-02-2009 |
| 20090319753 | HYBRID LINEAR VALIDATION ALGORITHM FOR SOFTWARE TRANSACTIONAL MEMORY (STM) SYSTEMS - A method and apparatus for hybrid validation for a Software Transaction Memory (STM) is herein described. During execution of a transaction, when acquiring ownership of meta-data associated with a data element, the meta-data is updated with an ownership reference to a transaction to enable efficient subsequent ownership tests. However, during validation, for some conditions, meta-data is updated from the ownership reference to a write entry reference to enable efficient validation. | 12-24-2009 |
Adam Wojciech Welc, San Francisco, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100057740 | ACCELERATING A QUIESCENCE PROCESS OF TRANSACTIONAL MEMORY - A method to perform validation of a read set of a transaction is presented. In one embodiment, the method compares a read signature of a transaction to a plurality of write signatures associated with a plurality of transactions. The method determines based on the result of comparison, whether to update a local value of the transaction to a commit value of another transaction from the plurality of the transactions. | 03-04-2010 |
| 20100058344 | ACCELERATING A QUIESCENCE PROCESS OF TRANSACTIONAL MEMORY - A method to perform validation of a read set of a transaction is presented. In one embodiment, the method compares a read signature of a transaction to a plurality of write signatures associated with a plurality of transactions. The method determines based on the result of comparison, whether to update a local value of the transaction to a commit value of another transaction from the plurality of the transactions. | 03-04-2010 |