Patent application number | Description | Published |
20090304774 | IMPLANTABLE DEVICES HAVING CERAMIC COATING APPLIED VIA AN ATOMIC LAYER DEPOSITION METHOD - Substrates coated with films of a ceramic material such as aluminum oxides and titanium oxides are biocompatible, and can be used in a variety of applications in which they are implanted in a living body. The substrate is preferably a porous polymer, and may be biodegradable. An important application for the ceramic-coated substrates is as a tissue engineering scaffold for forming artificial tissue. | 12-10-2009 |
20100151249 | METHODS FOR PREODUCING COATED PHOSPHORS AND HOST MATERIAL PARTICLES USING ATOMIC LAYER DEPOSITION METHODS - Layers of a passivating material and/or containing luminescent centers are deposited on phosphor particles or particles that contain a host material that is capable of capturing an excitation energy and transferring it to a luminescent center or layer. The layers are formed in an ALD process. The ALD process permits the formation of very thin layers. Coated phosphors have good resistance to ambient moisture and oxygen, and/or can be designed to emit a distribution of desired light wavelengths. | 06-17-2010 |
20100215897 | METAL FERRITE SPINEL ENERGY STORAGE DEVICES AND METHODS FOR MAKING AND USING SAME - 1-100 nm metal ferrite spinel coatings are provided on substrates, preferably by using an atomic layer deposition process. The coatings are able to store energy such as solar energy, and to release that stored energy, via a redox reaction. The coating is first thermally or chemically reduced. The reduced coating is then oxidized in a second step to release energy and/or hydrogen, carbon monoxide or other reduced species. | 08-26-2010 |
20100218491 | METAL FERRITE SPINEL ENERGY STORAGE DEVICES AND METHODS FOR MAKING AND USING SAME - 1-100 nm metal ferrite spinel coatings are provided on substrates, preferably by using an atomic layer deposition process. The coatings are able to store energy such as solar energy, and to release that stored energy, via a redox reaction. The coating is first thermally or chemically reduced. The reduced coating is then oxidized in a second step to release energy and/or hydrogen, carbon monoxide or other reduced species. | 09-02-2010 |
20100326322 | TITANIUM DIOXIDE PARTICLES COATED VIA AN ATOMIC LAYER DEPOSITION PROCESS - Titanium dioxide particles are coated first with an interstitial coating and then with silicon dioxide or alumina. The coatings are suitably applied via an atomic layer deposition process. The interstitial coating preserves the bright white coloration of the particles after they are coated. The particles therefore can be used as pigments and white fillers in polymers, paints, paper and other applications. | 12-30-2010 |
20110193026 | SOLAR-THERMAL REACTION PROCESSING - In an embodiment, a method of conducting a high temperature chemical reaction that produces hydrogen or synthesis gas is described. The high temperature chemical reaction is conducted in a reactor having at least two reactor shells, including an inner shell and an outer shell. Heat absorbing particles are included in a gas stream flowing in the inner shell. The reactor is heated at least in part by a source of concentrated sunlight. The inner shell is heated by the concentrated sunlight. The inner shell re-radiates from the inner wall and heats the heat absorbing particles in the gas stream flowing through the inner shell, and heat transfers from the heat absorbing particles to the first gas stream, thereby heating the reactants in the gas stream to a sufficiently high temperature so that the first gas stream undergoes the desired reaction(s), thereby producing hydrogen or synthesis gas in the gas stream. | 08-11-2011 |
20110236575 | Semi-Continuous Vapor Deposition Process for the Manufacture of Coated Particles - A reactor for conducting vapor phase deposition process is disclosed. The reactor includes a reactive precursor reservoir beneath a powder reservoir and separated from it by valve means. A reactive precursor is charged into the reactive precursor reservoir and a powder is charged into the powder reservoir. The pressures are adjusted so that the pressure in the reactive precursor reservoir is higher than that of the powder reservoir. The valve means is opened, and the vapor phase reactant fluidized the powder and coats its surface. The powder falls into the reactive precursor reservoir. The apparatus permits vapor phase deposition processes to be performed semi-continuously. | 09-29-2011 |
20120160095 | Novel Nanoporous Supported Lyotropic Liquid Crystal Polymer Membranes and Methods of Preparing and Using Same - The invention includes a nanoporous LLC polymer membrane wherein ultra-thin films or clusters of inorganic material are deposited inside the porous structure of the LLC polymer membrane. The membranes of the invention have high levels of pore size uniformity, allowing for size discrimination separation, and may be used for separation processes such as gas-phase and liquid-phase separations. | 06-28-2012 |
20120199793 | Methods for producing coated phosphors and host material particles using atomic layer deposition methods - Layers of a passivating material and/or containing luminescent centers are deposited on phosphor particles or particles that contain a host material that is capable of capturing an excitation energy and transferring it to a luminescent center or layer. The layers are formed in an ALD process. The ALD process permits the formation of very thin layers. Coated phosphors have good resistance to ambient moisture and oxygen, and/or can be designed to emit a distribution of desired light wavelengths. | 08-09-2012 |
20120201860 | Ultra-thin metal oxide and carbon-metal oxide films prepared by atomic layer deposition (ALD) - Ultra-thin porous films are deposited on a substrate in a process that includes laying down an organic polymer, inorganic material or inorganic-organic material via an atomic layer deposition or molecular layer deposition technique, and then treating the resulting film to introduce pores. The films are characterized in having extremely small thicknesses of pores that are typically well less than 50 nm in size. | 08-09-2012 |
20130266502 | METHODS AND APPARATUS FOR GAS-PHASE REDUCTION/OXIDATION PROCESSES - A method and apparatus for gas-phase reduction/oxidation is disclosed. The apparatus includes a reactor including at least one reactor tube or containment vessel with active redox material within the reactor tube or containment vessel, a first reactant gas or vacuum for reducing the active redox material, and a second reactant gas for oxidizing the active redox material. The method may be run under substantially isothermal conditions and/or energy supplied to the apparatus may include solar energy, which may be concentrated. | 10-10-2013 |
20130341175 | THERMAL TREATMENT SYSTEM AND METHOD - A improved solar biochar reactor, system including the reactor, and methods of forming and using the reactors and systems are disclosed. The methods and system as described herein provide sufficient solar energy to a biochar reactor to convert animal waste or other biomass to biochar in a relatively cost-effective manner. | 12-26-2013 |
20140158613 | HIGHLY POROUS CERAMIC MATERIAL AND METHOD OF USING AND FORMING SAME - The present invention generally relates to porous ceramic material and to methods of making and using the material. More particularly, the invention relates to methods of forming ceramic materials by depositing material, using atomic layer deposition, onto a sacrificial substrate and to ceramic materials having controlled wall thickness, relatively large pores, and high surface area by weight. | 06-12-2014 |
20150152549 | VAPOR DEPOSITION PROCESS FOR THE MANUFACTURE OF COATED PARTICLES - A process for conducting vapor phase deposition is disclosed. The process separates a series of reactions through a sequence of reaction reservoirs. The reactor includes a reactive precursor reservoir beneath a powder reservoir separated by valve means. A reactive precursor is charged into the reactive precursor reservoir and a powder is charged into the powder reservoir. The pressures are adjusted so that the pressure in the reactive precursor reservoir is higher than that of the powder reservoir. The valve means is opened, and the vapor phase reactant fluidized the powder and coats its surface. The powder falls into the reactive precursor reservoir. The apparatus permits vapor phase deposition processes to be performed semi-continuously. | 06-04-2015 |
20150259794 | Vapor Deposition Process for the Manufacture of Coated Particles - A process for conducting vapor phase deposition is disclosed. The process separates a series of reactions through a sequence of reaction reservoirs. In some particular embodiments, the reactor includes a reactive precursor reservoir beneath a powder reservoir separated by valve means. A reactive precursor is charged into the reactive precursor reservoir and a powder is charged into the powder reservoir. The pressures are adjusted so that the pressure in the reactive precursor reservoir is higher than that of the powder reservoir. The valve means is opened, and the vapor phase reactant fluidized the powder and coats its surface. The powder falls into the reactive precursor reservoir. The apparatus permits vapor phase deposition processes to be performed semi-continuously. | 09-17-2015 |
Patent application number | Description | Published |
20100208244 | FLASH LADAR SYSTEM - The present invention pertains in general to a single, integrated flash LADAR system and method. The system includes data processing hardware and software, a passive two-dimensional camera, a three-dimensional camera, a light source, and a common optical path. One or more star trackers can also be included. In addition, auxiliary components, such as an inertial measurement unit and a global positioning system receiver can be included. The system can be closely integrated with a critical algorithm suite that operates in multiple modes, in real-time to enable landing, docking, and navigation functions, such as Guidance, Navigation, and Control (GNC), Altimetry, Velocimetry, Terrain Relative Navigation (TRN), Hazard Detection and Avoidance (HDA), and dust penetration. | 08-19-2010 |
20120038903 | ELECTRONICALLY STEERED FLASH LIDAR - Methods and systems for adaptively controlling the illumination of a scene are provided. In particular, a scene is illuminated, and light reflected from the scene is detected. Information regarding levels of light intensity received by different pixels of a multiple pixel detector, corresponding to different areas within a scene, and/or information regarding a range to an area within a scene, is received. That information is then used as a feedback signal to control levels of illumination within the scene. More particularly, different areas of the scene can be provided with different levels of illumination in response to the feedback signal. | 02-16-2012 |
20120044476 | SYSTEMS AND METHODS OF SCENE AND ACTION CAPTURE USING IMAGING SYSTEM INCORPORATING 3D LIDAR - The present invention pertains to systems and methods for the capture of information regarding scenes using single or multiple three-dimensional LADAR systems. Where multiple systems are included, those systems can be placed in different positions about the imaged scene such that each LADAR system provides different viewing perspectives and/or angles. In accordance with further embodiments, the single or multiple LADAR systems can include two-dimensional focal plane arrays, in addition to three-dimensional focal plane arrays, and associated light sources for obtaining three-dimensional information about a scene, including information regarding the contours of the objects within the scene. Processing of captured image information can be performed in real time, and processed scene information can include data frames that comprise three-dimensional and two-dimensional image data. | 02-23-2012 |
Patent application number | Description | Published |
20120033743 | SYSTEM AND METHOD FOR GENERATING CODED VIDEO SEQUENCES FROM STILL MEDIA - The invention provides a system and method that transforms a set of still/motion media (i.e., a series of related or unrelated still frames, web-pages rendered as images, or video clips) or other multimedia, into a video stream that is suitable for delivery over a display medium, such as TV, cable TV, computer displays, wireless display devices, etc. The video data stream may be presented and displayed in real time or stored and later presented through a set-top box, for example. Because these media are transformed into coded video streams (e.g. MPEG-2, MPEG-4, etc.), a user can watch them on a display screen without the need to connect to the Internet through a service provider. The user may request and interact with the desired media through a simple telephone interface, for example. Moreover, several wireless and cable-based services can be developed on the top of this system. In one possible embodiment, the system for generating a coded video sequence may include an input unit that receives the multimedia input and extracts image data, and derives the virtual camera scripts and coding hints from the image data, a video sequence generator that generates a video sequence based on the extracted image data and the derived virtual camera scripts and coding hints, and a video encoder that encodes the generated video sequence using the coding hints and outputs the coded video sequence to an output device. The system may also provide customized video sequence generation services to subscribers. | 02-09-2012 |
20130019274 | System and Method for Sharing Information - A novel mechanism is disclosed by which a sender can direct information such as an audiovisual signal to a particular recipient's audiovisual display device, such as a cable television set and, thereby, share information between the sender and the recipient. In one embodiment, a calling party originates a telephone call and associates that telephone call with audio-visual information that exists on the caller's personal computer or on an Internet server. The called party answers the call, and can tune an associated cable television to the appropriate channel in order to view the audio-visual information. In another embodiment, the caller is a hotel guest and the called party is a hotel concierge and vice versa. The concierge provides information to the hotel guest such that the hotel guest can tune in to a channel on their hotel television set and access the information. | 01-17-2013 |
Patent application number | Description | Published |
20090011361 | AMINE-ARRESTING ADDITIVES FOR MATERIALS USED IN PHOTOLITHOGRAPHIC PROCESSES - Novel, poison-blocking compositions and methods of using those compositions to form poison-blocking layers are provided. The compositions comprise a typical composition used in microlithographic processes, but with a poison-blocking additive included in that composition. The preferred additive is a compound comprising one or more blocked isocyanates. Upon heating to certain temperatures, the blocking group is released from the isocyanate, leaving behind a moiety that is highly reactive with the poisonous amines generated by typical dielectric layers. | 01-08-2009 |
20090317747 | ANTI-REFLECTIVE COATINGS USING VINYL ETHER CROSSLINKERS - Novel, wet developable anti-reflective coating compositions and methods of using those compositions are provided. The compositions comprise a polymer and/or oligomer having acid functional groups and dissolved in a solvent system along with a crosslinker and a photoacid generator. The preferred acid functional group is a carboxylic acid, while the preferred crosslinker is a vinyl ether crosslinker. In use, the compositions are applied to a substrate and thermally crosslinked. Upon exposure to light, the cured compositions will decrosslink, rendering them soluble in typical photoresist developing solutions (e.g., alkaline developers). | 12-24-2009 |
20120156613 | ANTI-REFLECTIVE COATINGS USING VINYL ETHER CROSSLINKERS - Novel, wet developable anti-reflective coating compositions and methods of using those compositions are provided. The compositions comprise a polymer and/or oligomer having acid functional groups and dissolved in a solvent system along with a crosslinker and a photoacid generator. The preferred acid functional group is a carboxylic acid, while the preferred crosslinker is a vinyl ether crosslinker. In use, the compositions are applied to a substrate and thermally crosslinked. Upon exposure to light, the cured compositions will decrosslink, rendering them soluble in typical photoresist developing solutions (e.g., alkaline developers). | 06-21-2012 |
Patent application number | Description | Published |
20130081773 | CASTING MOLD COMPOSITION WITH IMPROVED DETECTABILITY FOR INCLUSIONS AND METHOD OF CASTING - The present disclosure relates to a titanium-containing article casting mold composition comprising calcium aluminate and an X-ray or Neutron-ray detectable element. Furthermore, present embodiments teach a method for detecting sub-surface ceramic inclusions in a titanium or titanium alloy casting by combining calcium aluminate, an element more radiographically dense than the calcium aluminate, and a liquid to form a slurry; forming a mold having the calcium aluminate and the radiographically dense element from the slurry; introducing a titanium aluminide-containing metal to the radiographically dense element-bearing mold; solidifying said titanium aluminide-containing metal to form an article in the mold; removing the solidified titanium aluminide-containing metal article from said mold; subjecting the solidified titanium aluminide-containing article to radiographic inspection to provide a radiograph; and examining said radiograph for the presence of the radiographically dense element on or in the article. | 04-04-2013 |
20130224066 | MOLD AND FACECOAT COMPOSITIONS AND METHODS FOR CASTING TITANIUM AND TITANIUM ALUMINIDE ALLOYS - The disclosure relates generally to mold compositions and methods of molding and the articles so molded. More specifically, the disclosure relates to mold compositions, intrinsic facecoat compositions, and methods for casting titanium-containing articles, and the titanium-containing articles so molded. | 08-29-2013 |
20150224566 | METHODS FOR CASTING TITANIUM AND TITANIUM ALUMINIDE ALLOYS - The disclosure relates generally to mold compositions and methods of molding and the articles so molded. More specifically, the disclosure relates to mold compositions, intrinsic facecoat compositions, and methods for casting titanium-containing articles, and the titanium-containing articles so molded. | 08-13-2015 |
Patent application number | Description | Published |
20110098181 | SYNERGISTIC HERBICIDAL COMPOSITION CONTAINING FLUROXYPYR AND CYHALOFOP, METAMIFOP OR PROFOXYDIM - An herbicidal composition containing (a) fluoroxypyr and (b) cyhalofop, metamifop or profoxydim provides synergistic control of selected weeds particularly on rice. | 04-28-2011 |
20110098182 | SYNERGISTIC HERBICIDAL COMPOSITION CONTAINING FLUROXYPYR AND PENOXSULAM, HALOSULFURON-METHYL, IMAZAMOX OR IMAZETHAPYR - An herbicidal synergistic composition containing (a) fluoroxypyr and (b) an ALS inhibitor herbicide, in which the ALS inhibitor herbicide is penoxsulam, halosulfuron-methyl, imazamox or imazethapyr, provides improved post-emergence weed control in rice, cereal and grain crops, pastures, rangelands, IVM and turf. | 04-28-2011 |
20130130900 | SYNERGISTIC HERBICIDAL COMPOSITION CONTAINING FLUROXYPYR AND PENOXSULAM, HALOSULFURON-METHYL, IMAZAMOX OR IMAZETHAPYR - An herbicidal synergistic composition containing (a) fluoroxypyr and (b) an ALS inhibitor herbicide, in which the ALS inhibitor herbicide is penoxsulam, halosulfuron-methyl, imazamox or imazethapyr, provides improved post-emergence weed control in rice, cereal and grain crops, pastures, rangelands, IVM and turf. | 05-23-2013 |
20140031228 | HERBICIDAL COMPOSITIONS COMPRISING 4-AMINO-3-CHLORO-5-FLUORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL) PYRIDINE-2-CARBOXYLIC ACID OR A DERIVATIVE THEREOF AND ACETYL-CoA CARBOXYLASE (ACCASE) INHIBITORS - Provided herein are synergistic herbicidal compositions containing and methods utilizing (a) a compound of formula (I): | 01-30-2014 |
20140031229 | HERBICIDAL COMPOSITIONS COMPRISING 4-AMINO-3-CHLORO-5-FLUORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL) PYRIDINE-2-CARBOXYLIC ACID OR A DERIVATIVE THEREOF AND TRIAZOLOPYRIMIDINE SULFONAMIDES - Provided herein are synergistic herbicidal compositions containing (a) a compound of formula (I): | 01-30-2014 |
20140066306 | SYNERGISTIC HERBICIDAL COMPOSITION CONTAINING FLUROXYPYR AND PENOXSULAM, HALOSULFURON-METHYL, IMAZAMOX OR IMAZETHAPYR - An herbicidal synergistic composition containing (a) fluroxypyr and (b) an ALS inhibitor herbicide, in which the ALS inhibitor herbicide is penoxsulam, halosulfuron-methyl, imazamox or imazethapyr, provides improved post-emergence weed control in rice, cereal and grain crops, pastures, rangelands, IVM and turf. | 03-06-2014 |
20140194286 | SAFENING OF 4-AMINO-3-CHLORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL)PYRIDINE-2-CARBOXYL- IC ACID AND DERVIATIVES THEREOF ON CEREAL CROPS - Herbicidal injury that might otherwise be caused by 4-amino-3-chloro-6-(4-chloro-2-fluoro-3-methoxyphenyl)pyridine-2-carboxylic acid and agriculturally acceptable salt, ester, and amide derivatives thereof in cereal crops is reduced by concomitant application of florasulam. | 07-10-2014 |
20140213452 | HERBICIDAL COMPOSITIONS COMPRISING 4-AMINO-3-CHLORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL)PYRIDINE-2-CARBOXYL- IC ACID OR A DERIVATIVE THEREOF AND PICLORAM OR A DERIVATIVE THEREOF - Herbicidal compositions and methods using a combination of (a) a compound of formula (I): | 07-31-2014 |
20140213456 | SELECTIVE WEED CONTROL METHODS - 4-Amino-3-chloro-6-(4-chloro-2-fluoro-3-methoxyphenyl)pyridine-2-carboxylic acid and agriculturally acceptable esters or salts thereof are used in methods for selective post-emergent control of undesirable vegetation in the presence of sunflowers, | 07-31-2014 |
20140235443 | HERBICIDAL COMPOSITIONS COMPRISING 4-AMINO-3-CHLORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL)PYRIDINE-2-CARBOXYL- IC ACID OR A DERIVATIVE THEREOF AND PROPYZAMIDE - Herbicidal compositions and methods of controlling undesirable vegetation using a combination of (a) a compound of formula (I): | 08-21-2014 |
20140274704 | SAFENED HERBICIDAL COMPOSITIONS INCLUDING 4-AMINO-3-CHLORO-5-FLUORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL)PYRIDINE-2- -CARBOXYLIC ACID OR A DERIVATIVE THEREOF FOR USE IN CORN (MAIZE) - A safened herbicidal composition for use in corn (maize) including a herbicidally effective amount of (a) a compound of formula (I): | 09-18-2014 |
20150189879 | HERBICIDAL COMPOSITIONS COMPRISING 4-AMINO-3-CHLORO-5-FLUORO-6-(4-CHLORO-2-FLUORO-3-METHOXYPHENYL) PYRIDINE-2-CARBOXYLIC ACID OR A DERIVATIVE THEREOF AND ACETYL-CoA CARBOXYLASE (ACCASE) INHIBITORS - Provided herein are synergistic herbicidal compositions containing (a) a compound of formula (I): 4-amino-3-chloro-5-fluoro-6-(4-chloro-2-fluoro-3-methoxyphenyl)pyridine-2-carboxylic acid or a derivative thereof, or an agriculturally acceptable salt or ester thereof and (b) an ACCase inhibitor, including, e.g., clethodim, clodinafop-propargyl, cyhalofop-R-butyl, diclofop-methyl, fenoxaprop-Pethyl, fluazifop-P-butyl, haloxyfop-R-methyl, metamifop, pinoxaden, profoxydim quizalofop-P-ethyl, sethoxydim and tralkoxydim, provide synergistic weed control of undesirable vegetation in rice, cereals, wheat, barley, oats, rye, sorghum, com/maize, sugarcane, sunflower, oilseed rape, canola, sugar beet, soybean, cotton, pineapple, pastures, grasslands, range-rights of way (ROW). | 07-09-2015 |
Patent application number | Description | Published |
20090057744 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL - Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area. | 03-05-2009 |
20100197131 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL - Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area. | 08-05-2010 |
20120032252 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL - Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area. | 02-09-2012 |
20140159136 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL - Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric material is blanket deposited over the memory cell, and etched to form spacers on sidewalls of the active area. Dielectric material is formed over the active area, a charge trapping structure is formed over the dielectric material over the active area, and a control gate is formed over the charge trapping structure. In some embodiments, the charge trapping structure includes nanodots. In some embodiments, the width of the spacers is between about 130% and about 170% of the thickness of the dielectric material separating the charge trapping material and an upper surface of the active area. | 06-12-2014 |
Patent application number | Description | Published |
20080245301 | Deposition Apparatuses - The invention includes deposition methods and apparatuses which can be utilized during atomic layer deposition or chemical vapor deposition. A heated surface is provided between a stack of semiconductor substrates and a precursor inlet, and configured so that problematic side reactions occur proximate the heated surface rather than proximate the semiconductor substrates. The precursor inlet can be one of a plurality of precursor inlets, and the heated surface can be one of a plurality of heated surfaces. | 10-09-2008 |
20090004794 | USE OF DILUTE STEAM AMBIENT FOR IMPROVEMENT OF FLASH DEVICES - The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation. Thermal budget can be radically conserved by growing thin oxide layers on either side of a nitride layer prior to etching, and enhancing the oxide layers by dilute steam oxidation through the exposed sidewall after etching. The thin oxide layers, like the initial tunnel oxide, serve as diffusion paths to enhance uniform distribution of OH species across the buried interfaces being oxidized. | 01-01-2009 |
20090097320 | Memory Cells, Electronic Systems, Methods Of Forming Memory Cells, And Methods of Programming Memory Cells - Some embodiments include memory cells having vertically-stacked charge-trapping zones spaced from one another by dielectric material. The dielectric material may comprise high-k material. One or more of the charge-trapping zones may comprise metallic material. Such metallic material may be present as a plurality of discrete isolated islands, such as nanodots. Some embodiments include methods of forming memory cells in which two charge-trapping zones are formed over tunnel dielectric, with the zones being vertically displaced relative to one another, and with the zone closest to the tunnel dielectric having deeper traps than the other zone. Some embodiments include electronic systems comprising memory cells. Some embodiments include methods of programming memory cells having vertically-stacked charge-trapping zones. | 04-16-2009 |
20100032746 | USE OF DILUTE STEAM AMBIENT FOR IMPROVEMENT OF FLASH DEVICES - The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation. Thermal budget can be radically conserved by growing thin oxide layers on either side of a nitride layer prior to etching, and enhancing the oxide layers by dilute steam oxidation through the exposed sidewall after etching. The thin oxide layers, like the initial tunnel oxide, serve as diffusion paths to enhance uniform distribution of OH species across the buried interfaces being oxidized. | 02-11-2010 |
20100282164 | METHODS AND SYSTEMS FOR CONTROLLING TEMPERATURE DURING MICROFEATURE WORKPIECE PROCESSING, E.G., CVD DEPOSITION - The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature. | 11-11-2010 |
20110133268 | Memory Cells - Some embodiments include memory cells having vertically-stacked charge-trapping zones spaced from one another by dielectric material. The dielectric material may comprise high-k material. One or more of the charge-trapping zones may comprise metallic material. Such metallic material may be present as a plurality of discrete isolated islands, such as nanodots. Some embodiments include methods of forming memory cells in which two charge-trapping zones are formed over tunnel dielectric, with the zones being vertically displaced relative to one another, and with the zone closest to the tunnel dielectric having deeper traps than the other zone. Some embodiments include electronic systems comprising memory cells. Some embodiments include methods of programming memory cells having vertically-stacked charge-trapping zones. | 06-09-2011 |
20110147826 | Methods Of Forming Memory Cells - Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing and exposure to an ambient that contains one or both of oxygen and nitrogen. The methods may include using the polysilazane in forming a charge trapping layer of a non-volatile memory cell. The methods may alternatively, or additionally include using the polysilazane in forming intergate dielectric material of a non-volatile memory cell. Some embodiments include methods of forming memory cells of a NAND memory array. | 06-23-2011 |
20110163416 | METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES - The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å. | 07-07-2011 |
20110254075 | USE OF DILUTE STEAM AMBIENT FOR IMPROVEMENT OF FLASH DEVICES - A flash memory integrated circuit and a method for fabricating the same. A gate stack includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. Additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. The interface can be is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability. Oxide in an upper storage dielectric layer is enhanced in the dilute steam oxidation. The thin oxide layers serve as diffusion paths to enhance uniform distribution of OH species across the buried interfaces being oxidized. | 10-20-2011 |
20130026600 | FORMING AIR GAPS IN MEMORY ARRAYS AND MEMORY ARRAYS WITH AIR GAPS THUS FORMED - Methods of forming air gaps in memory arrays and memory arrays with air gaps thus formed are disclosed. One such method may include forming an isolation region, having a first dielectric, through a charge-storage structure that is over a semiconductor, the isolation region extending into the semiconductor; forming a second dielectric over the isolation region and charge-storage structure; and forming an air gap in the isolation region so that the air gap passes through the charge-storage structure and so that a thickness of the first dielectric is between the air gap and the second dielectric. | 01-31-2013 |
20130166057 | METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES - The present disclosure provides small scale capacitors (e.g., DRAM capacitors) and methods of forming such capacitors. One exemplary implementation provides a method of fabricating a capacitor that includes sequentially forming a first electrode, a dielectric layer, and a second electrode. At least one of the electrodes may be formed by a) reacting two precursors to deposit a first conductive layer at a first deposition rate, and b) depositing a second conductive layer at a second, lower deposition rate by depositing a precursor layer of one precursor at least one monolayer thick and exposing that precursor layer to another precursor to form a nanolayer reaction product. The second conductive layer may be in contact with the dielectric layer and have a thickness of no greater than about 50 Å. | 06-27-2013 |
20130264628 | USE OF ETCH PROCESS POST WORDLINE DEFINITION TO IMPROVE DATA RETENTION IN A FLASH MEMORY DEVICE - Embodiments of the present disclosure describe techniques and configurations relating to use of an etch process post wordline definition to improve data retention in a flash memory device. In one embodiment, a method includes forming a plurality of wordline structures on a substrate, wherein individual wordline structures of the plurality of wordline structures include a control gate having an electrically conductive material and a cap having an electrically insulative material formed on the control gate, depositing an electrically insulative material to form a liner on a surface of the individual wordline structures, and etching the liner to remove at least a portion of the liner. Other embodiments may be described and/or claimed. | 10-10-2013 |
20140027832 | FORMING AIR GAPS IN MEMORY ARRAYS AND MEMORY ARRAYS WITH AIR GAPS THUS FORMED - A memory array has first and second memory cells over a semiconductor and an isolation region extending into the semiconductor. The isolation region includes an air gap between charge-storage structures of the first and second memory cells and a thickness of dielectric over the air gap and contained between the first and second memory cells. | 01-30-2014 |