Patent application number | Description | Published |
20130328123 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, a buried layer disposed in the semiconductor substrate; a deep well disposed in the semiconductor substrate; a first doped region disposed in the deep well, wherein the first doped region contacts the buried layer; a conductive region having the first conductivity type surrounding and being adjacent to the first doped region, wherein the conductive region has a concentration higher than the first doped region; a first heavily doped region disposed in the first doped region; a well having a second conductivity type disposed in the deep well; a second heavily doped region disposed in the well; a gate disposed on the semiconductor substrate between the first heavily doped region and the second heavily doped region; and a first trench structure and a second trench structure, wherein a depth of the second trench structure is substantially deeper than a depth of the buried layer. | 12-12-2013 |
20140042527 | HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE - A high voltage metal-oxide-semiconductor transistor device includes a substrate, at least an isolation structure formed in the substrate, a gate formed on the substrate, and a source region and a drain region formed in the substrate at respective sides of the gate. The isolation structure further includes a recess. The gate includes a first gate portion formed on a surface of the substrate and a second gate portion downwardly extending from the first gate portion and formed in the recess. | 02-13-2014 |
20140051202 | METHOD OF FABRICATING SOLAR CELL - A method of fabricating a solar cell includes the following steps. At first, a substrate including a doped layer is provided. Subsequently, a patterned material layer partially overlapping the doped layer is formed on the substrate, and a first metal layer is conformally formed on the patterned material layer and the doped layer. Furthermore, a patterned mask layer totally overlapping the patterned material layer is formed on the first metal layer, and a second metal layer is formed on the doped layer not overlapped by the patterned material layer. Then, the patterned mask layer, the first metal layer between the patterned mask layer and the patterned material layer and a part of the patterned material layer are removed. | 02-20-2014 |
20140131797 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well having the first conductive type and a second well having the second conductive type both formed in the deep well and extending down from the surface of the substrate, and the second well spaced apart from the first well; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug penetrating into the isolation and reaching the bottom thereof; and a first doping electrode region having the second conductive type, formed within the second well and below the isolation to connect the conductive plug. | 05-15-2014 |
20140367789 | POWER ARRAY WITH STAGGERED ARRANGEMENT FOR IMPROVING ON-RESISTANCE AND SAFE OPERATING AREA - A power array with a staggered arrangement for improving on-resistance and safe operating area of a device is provided. Each power array includes two or more rows with a plurality of parallel device units arranged along the row. Each device unit includes a source region, a drain region, and a gate disposed between the source region and the drain region, wherein each drain region is offset from the adjacent drain region of adjacent rows in a row direction. | 12-18-2014 |
20150014768 | HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE AND MANUFACTURING METHOD THEREOF - A lateral double-diffused metal-oxide-semiconductor transistor device includes a substrate having at least a shallow trench isolation formed therein, an epitaxial layer encompassing the STI in the substrate, a gate, and a drain region and a source region formed in the substrate at respective two sides of the gate. The epitaxial layer, the source region and the drain region include a first conductivity type. The gate includes a first portion formed on the substrate and a second portion extending into the STI. | 01-15-2015 |
Patent application number | Description | Published |
20140014520 | METHOD FOR FORMING METAL MEMBER ON CASING - A method for forming metal members on a casing, includes steps of providing the casing of an electron device; selecting at least two areas on a common surface of the casing; forming, by an electroplating way, a metal layer on all of the selected areas; and forming, by a patterning way, the metal layer respectively with different metal member pattern layers on different selected areas, wherein the metal member pattern layers are selected from the group consisting of an antenna member pattern, a ground wire member pattern, and an electromagnetic shielding member pattern, so as to use these members as an antenna member, a ground wire member, or an electromagnetic shielding member of the electron device. | 01-16-2014 |
20140014619 | MASKING METHOD FOR LOCALLY TREATING SURFACE - This present invention provides a masking method for locally treating surface of a workpiece by masking the workpiece. The workpiece has a targeting treatment area and a non-targeting treatment area. The masking method includes: covering a fixture on the non-targeting treatment area of the workpiece to expose the targeting treatment area of the workpiece; by using an adsorbing force existing between the fixture and the workpiece, getting the fixture to closely contact with the non-targeting treatment area of the workpiece and to make an end edge of the fixture correspond to the edge of the targeting treatment area of the workpiece, wherein the adsorbing force is a vacuum adsorbing force or a static electric adsorbing force. Thereby the surface treatment only effects in an area within the range of the targeting treatment area of the workpiece so as to reduce the treatment defect. | 01-16-2014 |
20140015183 | Rotary Conveying Equipment for Exposing Substrate - Disclosure is a rotary conveying equipment for exposing a substrate. The rotary conveying equipment includes a carrying device and a rotary moving device. The carrying device carries the substrate by fastening the substrate thereon. The rotary moving device includes a rotating means, and the rotating means is connected to the carrying device and is moved together with rotated. And the efficiency of the exposure process is improved. | 01-16-2014 |
Patent application number | Description | Published |
20090262097 | FRAME ASSEMBLY FOR TOUCH SCREEN - The dimension detection system is implemented in cascaded circuit boards housed inside a frame assembly of the touch screen. After the frame assembly is assembled and powered, the dimension detection system in the circuit boards would provide horizontal and vertical feedback signals which are utilized to obtain the size of the touch screen. The size information of the touch screen could then be provided to the computer or embedded system where the touch screen is connected, preventing troublesome manual configuration. The dimension detection system and the flexible frame assembly together make the touch screen's production, storage, transportation, and usage more efficient and friendly. | 10-22-2009 |
20090262512 | FRAME ASSEMBLY FOR TOUCH SCREEN - The frame assembly mainly contains a number of linear edge members and a number of L-shaped corner members end-to-end joining the edge members by a number of connection pieces into a rectangular frame surrounding a touch panel. Both the edge and corner members have a C-shaped cross section with a space inside for holding circuit boards of the touch panel. The circuit boards of the corner and edge members are aligned so that their connectivity by matching connectors is easily established when putting the frame assembly together. | 10-22-2009 |
20100115311 | PCI Express System and Method of Transiting Link State Thereof - A PCI Express system and a method of transitioning link state thereof. The PCI Express system includes an upstream component, a downstream component and a link. The upstream component and the downstream component transmit data to each other via the link. When at least one of the upstream component and the downstream component stops data transmission under a normal working state and if the system idle time period reaches a threshold idle time, then transiting the link into a second link state | 05-06-2010 |
20100134441 | STRUCTURE OF OPTIC TOUCH CONTROL SCREEN MODULE - An optic touch control screen module includes a plurality of frame members of various sizes and joint members that are combined to form a frame. Each of the frame members and the joint members forms a receiving chamber. Every two opposite ones of the circuit boards are provided with oppositely arranged and corresponding optic transmitting elements and optic receiving elements. Each circuit board has opposite ends each forming a female connector. A plurality of male connectors is provided and each has a structure having two faces forming male terminals. To assemble, the male connector is set between and engages with the female connectors of two adjacent circuit boards. Thus, damage to the circuit boards can be avoided. | 06-03-2010 |