Patent application number | Description | Published |
20140211481 | LIGHT-GUIDING COVER AND ILLUMINATION DEVICE HAVING THE SAME - A light-guiding cover includes a light input surface defining a central axis and a light output surface. The light-guiding cover has a reflecting portion formed therein and substantially symmetrical about the central axis. The reflecting portion surrounding the central axis has an outer reflecting surface and an inner reflecting surface. The light input surface is defined into two regions, an inner region and an outer region, by the reflecting portion. The outer reflecting surface of the reflecting portion is arranged away from the central axis, the inner reflecting surface of the reflecting portion is arranged near to the central axis. Thus, the light-guiding cover of the instant disclosure can guide the light beams emanated from a LED to travel in certain optical paths and provide uniformly distributed lighting. Moreover, the instant disclosure also provides an illumination device having the light-guiding cover that can omni-directionally illuminate. | 07-31-2014 |
20140241002 | LINEAR LIGHT SOURCE, LIGHT GUIDE, AND OPTICAL SCANNING MODULE - A linear light source emits light beams for illuminating a target. The linear light source includes a light guide, and a light-emitting unit. The light guide has a bottom surface, first and second reflecting surfaces extending from opposite side edges of the bottom surface, and a light converging convex surface extending between the first and second reflecting surfaces, curved outward, and having multiple radii of curvature. The light-emitting unit emits light beams that exit through the light converging convex surface to converge at multiple points distributed at distinct positions in a direction perpendicular to a surface of the target, such that the target to be disposed within a range defined by the multiple points is evenly illuminated. | 08-28-2014 |
Patent application number | Description | Published |
20130026657 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A semiconductor package and a method of fabricating the same. The semiconductor package includes a dielectric layer having opposite first and second surfaces; a semiconductor chip disposed on the first surface; at least two conductive pads embedded in and exposed from the first surface of the dielectric layer, and electrically connected to the semiconductor chip; a plurality of ball-implanting pads formed on the second surface of the dielectric layer; and a plurality of conductive pillars formed in the dielectric layer, each of the conductive pillars having a first end electrically connected to one of the ball-implanting pads and a second end opposing the first end and electrically connected to one of the conductive pads. Through the installation of the conductive pillars, it is not necessary for the ball-implanting pads to be associated with the conductive pads in position, and the semiconductor package thus has an adjustable ball-implanting area. | 01-31-2013 |
20130228921 | SUBSTRATE STRUCTURE AND FABRICATION METHOD THEREOF - A substrate structure includes a substrate body and a plurality of conductive pads formed on the substrate body and each having a first copper layer, a nickel layer, a second copper layer and a gold layer sequentially stacked. The thickness of the second copper layer is less than the thickness of the first copper layer. As such, the invention effectively enhances the bonding strength between the conductive pads and solder balls to be mounted later on the conductive pads, and prolongs the duration period of the substrate structure. | 09-05-2013 |
20130307152 | SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield. | 11-21-2013 |
20140308780 | FABRICATION METHOD OF SEMICONDUCTOR PACKAGE - A fabrication method of a semiconductor package is provided, which includes the steps of: forming a packaging substrate on a first carrier; bonding a second carrier to the packaging substrate; removing the first carrier; disposing a chip on the packaging substrate; forming an encapsulant on the packaging substrate for encapsulating the chip; and removing the second carrier. The first and second carriers provide the thin-type packaging substrate with sufficient rigidity for undergoing the fabrication processes without cracking or warpage, thereby meeting the miniaturization requirement and improving the product yield. | 10-16-2014 |
20150102484 | PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF - A package structure is disclosed, which includes: a first substrate; a build-up layer formed on and electrically connected to the first substrate and having a cavity; at least an electronic element disposed in the cavity and electrically connected to the first substrate; a stack member disposed on the build-up layer so as to be stacked on the first substrate; and an encapsulant formed between the build-up layer and the stack member. The build-up layer facilitates to achieve a stand-off effect and prevent solder bridging. | 04-16-2015 |
20150287671 | PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a package structure is provided, which includes the steps of: providing a carrier having a plurality of bonding pads; laminating a laminate on the carrier, wherein the laminate has a built-up portion and a release portion smaller in size than the built-up portion, the release portion covering the bonding pads and the built-up portion being laminated on the release portion and the carrier; forming a plurality of conductive posts in the built-up portion; and removing the release portion and the built-up portion on the release portion such that a cavity is formed in the laminate to expose the bonding pads, the conductive posts being positioned around a periphery of the cavity. Therefore, the present invention has simplified processes. | 10-08-2015 |
20150303073 | METHOD OF FABRICATING A PACKAGING SUBSTRATE - A method of fabricating a packaging substrate is provided, including: providing a carrier having two carrying portions, each of the carrying portions having a first side and a second side opposite to the first side and the carrying portions are bonded through the second sides thereof; forming a circuit layer on the first side of each of the carrying portions; and separating the two carrying portions from each other to form two packaging substrates. The carrying portions facilitate the thinning of the circuit layers and provide sufficient strength for the packaging substrates to undergo subsequent packaging processes. The carrying portions can be removed after the packaging processes to reduce the thickness of packages and thereby meet the miniaturization requirement. | 10-22-2015 |
20150333029 | PACKAGE SUBSTRATE AND METHOD FOR FABRICATING THE SAME - A package substrate and a method of fabricating the same are provided. The method includes providing a substrate body having a first surface, a second surface opposing the first surface, a plurality of first electrical connecting pads disposed on the first surface; mounting a metal board on the first electrical connecting pads; and patterning the metal board so as to define a plurality of metal pillars corresponding to the first electrical connecting pads. Therefore, drawbacks of raw edges and unequal heights of the metal pillars can be obviated. | 11-19-2015 |
Patent application number | Description | Published |
20140192818 | NETWORK CONNECTION METHOD CAPABLE OF ANALYZING DATA PACKETS IN ORDER TO SELECT CONNECTION ROUTES - The present invention is to provide a network connection method applicable to a network system including a client device and a plurality of source devices, wherein the client device is connected to the Internet through a first connection route (e.g., a power-line network or a cable network) and a second connection route (e.g., a WiFi wireless network) respectively so as to establish a connection channel with each source device, and the client device is able to analyze a data packet received from the source device to determine whether the data packet contains highly delay-sensitive data (e.g., audio/video data and communication data) or delay-insensitive data (e.g., webpage data). When it is determined that the data packet contains highly delay-sensitive data, the data packet is transmitted to the client device through the first connection route which is more stable than the second connection route, otherwise, through the second connection route instead. | 07-10-2014 |
20140204775 | ROUTE SELECTION METHOD FOR USE WHERE PLURAL HETEROGENEOUS NETWORKS ARE AVAILABLE - The present invention is to provide a route selection method which is applicable to a network connection device capable of receiving or transmitting a network packet through at least two heterogeneous networks. Upon receiving the packet, the device performs route performance detection to obtain the current transmission delay rate of each of the heterogeneous networks, and then determines whether the packet is highly sensitive to transmission delay or has a re-transmission mechanism. When it is determined that the packet is highly sensitive to transmission delay or doesn't have the re-transmission mechanism, the device chooses from the plural heterogeneous networks the one with a relatively low transmission delay rate as the route through which to transmit the packet to the Internet; otherwise, the device chooses from the plural heterogeneous networks the one with a relatively high transmission delay rate as the route through which to transmit the packet to the Internet. | 07-24-2014 |
20140328417 | POWER LINE COMMUNICATION DEVICE SWITCHABLE BETWEEN NOISE DETECTING AND FILTERING FUNCTIONS - The present invention is to provide a PLC device, which includes a power receiving port connected to a power supply for receiving a power signal and a network signal carried by the power signal; a filtering unit having a first end connected to the power receiving port; a power output port connected to a second end of the filtering unit and a load, respectively, for supplying the power signal to the load while the filtering unit filters out noise generated in the power signal by the load; a switching unit having two connecting ends connecting to the first and second ends, respectively, and a control end switchable between the two connecting ends; and a processing unit connected to the control end and including a bridge module for receiving and then transmitting the network signal to a network apparatus, and a detection module for detecting the level of the noise. | 11-06-2014 |
20140358313 | METHOD FOR SELECTING OPTIMAL CENTRAL CONTROLLER IN POWER LINE NETWORK - The present invention is to provide a method for selecting the optimal central controller in a power line network, which is applicable to the power line network including at least one terminal device, at least one network device and a plurality of controllers. The controllers are respectively installed with a central controller evaluation and selection software and connected to the terminal device and/or network device, and can communicate with one other through power line. The method is performed by a central controller, that is determined by negotiation between the controllers, via the software and includes the steps of detecting and calculating the connected states of the controllers in the power line network; selecting the optimal controller according to the connected states, assigning the optimal controller as new central controller, and notifying the new central controller to the other controllers, so as to optimize the performance of the power line network. | 12-04-2014 |
20150124889 | POWER LINE COMMUNICATION DEVICE WITH NOISE DETECTING AND FILTERING FUNCTIONS - The present invention is to provide a PLC device having noise detecting and filtering functions, which includes a power receiving port having one end connected to a power supply unit for receiving a power signal and a network signal; a noise filtering circuit having one end connected to the other end of the power receiving port for filtering noise of the power signal passing therethrough; a power output port connected between the other end of the noise filtering circuit and a load; a noise detecting circuit having two ends connected to a line between the first filtering unit and power receiving port and a line between the first filtering unit and power output port, respectively; and a processing unit connected to a line between the first filtering unit and power receiving port for receiving the network signal from the noise detecting circuit and transmitting the same to a network apparatus. | 05-07-2015 |
20150124890 | POWER LINE COMMUNICATION ADAPTER CAPABLE OF BEING FREELY ASSEMBLED BY ACCESSORIES THEREOF - The present invention is to provide a power line communication adapter capable of being freely assembled by accessories thereof, which includes an anti-noise device having a first male plug for receiving a power line communication signal from a power outlet, a first female socket for connecting the first male plug with an electrical equipment through a filter module, and a first adapting port connected to the first male plug, such that noise generated by the electrical equipment device can be filtered by the filter module without interfering the power line communication signal; and a power line communication device having a power line communication module along with a second adapting port connected thereto such that, when the first and second adapting ports are connected with each other, the power line communication device and the anti-noise device are combined into an anti-noise adapter for receiving and transmitting the power line communication signal. | 05-07-2015 |
20150130275 | SMART SOCKET FOR AUTOMATICALLY SWITCHING BETWEEN ELECTRICITY UTILIZATION MODES - The present invention is to provide a smart socket, which includes a timing unit for obtaining current time; a power receiving/output unit for receiving electricity from an external power supply or outputting electricity to a power storage device; an electricity quantity monitoring unit for detecting power value of electricity received from the power receiving/output unit; a home appliance power supply unit and an electricity selling power supply unit for transmitting electricity to an electronic device and an electricity purchaser circuit, respectively; a switching unit connected to the electricity quantity monitoring unit, home appliance power supply unit and electricity selling power supply unit, and being set with a home appliance mode, a power storage mode and an electricity selling mode; and a processing unit connected to the timing unit, electricity quantity monitoring unit and switching unit for switching mode of the switching unit according to the current time and power value. | 05-14-2015 |
20150212532 | CONTROL SYSTEM CAPABLE OF CHANGING THE STATE OF AN ELECTRICAL APPLIANCE ACCORDING TO EXCEPTIONAL CONDITIONS - The present invention is to provide a control system, which includes a plurality of switch devices each electrically connected between an electrical appliance and a power supply unit for turning on or off the electrical appliance, and a processing server respectively connected to the switch devices and capable of turning the switch device into a turned-on or turn-off state at a predetermined time according to a time schedule stored therein. In addition, the processing server can generate an exception time data when determining an exceptional condition (e.g., a specific event took place, a user did not leave home on time, or the user turned on the electrical appliance on his or her own initiative) occurs, and then change the state of each switch device preferentially according to the exception time data, so as to adjust the time schedule in a timely manner upon determining the occurrences of different exceptional conditions. | 07-30-2015 |
Patent application number | Description | Published |
20110115760 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery area and having two opposite sides connecting with the periphery area, a driving chip disposed at the periphery area for driving electrical elements in the active display area, and a plurality of wires electrically connecting the driving chip and the electrical elements in the active display area. The distance from a first part of the wires to the center of the driving chip is farther than the distance from a second part of the wires to the center of the driving chip, and the width of the first part of the wires on a reference line perpendicular to the opposite sides of the active display area is greater than the width of the second part of the wires on the reference line. | 05-19-2011 |
20140118979 | Display Panel Integrating A Driving Circuit - A display panel includes a periphery area, an active display area adjacent to the periphery, a driving chip disposed out of the active display area for driving the active display area, and a plurality of wires electrically connecting the driving chip and the active display area. The width of at least one wire at a portion adjacent to the driving chip is smaller than the width of the at least one wire at the other portion adjacent to the active display area. | 05-01-2014 |
20140168923 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery area and having two opposite sides connecting with the periphery area, a driving chip disposed at the periphery area for driving electrical elements in the active display area, and a plurality of wires electrically connecting the driving chip and the electrical elements in the active display area. The distance from a first part of the wires to the center of the driving chip is farther than the distance from a second part of the wires to the center of the driving chip, and the width of the first part of the wires on a reference line perpendicular to the opposite sides of the active display area is greater than the width of the second part of the wires on the reference line. | 06-19-2014 |
20140198462 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery, a driving chip disposed out of the active display area for driving the active display area, and a plurality of wires electrically connecting the driving chip and the active display area. The width of at least one wire at a portion adjacent to the driving chip is smaller than the width of the at least one wire at the other portion adjacent to the active display area. | 07-17-2014 |
20140204542 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery, a driving chip disposed out of the active display area for driving the active display area, and a plurality of wires electrically connecting the driving chip and the active display area. The width of at least one wire at a portion adjacent to the driving chip is smaller than the width of the at least one wire at the other portion adjacent to the active display area. | 07-24-2014 |
20150195898 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery, a driving chip disposed out of the active display area for driving the active display area, and a plurality of wires electrically connecting the driving chip and the active display area. The width of at least one wire at a portion adjacent to the driving chip is smaller than the width of the at least one wire at the other portion adjacent to the active display area. | 07-09-2015 |
20150195904 | DISPLAY PANEL INTEGRATING A DRIVING CIRCUIT - A display panel includes a periphery area, an active display area adjacent to the periphery, a driving chip disposed out of the active display area for driving the active display area, and a plurality of wires electrically connecting the driving chip and the active display area. The width of at least one wire at a portion adjacent to the driving chip is smaller than the width of the at least one wire at the other portion adjacent to the active display area. | 07-09-2015 |
Patent application number | Description | Published |
20120146153 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A chip package includes: a substrate; a drain and a source regions located in the substrate; a gate located on or buried in the substrate; a drain conducting structure, a source conducting structure, and a gate conducting structure, disposed on the substrate and electrically connected to the drain region, the source region, and the gate, respectively; a second substrate disposed beside the substrate; a second drain and a second source region located in the second substrate, wherein the second drain region is electrically connected to the source region; a second gate located on or buried in the second substrate; and a second source and a second gate conducting structure disposed on the second substrate and electrically connected to the second source region and the second gate, respectively, wherein terminal points of the drain, the source, the gate, the second source, and the second gate conducting structures are substantially coplanar. | 06-14-2012 |
20120194148 | POWER MODULE AND THE METHOD OF PACKAGING THE SAME - A power module includes a substrate; a conductive path layer formed on the substrate with a specific pattern as an inductor; a connection layer being formed on the substrate and electrically connected to a first terminal of the inductor; and a first transistor, electrically mounted on the substrate through the connection layer. | 08-02-2012 |
20120194301 | CAPACITIVE COUPLER PACKAGING STRUCTURE - Embodiments of the present invention provide a capacitive coupler packaging structure including a substrate with at least one capacitor and a receiver formed thereon, wherein the at least one capacitor at least includes a first electrode layer, a second electrode layer and a capacitor dielectric layer therebetween, and the first electrode layer is electrically connected to the receiver via a solder ball. The capacitive coupler packaging structure also includes a transmitter electrically connecting to the capacitor. | 08-02-2012 |
20120305977 | INTERPOSER AND MANUFACTURING METHOD THEREOF - An embodiment of the present invention provides a manufacturing method of an interposer including: providing a semiconductor substrate having a first surface, a second surface and at least a through hole connecting the first surface to the second surface; electrocoating a polymer layer on the first surface, the second surface and an inner wall of the through hole; and forming a wiring layer on the electrocoating polymer layer, wherein the wiring layer extends from the first surface to the second surface via the inner wall of the through hole. Another embodiment of the present invention provides an interposer. | 12-06-2012 |