Patent application number | Description | Published |
20100171915 | Liquid Crystal Display Device - An LCD device having a backlight module, a display module and an adhesive layer is provided. The backlight module has an inner fringe for holding the display module. The display module sequentially includes a lower polarizer, a display panel and an upper polarizer. The edge of the upper surface of the display panel is exposed because the area of the upper polarizer is smaller than the area of the display panel. The adhesive layer has a first adhesive film and a second adhesive film. The display module is disposed on the inner fringe of the backlight module by using the adhesive layer wherein the first adhesive film is on the side wall of the backlight module and portion of the edge of the upper surface of the display panel, the second adhesive film is on the portion of the first adhesive film and the exposed edge of upper surface of the display panel. | 07-08-2010 |
20110292005 | DISPLAY APPARATUS AND METHOD FOR ELIMINATING GHOST THEREOF - A display apparatus includes a plurality of scan lines, a plurality of data lines, a plurality of pixel transistors, a plurality of pixel electrodes, a gate driver, a source driver and a discharge circuit. The data lines are intersected with the scan lines. Each of the pixel transistors is electrically coupled to a corresponding scan line and a corresponding data line, and each of the pixel electrodes is electrically coupled to a corresponding pixel transistor. The gate driver is electrically coupled to the scan lines, and the source driver is electrically coupled to the data lines. The discharge circuit is electrically coupled to the gate driver and the data lines. The discharge circuit starts when the display apparatus is turned off, to control the gate drive for turning on the pixel transistors simultaneously, and make the pixel electrodes be electrically communicated with a reference voltage. | 12-01-2011 |
20120146962 | ACTIVE LIQUID CRYSTAL DISPLAY PANEL - An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits. | 06-14-2012 |
20130127697 | DISPLAY PANEL AND MULTIPLEXER CIRCUIT THEREIN, AND METHOD FOR TRANSMITTING SIGNALS IN DISPLAY PANEL - A multiplexer circuit includes multiple groups of switches and multiple groups of control lines. Each control line in each one of the groups of control lines is coupled to a control end of at least one switch in corresponding one of the groups of switches, and each group of control lines is configured for synchronously transmitting an identical group of control signals. A display panel and method for transmitting signals in a display panel is also disclosed herein. | 05-23-2013 |
20130141315 | FLAT PANEL DISPLAY, SHIFT REGISTER AND METHOD OF CONTROLLING THE SHIFT REGISTER - A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit. | 06-06-2013 |
20140347259 | DRIVING METHOD FOR DISPLAY PANEL - A driving method for a display panel is provided. The display panel includes at least a first common signal line, at least a second common signal line and a plurality of pixels arranged as a pixel array. The pixel array includes a first pixel row and a second pixel row electrically connected to the first common signal line and the second common signal line, respectively. The driving method includes steps of: generating a first AC common signal; generating a second AC common signal, wherein the first AC common signal and the second AC common signal are inverse to each other; and providing the first and second AC common signal to the first and second pixel rows through the first and second common signal lines, respectively, by way of N-frame switch, wherein N is a positive integer. | 11-27-2014 |
20150123958 | DISPLAY DEVICE AND DRIVING METHOD THEREOF - A display device includes multiple pixels, a gate driver and a data driver. Each pixel includes a transistor and a pixel capacitor electrically coupled to the transistor. The gate driver is configured to turn on the transistor of a first pixel for one time during a first turn-on period of multiple turn-on cycles of a frame cycle of a frame displayed by the display device. The data driver is configured to charge the pixel capacitor of the first pixel via the transistor of the first pixel to a first over-charge voltage and a data voltage during an over-charge period and a recovery period of the first turn-on period. The first over-charge voltage is different from the data voltage. A method for driving the display device is also provided. | 05-07-2015 |
20150161958 | GATE DRIVER - A gate driver includes a plurality of shift registers and a plurality of cutting units. Each of the shift registers is configured for outputting a shift register signal according to a clock signal of the each of the shift register sequentially. Each of the shift register signals has a working period and the two working periods of the two adjacent shift register signals overlap each other. Each of the cutting units is coupled to a respective one of the shift registers. The cutting unit corresponding to the Nth shift register is configured for cutting a part of the working period from the shift register signal of the Nth shift register to generate a gate driving signal according to the clock signal of the (N−1)th or (N+1)th shift register, such that working periods of the gate driving signals are staggered. N is a positive integer larger than two. | 06-11-2015 |