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| 20090163041 | LOW WET ETCH RATE SILICON NITRIDE FILM - The present invention pertains to methods of depositing low wet etch rate silicon nitride films on substrates using high-density plasma chemical vapor deposition techniques at substrate temperatures below 600° C. The method additionally involves the maintenance of a relatively high ratio of nitrogen to silicon in the plasma and a low process pressure. | 06-25-2009 |
| 20100099236 | GAPFILL IMPROVEMENT WITH LOW ETCH RATE DIELECTRIC LINERS - A method of filling a trench is described and includes depositing a dielectric liner with a high ratio of silicon oxide to dielectric liner etch rate in fluorine-containing etch chemistries. Silicon oxide is deposited within the trench and etched to reopen or widen a gap near the top of the trench. The dielectric liner protects the underlying substrate during the etch process so the gap can be made wider. Silicon oxide is deposited within the trench again to substantially fill the trench. | 04-22-2010 |
| 20110061810 | Apparatus and Methods for Cyclical Oxidation and Etching - Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device. | 03-17-2011 |
| 20110294300 | SELECTIVE ETCH FOR SILICON FILMS - A method of etching patterned heterogeneous silicon-containing structures is described and includes a remote plasma etch with inverted selectivity compared to existing remote plasma etches. The methods may be used to conformally trim polysilicon while removing little or no silicon oxide. More generally, silicon-containing films containing less oxygen are removed more rapidly than silicon-containing films which contain more oxygen. Other exemplary applications include trimming silicon carbon nitride films while essentially retaining silicon oxycarbide. Applications such as these are enabled by the methods presented herein and enable new process flows. These process flows are expected to become desirable for a variety of finer linewidth structures. Methods contained herein may also be used to etch silicon-containing films faster than nitrogen-and-silicon containing films having a greater concentration of nitrogen. | 12-01-2011 |
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| 20100070841 | DYNAMIC SELECTION OF IMAGES FOR WEB PAGES - A gallery widget is invoked when a tag in a markup language document, such as a web page, is processed. The gallery widget selects a number of images specified in the tag and places the images in the markup language document as defined by the tag. The images are selected from a gallery containing all images available for display or from a pool of images chosen from the gallery using a gallery administration tool. | 03-18-2010 |
| 20100232068 | EQUALIZATION AND MINIMIZATION OF MULTI-HEAD STACK ASSEMBLY'S MOTION DURING SELF SERVO WRITING AND HDD OPERATION - A disk hard disk drive that includes a spindle motor and an actuator arm coupled to a base plate. A plurality of disks are coupled to the spindle motor and a plurality of heads are coupled to the actuator arm and the disks. The drive also includes a cover attached to the base plate. The cover and base plate enclose a hard disk area that has a horizontal center line. The hard disk area includes a volume of air above the horizontal center line that is equal to a volume of air below the horizontal center line. The air space within the hard disk area is equal and symmetrical in a vertical direction. Such an arrangement reduces track mis-registration when servo is copied from a disk surface to the other surfaces of the disks in the drive. | 09-16-2010 |
| 20100232070 | APPARATUS OF A SLIDER LIMITER FOR PROTECTING READ-WRITE HEAD FROM NON-OPERATIONAL SHOCK IN A HARD DISK DRIVE - This application discloses a hard disk drive comprising a landing ramp mounted to a disk base including a slider limiter for at least one slider in the hard disk drive to limit movement of the sliders during a non-operational shock event while parked on the loading ramp. Each of the slider limiters includes a clearance zone configured so that when the slider contacts the slider limiter during the non-operational event, the read-write head remains out of contact with the slider limiter. The clearance zone may include a recess and/or a cutout. The clearance zone may include a recess and/or a cutout. The recess may take any shape, for example the recess may be a polygon and/or curved in cross section. The polygon may have at least two sides. The clearance zone may further include a radial bulge to further protect the read-write head during non-operational shock events. | 09-16-2010 |
| 20100284110 | APPARATUS OF A ARM LIMITER FOR MINIMIZING EFFECT OF NON-OPERATIONAL SHOCK IN A HARD DISK DRIVE - This application discloses a hard disk drive comprising a arm limiter mounted on a disk base to limit movement of the actuator arms during a non-operational shock event while parked. The arm limiter and disk base are disclosed in various combinations to limit actuator arm movement during non-operational shocks. | 11-11-2010 |
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| 20080199282 | CLUSTER TOOL ARCHITECTURE FOR PROCESSING A SUBSTRATE - Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool). In one embodiment, the cluster tool is adapted to perform a track lithography process in which a photosensitive material is applied to a substrate, patterned in a stepper/scanner, and then removed in a developing process completed in the cluster tool. In one embodiment of the cluster tool, substrates are grouped together in groups of two or more for transfer or processing to improve system throughput, reduce the number of moves a robot has to make to transfer a batch of substrates between the processing chambers, and thus increase system reliability. Embodiments also provide for a method and apparatus that are used to increase the reliability of the substrate transfer process to reduce system down time. | 08-21-2008 |
| 20080216077 | SOFTWARE SEQUENCER FOR INTEGRATED SUBSTRATE PROCESSING SYSTEM - Embodiments of the invention generally provide apparatus and method for scheduling a process sequence to achieve maximum throughput and process consistency in a cluster tool having a set of constraints. One embodiment of the present invention provides a method for scheduling a process sequence comprising determining an initial individual schedule by assigning resources to perform the process sequence, calculating a fundamental period, detecting resource conflicts in a schedule generated from the individual schedule and the fundamental period, and adjusting the individual schedule to remove the resource conflicts. | 09-04-2008 |
| 20080223293 | CLUSTER TOOL ARCHITECTURE FOR PROCESSING A SUBSTRATE - A cluster tool for processing a substrate includes a cassette and a processing module including a first process chamber that is configured to perform a chill process on a substrate, a second processing chamber that is configured to perform a bake process on the substrate, and an input chamber. The first processing chamber, the second processing chamber, and the input chamber are substantially adjacent to each other. The processing modules also includes a robot that is configured to receive the substrate in the input chamber and transfer and position the substrate in the first processing chamber and second processing chamber. The robot includes a robot blade, an actuator, and a heat exchanging device. The heat exchanging device includes a chilled transfer assembly. The cluster tool also includes a 6-axis articulated robot configured to transfer the substrate between the cassette and the input chamber. | 09-18-2008 |
| 20090064928 | CLUSTER TOOL ARCHITECTURE FOR PROCESSING A SUBSTRATE - Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, substrates processed in the cluster tool have a more repeatable wafer history, and also the cluster tool has a smaller system footprint. In one embodiment, the cluster tool is adapted to perform a track lithography process in which a substrate is coated with a photosensitive material, is then transferred to a stepper/scanner, which exposes the photosensitive material to some form of radiation to form a pattern in the photosensitive material, which is then removed in a developing process completed in the cluster tool. In track lithography type cluster tools, since the chamber processing times tend to be rather short, and the number of processing steps required to complete a typical track system process is large, a significant portion of the time it takes to process a substrate is taken up by the processes of transferring the substrates in a cluster tool between the various processing chambers. In one embodiment of the cluster tool, the cost of ownership, is reduced by grouping substrates together and transferring and processing the substrates in groups of two or more to improve system throughput, and reduces the number of moves a robot has to make to transfer a batch of substrates between the processing chambers, thus reducing wear on the robot and increasing system reliability. In one aspect of the invention, the substrate processing sequence and cluster tool are designed so that the substrate transferring steps performed during the processing sequence are only made to chambers that will perform the next processing step in the processing sequence. Embodiments also provide for a method and apparatus that are used to improve the coater chamber, the developer chamber, the post exposure bake chamber, the chill chamber, and the bake chamber process results. Embodiments also provide for a method and apparatus that are used to increase the reliability of the substrate transfer process to reduce system down time. | 03-12-2009 |
| 20090064929 | CLUSTER TOOL ARCHITECTURE FOR PROCESSING A SUBSTRATE - Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, substrates processed in the cluster tool have a more repeatable wafer history, and also the cluster tool has a smaller system footprint. In one embodiment, the cluster tool is adapted to perform a track lithography process in which a substrate is coated with a photosensitive material, is then transferred to a stepper/scanner, which exposes the photosensitive material to some form of radiation to form a pattern in the photosensitive material, which is then removed in a developing process completed in the cluster tool. In track lithography type cluster tools, since the chamber processing times tend to be rather short, and the number of processing steps required to complete a typical track system process is large, a significant portion of the time it takes to process a substrate is taken up by the processes of transferring the substrates in a cluster tool between the various processing chambers. In one embodiment of the cluster tool, the cost of ownership is reduced by grouping substrates together and transferring and processing the substrates in groups of two or more to improve system throughput, and reduces the number of moves a robot has to make to transfer a batch of substrates between the processing chambers, thus reducing wear on the robot and increasing system reliability. In one aspect of the invention, the substrate processing sequence and cluster tool are designed so that the substrate transferring steps performed during the processing sequence are only made to chambers that will perform the next processing step in the processing sequence. Embodiments also provide for a method and apparatus that are used to improve the coater chamber, the developer chamber, the post exposure bake chamber, the chill chamber, and the bake chamber process results. Embodiments also provide for a method and apparatus that are used to increase the reliability of the substrate transfer process to reduce system down time. | 03-12-2009 |
| 20090067956 | CLUSTER TOOL ARCHITECTURE FOR PROCESSING A SUBSTRATE - Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, substrates processed in the cluster tool have a more repeatable wafer history, and also the cluster tool has a smaller system footprint. In one embodiment, the cluster tool is adapted to perform a track lithography process in which a substrate is coated with a photosensitive material, is then transferred to a stepper/scanner, which exposes the photosensitive material to some form of radiation to form a pattern in the photosensitive material, which is then removed in a developing process completed in the cluster tool. In track lithography type cluster tools, since the chamber processing times tend to be rather short, and the number of processing steps required to complete a typical track system process is large, a significant portion of the time it takes to process a substrate is taken up by the processes of transferring the substrates in a cluster tool between the various processing chambers. In one embodiment of the cluster tool, the cost of ownership, is reduced by grouping substrates together and transferring and processing the substrates in groups of two or more to improve system throughput, and reduces the number of moves a robot has to make to transfer a batch of substrates between the processing chambers, thus reducing wear on the robot and increasing system reliability. In one aspect of the invention, the substrate processing sequence and cluster tool are designed so that the substrate transferring steps performed during the processing sequence are only made to chambers that will perform the next processing step in the processing sequence. Embodiments also provide for a method and apparatus that are used to improve the coater chamber, the developer chamber, the post exposure bake chamber, the chill chamber, and the bake chamber process results. Embodiments also provide for a method and apparatus that are used to increase the reliability of the substrate transfer process to reduce system down time. | 03-12-2009 |
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| 20090016403 | MICROMACHINED GAS AND LIQUID CONCENTRATION SENSOR AND METHOD OF MAKING THE SAME - A device with micromachined (a.k.a. MEMS, Micro Electro Mechanical Systems) silicon sensor to measure gas or liquid concentration in a binary mixture formality is disclosed in the present invention. A process for fabricating the said MEMS silicon concentration sensor, which thereby can greatly reduce the sensor fabrication cost by a batch production, is revealed as well. This MEMS process can mass-produce the sensors on silicon substrate in the ways of small size, low power, and high reliability. In addition to the gas or liquid concentration measurement, the present invention further discloses that the said sensor can also readily measure gas or liquid mass flow rate while record the concentration data, which is not viable by other related working principle. | 01-15-2009 |
| 20090158859 | Micromachined Thermal Mass Flow Sensor With Self-Cleaning Capability And Methods Of Making the Same - The current invention generally relates to Micro Electro Mechanical Systems (MEMS) thermal mass flow sensors for measuring the flow rate of a flowing fluid (gas/liquid) and the methods of manufacturing on single crystal silicon wafers. The said mass flow sensors have self-cleaning capability that is achieved via the modulation of the cavity of which the sensing elements locate on the top of the cavity that is made of a silicon nitride film; alternatively the sensing elements are fabricated on top of a binary silicon nitride/conductive polycrystalline silicon film under which is a porous silicon layer selective formed in a silicon substrate. Using polycrystalline silicon or the sensing elements as electrodes, an acoustic wave can be generated across the porous silicon layer which is also used for the thermal isolation of the sensing elements. The vibration or acoustic energy is effective to remove foreign materials deposited on top surface of the sensing elements that ensure the accuracy and enhance repeatability of the thermal mass flow sensing. | 06-25-2009 |
| 20110030468 | ROBUST MICROMACHINING THERMAL MASS FLOW SENSOR AND METHOD OF MAKING THE SAME - The present invention is generally related to a novel micromachining thermal mass flow sensor and, more particularly, to a device incorporated with high strength and robust characteristics, which therefore is capable of operating under harsh environments. The new disclosed sensor is made of essential material which can provide robust physical structure and superior thermal properties to support the flow measuring operation. The invented thermal mass flow sensor is featuring with the advantages of micro-fabricated devices in terms of compact size, low power consumption, high accuracy and repeatability, wide dynamic range and easiness for mass production, which could avoid the drawbacks of fragility and vulnerability. | 02-10-2011 |
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| 20080240056 | Air-time control of wireless networks - A method and apparatus for controlling transmission air-time available to a wireless node within a wireless network is disclosed. The method includes occupied by transmission packets. The method includes the wireless node monitoring air-time available to the wireless node for wireless transmission. The wireless node controls wireless transmission of neighboring wireless devices if the air-time available is detected to be lower than a threshold. | 10-02-2008 |
| 20090003253 | Controlling wireless network beacon transmission - Methods of an access node of a wireless network controlling beacon transmission are disclosed. The method includes the access node detecting a presence of a client device, and the access node controlling air-time of beacon transmission based on whether the access node detects the presence of a client device. | 01-01-2009 |
| 20090080399 | METHODS AND APPARATUS FOR SUPPORTING PROXY MOBILE IP REGISTRATION IN A WIRELESS LOCAL AREA NETWORK - Methods and apparatus for enabling mobility of a node that does not support Mobile IP are disclosed. When an AP receives a data packet, the AP may compare the data packet (e.g., source address) with the AP information for one or more APs to determine whether to send a registration request on behalf of the node. More particularly, the AP determines from the source address whether the node is located on a subnet identical to a subnet of the AP. If the node is located on the subnet of the AP, no Mobile IP service is required on behalf of the node. However, when it is determined from the source address that the node is not located on the subnet identical to the subnet of the Access Point, the AP composes and sends a mobile IP registration request on behalf of the node. For instance, the mobile IP registration request may be composed using the gateway associated with the “home” AP (e.g., having a matching subnet) as the node's Home Agent. | 03-26-2009 |
| 20110188402 | Adaptively Capping Data Throughput of Client Devices Associated with a Wireless Network - A methods and apparatuses of adaptively capping data throughput of client devices associated with a wireless network are disclosed. One method includes monitoring an air-time per bit efficiency of each client device associated with the wireless network. A data throughput cap for each client device is adaptively determined based on the air-time per bit efficiency of the client device. | 08-04-2011 |
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| 20080260747 | Methods and Materials Relating to CD84-like Polypeptides and Polynucleotides - The invention provides novel polynucleotides and polypeptides encoded by such polynucleotides and mutants or variants thereof that correspond to a novel human secreted CD84-like polypeptide. These polynucleotides comprise nucleic acid sequences isolated from cDNA library from human spleen (Hyseq clone identification numbers 2938352 (SEQ ID NO: 1)). Other aspects of the invention include vectors containing processes for producing novel human secreted CD84-like polypeptides, and antibodies specific for such polypeptides. | 10-23-2008 |
| 20090023659 | Methods and Materials Relating to CD84-like Polypeptides and Polynucelotides - The invention provides novel polynucleotides and polypeptides encoded by such polynucleotides and mutants or variants thereof that correspond to a novel human secreted CD84-like polypeptide. These polynucleotides comprise nucleic acid sequences isolated from cDNA library from human spleen (Hyseq clone identification numbers 2938352 (SEQ ID NO: 1)). Other aspects of the invention include vectors containing processes for producing novel human secreted CD84-like polypeptides, and antibodies specific for such polypeptides. | 01-22-2009 |
| 20090042199 | Methods and Materials Relating to CD84-like Polypeptides and Polynucleotides - The invention provides novel polynucleotides and polypeptides encoded by such polynucleotides and mutants or variants thereof that correspond to a novel human secreted CD84-like polypeptide. These polynucleotides comprise nucleic acid sequences isolated from cDNA library from human spleen (Hyseq clone identification numbers 2938352 (SEQ ID NO: 1)). Other aspects of the invention include vectors containing processes for producing novel human secreted CD84-like polypeptides, and antibodies specific for such polypeptides. | 02-12-2009 |
| 20090053136 | Methods of Therapy and Diagnosis Using Immunotargeting of CD84Hy1-expressing Cells - Certain cells, including types of cancer cells such as lymphomas, are capable of expressing high levels of CD84Hy1. Immunotargeting using CD84Hy1 polypeptides, nucleic acids encoding for CD84Hy1 polypeptides and anti-CD84Hy1 antibodies provides a method of killing or inhibiting that growth of CD84HY1 Protein-expressing cancer cells. Methods of immunotherapy and diagnosis of disorders associated with CD84Hy1 protein-expressing cells are described. | 02-26-2009 |
| 20110268724 | METHODS AND MATERIALS RELATING TO CD84-LIKE POLYPEPTIDES AND POLYNUCLEOTIDES - The invention provides novel polynucleotides and polypeptides encoded by such polynucleotides and mutants or variants thereof that correspond to a novel human secreted CD84-like polypeptide. These polynucleotides comprise nucleic acid sequences isolated from cDNA library from human spleen (Hyseq clone identification numbers 2938352 (SEQ ID NO: 1)). Other aspects of the invention include vectors containing processes for producing novel human secreted CD84-like polypeptides, and antibodies specific for such polypeptides. | 11-03-2011 |
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| 20080203161 | MULTI-USE WIRELESS DISPLAY TAG INFRASTRUCTURE AND METHODS - A multiuse system for use with Wireless Display Tags (WDTs) includes, in one or more exemplary arrangements, techniques for automatically maintaining synchronicity between pricing data for a product and advertising, marketing or promotional data associated with that product, and for detecting the proximity and location of a customer within a category of goods displayed within a managed environment. A messaging format suitable for such low power operation among a large number of peers is also disclosed, as is a technique for integrating a plurality of smaller displays to yield a single large display. An access point capable of serving as a communications hub within such a network, while at the same time offering visual and audio surveillance capabilities, is also disclosed. | 08-28-2008 |
| 20110169715 | MULTI-USE WIRELESS DISPLAY TAG INFRASTRUCTURE AND METHODS - A multiuse system for use with Wireless Display Tags (WDTs) includes, in one or more exemplary arrangements, techniques for automatically maintaining synchronicity between pricing data for a product and advertising, marketing or promotional data associated with that product, and for detecting the proximity and location of a customer within a category of goods displayed within a managed environment. A messaging format suitable for such low power operation among a large number of peers is also disclosed, as is a technique for integrating a plurality of smaller displays to yield a single large display. An access point capable of serving as a communications hub within such a network, while at the same time offering visual and audio surveillance capabilities, is also disclosed. | 07-14-2011 |
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| 20090148626 | SYSTEM, METHOD AND APPARATUS FOR FILAMENT AND SUPPORT USED IN PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION FOR REDUCING CARBON VOIDS ON MEDIA DISKS IN DISK DRIVES - A filament post used in plasma-enhanced chemical vapor deposition has an outer shell and an inner post. An electrical potential is applied only to the inner post to ensure that there is no impact on the plasma density and the carbon film properties. The inner post and the outer shell are electrically insulated by ceramic insulators, such that no electrical potential is applied to outer shell. The stress generated in the carbon film is directly related to the electrical potential of the surface to which the film is deposited. The carbon film deposited on the outer shell of the post is not highly stressed, which significantly reduces film delamination from the filament post surfaces. | 06-11-2009 |
| 20100073813 | PERPENDICULAR MAGNETIC RECORDING MEDIA HAVING A CAP LAYER FORMED FROM A CoPtCr ALLOY - Perpendicular magnetic recording (PMR) media and methods of fabricating PMR media are described. The PMR media includes, among other layers, a perpendicular magnetic recording layer and a cap layer that are exchange coupled. The magnetic recording layer and the cap layer may be exchange coupled through direct contact, or may be exchange coupled over a coupling layer. In either embodiment, the cap layer is formed from a CoPtCr alloy having a concentration of Cr in the range of about 15-22 at %. | 03-25-2010 |
| 20100110584 | Dual oxide recording sublayers in perpendicular recording media - A method is described for improving recording performance of a perpendicular media. The method includes using a dual oxide layer as a sublayer of a magnetic recording layer of the perpendicular media. The dual oxide sublayer improves recording performance, increases resistance to corrosion and allows for a thinner exchange break layer. The dual oxide layer generally includes oxides of tantalum and one of silicon or boron. | 05-06-2010 |
| 20100159284 | Magnetic recording capping layer with multiple layers for controlling anisotropy for perpendicular recording media - A method is described for improving recording performance of a perpendicular media. The method includes controlling the anisotropy levels in different sublayers of the magnetic recording layers of the perpendicular media. Further, the different sublayers thicknesses can be altered to match the media to a particular head. | 06-24-2010 |
| 20110038079 | PERPENDICULAR RECORDING MEDIA WITH SUBLAYERS OF OXIDE DOPANT MAGNETIC MATERIALS - Perpendicular recording media with sublayers of dual oxide dopant magnetic materials are disclosed. The magnetic layer may comprise multiple sublayers of magnetic materials. In each sublayer, dual oxide dopants are incorporated. The compositions of the sublayers can be the same or different depending on the application. The magnetic layer may be deposited using a target comprising a mixture of CoPtCrB and dual oxides as dopants. The layer deposited with such targets can be the entire magnetic layer or a sublayer. | 02-17-2011 |
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| 20100329011 | MEMORY SYSTEM HAVING NAND-BASED NOR AND NAND FLASHES AND SRAM INTEGRATED IN ONE CHIP FOR HYBRID DATA, CODE AND CACHE STORAGE - A memory system includes a NAND flash memory, a NOR flash memory and a SRAM manufactured on a single chip. Both NAND and NOR memories are manufactured by the same NAND manufacturing process and NAND cells. The three memories share the same address bus, data bus, and pins of the single chip. The address bus is bi-directional for receiving codes, data and addresses and transmitting output. The data bus is also bi-directional for receiving and transmitting data. One external chip enable pin and one external output enable pin are shared by the three memories to reduce the number of pins required for the single chip. Both NAND and NOR memories have dual read page buffers and dual write page buffers for Read-While-Load and Write-While-Program operations to accelerate the read and write operations respectively. A memory-mapped method is used to select different memories, status registers and dual read or write page buffers. | 12-30-2010 |
| 20110051519 | Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface - A nonvolatile memory device includes multiple independent nonvolatile memory arrays that concurrently for parallel reading and writing the nonvolatile memory arrays. A serial interface communicates commands, address, device status, and data between a master device and nonvolatile memory arrays for concurrently reading and writing of the nonvolatile memory arrays and sub-arrays. Data is transferred on the serial interface at the rising edge and the falling edge of the synchronizing clock. The serial interface transmits a command code and an address code from a master device and transfers a data code between the master device and the nonvolatile memory device, wherein the data code has a length that is determined by the command code and a location determined by the address code. An enable signal defines a beginning and termination of a reading or writing operation. Reading one nonvolatile memory array may be interrupted for another operation and then resumed. | 03-03-2011 |
| 20110072200 | Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with parallel interface - A nonvolatile memory device includes multiple independent nonvolatile memory arrays that concurrently for parallel reading and writing the nonvolatile memory arrays. A parallel interface communicates commands, address, device status, and data between a master device and nonvolatile memory arrays for concurrently reading and writing of the nonvolatile memory arrays and sub-arrays. Data is transferred on the parallel interface at the rising edge and the falling edge of the synchronizing clock. The parallel interface transmits a command code and an address code from a master device and transfers a data code between the master device and the nonvolatile memory device, wherein the data code has a length that is determined by the command code and a location determined by the address code. Reading one nonvolatile memory array may be interrupted for reading another. One reading operation has two sub-addresses with one transferred prior to a command. | 03-24-2011 |
| 20110072201 | Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface - A nonvolatile memory device includes multiple independent nonvolatile memory arrays that concurrently for parallel reading and writing the nonvolatile memory arrays. A serial interface communicates commands, address, device status, and data between a master device and nonvolatile memory arrays for concurrently reading and writing of the nonvolatile memory arrays and sub-arrays. Data is transferred on the serial interface at the rising edge and the falling edge of the synchronizing clock. The serial interface transmits a command code and an address code from a master device and transfers a data code between the master device and the nonvolatile memory device, wherein the data code has a length that is determined by the command code and a location determined by the address code. Reading one nonvolatile memory array may be interrupted for reading another. One reading operation has two sub-addresses with one transferred prior to a command. | 03-24-2011 |
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| 20080282982 | APPARATUS AND METHOD FOR DEPOSITION OVER LARGE AREA SUBSTRATES - The present invention generally relates to an inductively coupled plasma apparatus. When depositing utilizing a plasma generated from a showerhead, the plasma may not be evenly distributed to the edge of the substrate. By inductively coupling plasma to the chamber in an area corresponding to the chamber walls, the plasma distribution within the chamber may be evenly distributed and deposition upon the substrate may be substantially even. By vaporizing the processing gas prior to entry into the processing chamber, the plasma may also be even and thus contribute to an even deposition on the substrate. | 11-20-2008 |
| 20080292811 | CHAMBER IDLE PROCESS FOR IMPROVED REPEATABILITY OF FILMS - Methods and apparatus for improving the substrate-to-substrate uniformity of silicon-containing films deposited by vapor deposition of precursors vaporized from a liquid source on substrates in a chamber are provided. The methods include exposing a chamber to a processing step at a predetermined time that is after one substrate is processed in the chamber and is before the next substrate is processed in the chamber. In one aspect, the processing step includes introducing a flow of a silicon-containing precursor into the chamber for a period of time. In another aspect, the processing step includes exposing the chamber to a gas in the presence or absence of a plasma for a period of time. | 11-27-2008 |
| 20110290183 | Plasma Uniformity Control By Gas Diffuser Hole Design - Embodiments of a gas diffuser plate for distributing gas in a processing chamber are provided. The gas distribution plate includes a diffuser plate having an upstream side and a downstream side, and a plurality of gas passages passing between the upstream and downstream sides of the diffuser plate. The gas passages include hollow cathode cavities at the downstream side to enhance plasma ionization. The depths, the diameters, the surface area and density of hollow cathode cavities of the gas passages that extend to the downstream end can be gradually increased from the center to the edge of the diffuser plate to improve the film thickness and property uniformity across the substrate. The increasing diameters, depths and surface areas from the center to the edge of the diffuser plate can be created by bending the diffuser plate toward downstream side, followed by machining out the convex downstream side. Bending the diffuser plate can be accomplished by a thermal process or a vacuum process. The increasing diameters, depths and surface areas from the center to the edge of the diffuser plate can also be created computer numerically controlled machining. Diffuser plates with gradually increasing diameters, depths and surface areas of the hollow cathode cavities from the center to the edge of the diffuser plate have been shown to produce improved uniformities of film thickness and film properties. | 12-01-2011 |
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| 20090300759 | ATTACK PREVENTION TECHNIQUES - Techniques for detecting and responding to attacks on computer and network systems including denial-of-service (DoS) attacks. A packet is classified as potentially being an attack packet if it matches an access control list (ACL) specifying one or more conditions. One or more actions may be performed responsive to packets identified as potential attack packets. These actions may include dropping packets identified as potential attack packets for a period of time, rate limiting a port over which the potential attack packets are received for a period of time, and other actions. | 12-03-2009 |
| 20110066753 | VIRTUAL ROUTER REDUNDANCY FOR SERVER VIRTUALIZATION - A solution for virtual router redundancy for server virtualization includes, at a network device configured as a backup router of a virtual router, examining a packet stored in a memory of the network device. Responsive to the examining, the network device determines whether to forward the packet via a network towards a destination or to send the packet via the network to a master router of the virtual router for forwarding of the packet, by the master router, towards the destination. | 03-17-2011 |
| 20110113490 | TECHNIQUES FOR PREVENTING ATTACKS ON COMPUTER SYSTEMS AND NETWORKS - Techniques for detecting and responding to attacks on computer and network systems including denial-of-service (DoS) attacks. A packet is classified as potentially being an attack packet if it matches an access control list (ACL) specifying one or more conditions. One or more actions may be performed responsive to packets identified as potential attack packets. These actions may include dropping packets identified as potential attack packets for a period of time, rate limiting a port over which the potential attack packets are received for a period of time, and other actions. | 05-12-2011 |
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| 20090053882 | KRYPTON SPUTTERING OF THIN TUNGSTEN LAYER FOR INTEGRATED CIRCUITS - A method of depositing a bilayer of tungsten over tungsten nitride by a plasma sputtering process in which krypton is used as the sputter working gas during the tungsten deposition. Argon may be used as the sputtering working gas during the reactive sputtering deposition of tungsten nitride. The beneficial effect of reduction of tungsten resistivity is increased when the thickness of the tungsten layer is less than 50 nm and further increased when less than 35 nm. The method may be used in forming a gate stack including a polysilicon layer over a gate oxide layer over a silicon gate region of a MOS transistor in which the tungsten nitride acts as a barrier. A plasma sputter chamber in which the invention may be practiced includes gas sources of krypton, argon, and nitrogen. | 02-26-2009 |
| 20090142512 | APPARATUS AND METHOD FOR DEPOSITING ELECTRICALLY CONDUCTIVE PASTING MATERIAL - A method and apparatus are described for reducing particle contamination in a plasma processing chamber. In one embodiment, a pasting disk is provided which includes a disk-shaped base of high-resistivity material that has an electrically conductive pasting material layer applied to a top surface of the base so that the pasting material layer partially covers the top surface of the base. The pasting disk is sputter etched to deposit conductive pasting material over a wide area on the interior surfaces of a plasma processing chamber while minimizing deposition on dielectric components that are used to optimize the sputter etch process during substrate processing. | 06-04-2009 |
| 20090215264 | PROCESS FOR SELECTIVE GROWTH OF FILMS DURING ECP PLATING - Methods of controlling deposition of metal on field regions of a substrate in an electroplating process are provided. In one aspect, a dielectric layer is deposited under plasma on the field region of a patterned substrate, leaving a conductive surface exposed in the openings. Electroplating on the field region is reduced or eliminated, resulting in void-free features and minimal excess plating. In another aspect, a resistive layer, which may be a metal, is used in place of the dielectric. In a further aspect, the surface of the conductive field region is modified to change its chemical potential relative to the sidewalls and bottoms of the openings. | 08-27-2009 |
| 20100330795 | Krypton Sputtering of Low Resistivity Tungsten - A method of depositing a bilayer of tungsten over tungsten nitride by a plasma sputtering process in which krypton is used as the sputter working gas during the tungsten deposition. Argon may be used as the sputtering working gas during the reactive sputtering deposition of tungsten nitride. The beneficial effect of reduction of tungsten resistivity is increased when the thickness of the tungsten layer is less than 50 nm and further increased when less than 35 nm. The method may be used in forming a gate stack including a polysilicon layer over a gate oxide layer over a silicon gate region of a MOS transistor in which the tungsten nitride acts as a barrier. A plasma sputter chamber in which the invention may be practiced includes gas sources of krypton, argon, and nitrogen. | 12-30-2010 |
| 20110303960 | LOW RESISTIVITY TUNGSTEN PVD WITH ENHANCED IONIZATION AND RF POWER COUPLING - Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer. | 12-15-2011 |
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| 20110220505 | DROPLET MANIPULATIONS ON EWOD MICROELECTRODE ARRAY ARCHITECTURE - A method of manipulating droplet in a programmable EWOD microelectrode array comprising multiple microelectrodes, comprising: constructing a bottom plate with multiple microelectrodes on a top surface of a substrate covered by a dielectric layer; the microelectrode coupled to at least one grounding elements of a grounding mechanism, a hydrophobic layer on the top of the dielectric layer and the grounding elements; manipulating the multiple microelectrodes to configure a group of configured-electrodes to generate microfluidic components and layouts with selected shapes and sizes, comprising: a first configured-electrode with multiple microelectrodes arranged in array, and at least one second adjacent configured-electrode adjacent to the first configured-electrode, the droplet disposed on the top of the first configured-electrode and overlapped with a portion of the second adjacent-configured-electrode; and manipulating one or more droplets among multiple configured-electrodes by sequentially activating and de-activating one or more selected configured-electrodes to actuate droplets to move along selected route. | 09-15-2011 |
| 20110247934 | MICROELECTRODE ARRAY ARCHITECTURE - Disclosed herein is a device A device of the microelectrode array architecture, comprising: (a) a bottom plate comprising an array of multiple microelectrodes disposed on a top surface of a substrate covered by a dielectric layer; wherein each of the microelectrode is coupled to at least one grounding elements of a grounding mechanism, wherein a hydrophobic layer is disposed on the top of the dielectric layer and the grounding elements to make hydrophobic surfaces with the droplets; (b) a field programmability mechanism for programming a group of configured-electrodes to generate microfluidic components and layouts with selected shapes and sizes; and, (c) a system management unit, comprising: (i) a droplet manipulation unit; and (ii) a system control unit. | 10-13-2011 |
| 20110247938 | FIELD-PROGRAMMABLE LAB-ON-A-CHIP BASED ON MICROELECTRODE ARRAY ARCHITECTURE - The system relates to filed-programmable lab-on-chip (FPLOC) microfluidic operations, fabrications, and programming based on Microelectrode Array Architecture are disclosed herein. The FPLOC device by employing the microelectrode array architecture may include the following: (a) a bottom plate comprising an array of multiple microelectrodes disposed on a top surface of a substrate covered by a dielectric layer; wherein each of the microelectrode is coupled to at least one grounding elements of a grounding mechanism, wherein a hydrophobic layer is disposed on the top of the dielectric layer and the grounding elements to make hydrophobic surfaces with the droplets; (b) a field programmability mechanism for programming a group of configured-electrodes to generate microfluidic components and layouts with selected shapes and sizes; and, (c) a FPLOC functional block, comprising: (i) I/O ports; (ii) a sample preparation unit; (iii) a droplet manipulation unit; (iv) a detection unit; and (iv) a system control unit. | 10-13-2011 |
