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| 20100248398 | E-CHUCK FOR AUTOMATED CLAMPED FORCE ADJUSTMENT AND CALIBRATION - The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a wafer; measuring the wafer for wafer data after the first process; securing the wafer on an E-chuck in a processing chamber; collecting sensor data from a sensor embedded in the E-chuck; adjusting clamping forces to the E-chuck based on the wafer data and the sensor data; and thereafter performing a second process to the wafer secured on the E-chuck in the processing chamber. | 09-30-2010 |
| 20100268367 | METHOD FOR BIN-BASED CONTROL - A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity. | 10-21-2010 |
| 20100292824 | SYSTEM AND METHOD FOR IMPLEMENTING A WAFER ACCEPTANCE TEST ("WAT") ADVANCED PROCESS CONTROL ("APC") WITH NOVEL SAMPLING POLICY AND ARCHITECTURE - System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process. | 11-18-2010 |
| 20100294955 | METHOD AND SYSTEM OF MONITORING E-BEAM OVERLAY AND PROVIDING ADVANCED PROCESS CONTROL - A method for monitoring overlay of a direct-write system. The method includes providing a substrate having a pattern formed thereon by the direct-write system, generating data associated with the substrate pattern, decomposing the data by applying a transformation matrix, and determining an overlay index based on the decomposed data, the overlay index corresponding to a variation component of the substrate pattern relative to a target pattern. | 11-25-2010 |
| 20110042006 | E-CHUCK WITH AUTOMATED CLAMPED FORCE ADJUSTMENT AND CALIBRATION - The present disclosure describes a semiconductor manufacturing apparatus. The apparatus includes a processing chamber designed to perform a process to a wafer; an electrostatic chuck (E-chuck) configured in the processing chamber and designed to secure the wafer, wherein the E-chuck includes an electrode and a dielectric feature formed on the electrode; a tuning structure designed to hold the E-chuck to the processing chamber by clamping forces, wherein the tuning structure is operable to dynamically adjust the clamping forces; a sensor integrated with the E-chuck and sensitive to the clamping forces; and a process control module for controlling the tuning structure to adjust the clamping forces based on pre-measurement data from the wafer and sensor data from the sensor. | 02-24-2011 |
| 20110112678 | ADVANCED PROCESS CONTROL FOR NEW TAPEOUT PRODUCT - The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe. | 05-12-2011 |
| 20110238198 | METHOD AND SYSTEM FOR IMPLEMENTING VIRTUAL METROLOGY IN SEMICONDUCTOR FABRICATION - The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance. | 09-29-2011 |
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| 20090085898 | DATA PROCESSING MODULE FOR GENERATING DITHERED DATA AND METHOD THEREOF - A data processing module for generating dithered data includes a data transforming unit and a dithering unit, wherein the data transforming unit is utilized to transform input data into transformed data containing predetermined data, and the dithering unit is utilized to perform a dithering process on the transformed data to generate the dithered data. By making the display picture of the dithered data contain a fixed pattern corresponding to the predetermined data, the influence on the display picture caused by noise existing in the input data can be efficiently reduced. | 04-02-2009 |
| 20090085925 | DITHERING MASK AND METHOD OF FORMING THE SAME - A method of forming a dithering mask includes providing a specific sub-dithering mask, and generating a plurality of sub-dithering masks of the dithering mask by adjusting the specific sub-dithering mask. The dithering mask generated by the method includes a plurality of sub-dithering masks, each sub-dithering mask includes (4N)×(4N) dithering values, where N is an integer, and at least two sub-dithering masks of the plurality of sub-dithering masks have different contents. By breaking the regularity in the dithering mask, flickering patterns or visual patterns can be avoided on the screen, thereby raising the displaying quality of the screen. | 04-02-2009 |
| 20090129698 | METHOD AND DEVICE FOR ELIMINATING IMAGE BLUR BY PIXEL-BASED PROCESSING - A method for eliminating image blur includes: detecting the difference in pixel value between two corresponding pixels in two continuous images to generate a difference value; and adjusting the luminance of the two corresponding pixels according to the difference value, wherein when the difference value exceeds a predetermined value, the luminance of one pixel of the two corresponding pixels is increased and the luminance of the other pixel is decreased. | 05-21-2009 |
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| 20100141033 | EFFICIENT PWM CONTROLLER - This patent discloses an efficient PWM controller for generating a pulse signal in response to a feedback signal, capable of operating in a normal mode or a green mode, comprising: a capacitor for building a saw-tooth signal by current integration, the saw-tooth signal having a ramp-up period and a ramp-down period; a first composite current source for the ramp-up period, detachable into a first constant current source and a first variable current source; and a second composite current source for the ramp-down period, detachable into a second constant current source and a second variable current source; wherein, the first variable current source is attached to the first constant current source and the second variable current source is attached to the second constant current source respectively in the green mode. | 06-10-2010 |
| 20100315062 | QUASI-RESONANT VALLEY VOLTAGE DETECTING METHOD AND APPARATUS - The present invention discloses a quasi-resonant valley voltage detecting method, comprising the steps of: generating a valley detection signal by detecting a valley of a first quasi-resonant signal; generating a count value by counting the valley detection signal; and determining a level transition instance of a gating signal according to the count value, wherein the level transition instance of the gating signal is pulled back by the valley detection signal to trace the valley of the first quasi-resonant signal. The present invention also provides a quasi-resonant valley voltage detecting apparatus. | 12-16-2010 |
| 20110062886 | OPEN LOOP LED DRIVING CIRCUIT - The present invention discloses an open loop LED driving circuit, having a turn-on period and a turn-off period, the circuit comprising: a power stage, used to store a magnetic energy supplied from a voltage source during the turn-on period and deliver the magnetic energy to a set of LEDs during the turn-off period; and a control unit, having a turn-off period control terminal coupled to the voltage source, and a channel of which a first terminal is coupled to the power stage and a second terminal is coupled to a reference ground, wherein the channel is switched on at a time according to the voltage of the voltage source to determine the turn-off period. | 03-17-2011 |
| 20110133705 | INTEGRATED CIRCUIT FOR SYSTEM CALIBRATION - The present invention discloses an integrated circuit for system calibration, applicable to a power supply, comprising: a comparison module, having a feedback input end coupled to a feedback signal and a reference input end coupled to an analog reference signal for delivering a status signal; a detection and control module, for generating a reference signal and a calibration value according to the status signal, wherein the calibration value is derived from the reference signal at an instant when the status signal changes state, and the calibration value is stored into a calibration value register; a memory module, for receiving, storing and outputting the calibration value; and a reference signal generator, receiving the calibration value to provide the analog reference signal. The present invention can therefore be used to automatically calibrate a system with fewer external components to provide qualified systems. | 06-09-2011 |
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| 20100277100 | ELECTRONIC BALLAST WITH DIMMING CONTROL FROM POWER LINE SENSING - The present invention discloses an electronic ballast with dimming control from power line sensing for a fluorescent lamp, comprising: a line switching sensing circuit, used to generate a switching sensing signal by performing a voltage comparison operation on a DC voltage, and generate a reset signal according to the off time of the power line; a control voltage generator, used to generate a control voltage according to the count of said switching sensing signal; a voltage controlled oscillator, used to generate an oscillating signal according to the control voltage; and a non-overlapping driver, used to generate a high side driving signal and a low side driving signal according to the oscillating signal. | 11-04-2010 |
| 20100277101 | ELECTRONIC BALLAST WITH DIMMING CONTROL FROM POWER LINE SENSING - The present invention discloses an electronic ballast with dimming control from power line sensing for a fluorescent lamp, comprising: a line switching sensing circuit, used to generate a switching sensing signal by performing a voltage comparison operation on a DC voltage; an oscillating signal gating unit, used to gate an oscillating signal with a pulse signal to generate a gated oscillating signal, wherein the pulse width of the pulse signal is generated according to the switching sensing signal; and a non-overlapping driver, used to generate a high side driving signal and a low side driving signal according to the gated oscillating signal. | 11-04-2010 |
| 20100277102 | ELECTRONIC BALLAST WITH DIMMING CONTROL FROM POWER LINE SENSING - The present invention discloses an electronic ballast with dimming control from power line sensing for a fluorescent lamp, comprising: a line switching sensing circuit, used to generate a switching sensing signal by performing a voltage comparison operation on a DC voltage, and generate a reset signal according to the off time of the power line; a dimming voltage generator, used to generate a dimming voltage according to a count of the switching sensing signal; and a phase-controlled non-overlapping driver, used to generate a high side driving signal and a low side driving signal for delivering a lamp current according to the dimming voltage, wherein the dimming voltage is used to generate a phase, and the phase is used to generate the lamp current. | 11-04-2010 |
| 20110012536 | ELECTRONIC BALLAST WITH DIMMING CONTROL FROM POWER LINE SENSING - The present invention discloses an electronic ballast with dimming control from power line sensing for a fluorescent lamp, comprising: a control voltage generator, used to generate a control voltage according to a switching count of a power line; an oscillator, used to generate an oscillating signal, wherein the oscillating signal is of a fixed frequency and has a rising voltage portion and a falling voltage portion; and a comparator, used to generate a high side gating signal according to voltage comparison of the oscillating signal and the control voltage. | 01-20-2011 |
| 20110169425 | SINGLE CHIP BALLAST CONTROLLER FOR STEP-DIMMING OF A FLUORESCENT LAMP - The present invention relates a single chip ballast controller for step-dimming of a fluorescent lamp, comprising: a counting circuit, used to generate a switching count by counting the instances where the supply voltage falls below a threshold voltage; a reference voltage generator, used to generate a reference voltage proportional to the switching count; and a gating signal generator, used to generate a high side driving signal and a low side driving signal according to an error voltage between the reference voltage and a current sensing voltage to regulate the current sensing voltage at the reference voltage, wherein the current sensing voltage is proportional to a lamp current flowing through the fluorescent lamp. | 07-14-2011 |
