Patent application number | Description | Published |
20080233894 | REDUCTION OF SECOND-ORDER DISTORTION CAUSED BY TRANSMIT SIGNAL LEAKAGE - This disclosure describes techniques for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication system. In particular, the disclosure describes techniques for reducing adverse effects of second order distortion of TX signal leakage. To reduce or eliminate second order distortion of transmit signal leakage, a wireless device squares a combined signal that carries both a desired RX signal and a TX leakage signal. For example, the device may include a device that exhibits a strong, second order nonlinearity to, in effect, square the combined signal. The device subtracts the squared signal from the output of the mixer in the receive path, canceling out at least some of the second-order distortion caused by the mixer. In this manner, the device can reduce the adverse effects of second order distortion of TX signal leakage, and thereby enhance or maintain receiver sensitivity. | 09-25-2008 |
20080242245 | REJECTION OF TRANSMIT SIGNAL LEAKAGE IN WIRELESS COMMUNICATION DEVICE - This disclosure describes techniques for reducing adverse effects of transmit signal leakage in a full-duplex, wireless communication system. The disclosure describes techniques for reducing adverse effects of second order distortion and cross-modulation distortion of transmit signal leakage from a transmitter via a duplexer. The techniques may be effective in rejecting at least a portion of a transmit leakage signal, thereby reducing or eliminating distortion. The adaptive filter may include an estimator circuit that generates a transmit leakage signal estimate. A summer subtracts the estimate from the received signal to cancel transmit leakage and produce an output signal. The estimator circuit generates the transmit leakage signal estimate based on a reference signal and feedback from the output signal. The reference signal approximates the carrier signal used to generate the transmit signal in the transmitter. The reference signal may be provided by the same oscillator used to produce the transmit carrier signal. | 10-02-2008 |
20080242257 | FIELD EFFECT TRANSISTOR AMPLIFIER WITH LINEARIZATION - An amplifier comprises a source degeneration inductance and at least two field effect transistors coupled in parallel and having mutually different gate biasing. Source connections of the field effect transistors are coupled along different positions of the source degeneration inductance. | 10-02-2008 |
20090221235 | DYNAMIC REFERENCE FREQUENCY FOR FRACTIONAL-N PHASE-LOCKED LOOP - Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency. | 09-03-2009 |
20090252252 | HIGHLY LINEAR EMBEDDED FILTERING PASSIVE MIXER - A communication channel has a highly linear switched current mixer that incorporates passive filtering (e.g., low pass, notch) for improved transmitting (Tx) and receiving (Rx) with adding external filtering components. A high IIP | 10-08-2009 |
20100022206 | TRANSMISSION NOISE CANCELLATION - Exemplary embodiments of the disclosure are directed to down-converting an RF signal of a transmitter to baseband, filtering the down-converted signal, and generating a composite signal based on the filtered down-converted signal and a transmission based-band signal. | 01-28-2010 |
20100244927 | SPUR ATTENUATION DEVICES, SYSTEMS, AND METHODS - Exemplary embodiments of the invention disclose signal filtering. In an exemplary embodiment, a filter device may comprise a subtractor operably coupled between an input and an output and configured to receive an input signal comprising a desired component and at least one undesired frequency component. The filter device may further include a feedback loop configured to receive at least one of the input signal and an output signal from the subtractor and convey a feedback signal comprising at least one undesired component to the subtractor. Each undesired component of the feedback signal corresponds to an associated undesired component of the input signal. Furthermore, the subtractor subtracts the feedback signal from the input signal and convey the output signal | 09-30-2010 |
20100322346 | TRANSMITTER ARCHITECTURES - Techniques for generating a transmit (TX) signal with improved characteristics in the presence of interference such as noise and distortion. In one aspect, the TX output signal is used to generate a reconstructed signal having the characteristics of the interference, and the reconstructed signal is subtracted from the baseband TX signal. The reconstructed signal may be generated by high-pass filtering the TX output signal at baseband. Alternatively, the reconstructed signal may be generated from a reference signal Ref derived from the baseband TX signal. | 12-23-2010 |
20100323641 | METHOD AND APPARATUS FOR USING PRE-DISTORTION AND FEEDBACK TO MITIGATE NONLINEARITY OF CIRCUITS - Techniques for mitigating nonlinearity of circuits with both pre-distortion and feedback are described. An apparatus may include at least one circuit (e.g., an upconverter, a power amplifier, etc.), a pre-distortion circuit, and a feedback circuit. The circuit(s) may generate an output signal having distortion components due to their nonlinearity. The pre-distortion circuit may receive an input signal and generate a pre-distorted signal based on at least one coefficient determined by the nonlinearity of the circuit(s). The pre-distortion circuit may adaptively determine the coefficient(s) based on the input signal and an error signal. The feedback circuit may generate the error signal based on the input signal and the output signal and may filter the error signal to obtain a filtered error signal. The circuit(s) may process the pre-distorted signal and the filtered error signal to generate the output signal, which may have attenuated distortion components due to pre-distortion and feedback. | 12-23-2010 |
20100327932 | FEEDBACK SYSTEM WITH IMPROVED STABILITY - Techniques for improving stability of a feedback system are described. In an exemplary design, the feedback system includes a forward path and a feedback path. The forward path receives an input signal and a rotated feedback signal and provides an output signal having a phase shift. The feedback path receives the output signal, generates a feedback signal, and rotates the feedback signal to obtain the rotated feedback signal having at least part of the phase shift removed. In another exemplary design, the feedback system includes a forward path and a feedback loop. The forward path receives a combined signal and provides an output signal having a phase shift. The feedback loop generates an error signal based on an input signal and the output signal, generates the combined signal based on the error signal and the input signal, and performs phase rotation to remove at least part of the phase shift. | 12-30-2010 |
20110270590 | NONLINEAR IDENTIFICATION USING COMPRESSED SENSING AND MINIMAL SYSTEM SAMPLING - Compressed sensing is used to determine a model of a nonlinear system. In one example, L1-norm minimization is used to fit a generic model function to a set of samples thereby obtaining a fitted model. Convex optimization can be used to determine model coefficients that minimize the L1-norm. In one application, the fitted model is used to calibrate a predistorter. In another application, the fitted model function is used to predict future actions of the system. The generic model is made of up of constituent functions that may or may not be orthogonal to one another. In one example, an initial model function of non-orthogonal constituent functions is orthogonalized to generate a generic model function of constituent orthogonal functions. Although the number of samples to which the generic model is fitted can be less than the number of model coefficients, the fitted model nevertheless accurately models system nonlinearities. | 11-03-2011 |
20120011087 | METHODS AND SYSTEMS FOR REPLACEABLE SYNAPTIC WEIGHT STORAGE IN NEURO-PROCESSORS - Certain embodiments of the present disclosure support techniques for storing synaptic weights separately from a neuro-processor chip into a replaceable storage. The replaceable synaptic memory gives a unique functionality to the neuro-processor and improves its flexibility for supporting a large variety of applications. In addition, the replaceable synaptic storage can provide more choices for the type of memory used, and might decrease the area and implementation cost of the overall neuro-processor chip. | 01-12-2012 |
20120011088 | COMMUNICATION AND SYNAPSE TRAINING METHOD AND HARDWARE FOR BIOLOGICALLY INSPIRED NETWORKS - Certain embodiments of the present disclosure support techniques for training of synapses in biologically inspired networks. Only one device based on a memristor can be used as a synaptic connection between a pair of neurons. The training of synaptic weights can be achieved with a low current consumption. A proposed synapse training circuit may be shared by a plurality of incoming/outgoing connections, while only one digitally implemented pulse-width modulation (PWM) generator can be utilized per neuron circuit for generating synapse-training pulses. Only up to three phases of a slow clock can be used for both the neuron-to-neuron communications and synapse training. Some special control signals can be also generated for setting up synapse training events. By means of these signals, the synapse training circuit can be in a high-impedance state outside the training events, thus the synaptic resistance (i.e., the synaptic weight) is not affected outside the training process. | 01-12-2012 |
20120011089 | METHODS AND SYSTEMS FOR NEURAL PROCESSOR TRAINING BY ENCOURAGEMENT OF CORRECT OUTPUT - Certain embodiments of the present disclosure support implementation of a neural processor with synaptic weights, wherein training of the synapse weights is based on encouraging a specific output neuron to generate a spike. The implemented neural processor can be applied for classification of images and other patterns. | 01-12-2012 |
20120011090 | METHODS AND SYSTEMS FOR THREE-MEMRISTOR SYNAPSE WITH STDP AND DOPAMINE SIGNALING - The present disclosure proposes implementation of a three-memristor synapse where an adjustment of synaptic strength is based on Spike-Timing-Dependent Plasticity (STDP) with dopamine signaling. | 01-12-2012 |
20120011091 | METHODS AND SYSTEMS FOR CMOS IMPLEMENTATION OF NEURON SYNAPSE - Certain embodiments of the present disclosure support techniques for power efficient implementation of neuron synapses with positive and/or negative synaptic weights. | 01-12-2012 |
20120011093 | METHODS AND SYSTEMS FOR DIGITAL NEURAL PROCESSING WITH DISCRETE-LEVEL SYNAPES AND PROBABILISTIC STDP - Certain embodiments of the present disclosure support implementation of a digital neural processor with discrete-level synapses and probabilistic synapse weight training. | 01-12-2012 |
20120208473 | FRONT-END RF FILTERS WITH EMBEDDED IMPEDANCE TRANSFORMATION - Front-end radio frequency (RF) filters with embedded impedance transformation are disclosed. In an exemplary design, an apparatus includes an active circuit and an RF filter. The active circuit receives an input signal and provides an output signal. The RF filter is operatively coupled to an antenna and the active circuit and performs filtering for the input signal or output signal. The RF filter is impedance matched to the active circuit and includes a non-LC filter. In an exemplary design, the active circuit includes a low noise amplifier (LNA), and the RF filter includes a receive (RX) filter having an output impedance that is matched to an input impedance of the LNA. In another exemplary design, the active circuit includes a power amplifier, and the RF filter includes a transmit (TX) filter having an input impedance that is matched to an output impedance of the power amplifier. | 08-16-2012 |
20120211812 | HIGH-SPEED HIGH-POWER SEMICONDUCTOR DEVICES - High-speed high-power semiconductor devices are disclosed. In an exemplary design, a high-speed high-power semiconductor device includes a source, a drain to provide an output signal, and an active gate to receive an input signal. The semiconductor device further includes at least one field gate located between the active gate and the drain, at least one shallow trench isolation (STI) strip formed transverse to the at least one field gate, and at least one drain active strip formed parallel to, and alternating with, the at least one STI strip. The semiconductor device may be modeled by a combination of an active FET and a MOS varactor. The active gate controls the active FET, and the at least one field gate controls the MOS varactor. The semiconductor device has a low on resistance and can handle a high voltage. | 08-23-2012 |
20120236958 | REDUCED POWER-CONSUMPTION TRANSMITTERS - An exemplary embodiment discloses a digital control block for dynamically regulating power consumption of the transmitter; and a first driver amplifier circuit comprising a plurality of bias-modes each corresponding to a power consumption level in the transmitter, the digital control block to instruct the first driver amplifier circuit to operate in a selected bias-mode to regulate power consumption of the transmitter. | 09-20-2012 |
20120303566 | METHOD AND APPARATUS FOR UNSUPERVISED TRAINING OF INPUT SYNAPSES OF PRIMARY VISUAL CORTEX SIMPLE CELLS AND OTHER NEURAL CIRCUITS - Certain aspects of the present disclosure present a technique for unsupervised training of input synapses of primary visual cortex (V1) simple cells and other neural circuits. The proposed unsupervised training method utilizes simple neuron models for both Retinal Ganglion Cell (RGC) and V1 layers. The model simply adds the weighted inputs of each cell, wherein the inputs can have positive or negative values. The resulting weighted sums of inputs represent activations that can also be positive or negative. In an aspect of the present disclosure, the weights of each V1 cell can be adjusted depending on a sign of corresponding RGC output and a sign of activation of that V1 cell in the direction of increasing the absolute value of the activation. The RGC-to-V1 weights can be positive and negative for modeling ON and OFF RGCs, respectively. | 11-29-2012 |
20120303567 | METHOD AND APPARATUS OF PRIMARY VISUAL CORTEX SIMPLE CELL TRAINING AND OPERATION - Certain aspects of the present disclosure present a technique for primary visual cortex (V1) cell training and operation. The present disclosure proposes a model structure of V1 cells and retinal ganglion cells (RGCs), and an efficient method of training connectivity between these two layers of cells such that the proposed method leads to an autonomous formation of feature detectors within the V1 layer. The proposed approach enables a hardware-efficient and biological-plausible implementation of image recognition and motion detection systems. | 11-29-2012 |
20120330870 | METHOD AND APPARATUS FOR A LOCAL COMPETITIVE LEARNING RULE THAT LEADS TO SPARSE CONNECTIVITY - Certain aspects of the present disclosure support a local competitive learning rule applied in a computational network that leads to sparse connectivity among processing units of the network. The present disclosure provides a modification to the Oja learning rule, modifying the constraint on the sum of squared weights in the Oja rule. This constraining can be intrinsic and local as opposed to the commonly used multiplicative and subtractive normalizations, which are explicit and require the knowledge of all input weights of a processing unit to update each one of them individually. The presented rule provides convergence to a weight vector that is sparser (i.e., has more zero elements) than the weight vector learned by the original Oja rule. Such sparse connectivity can lead to a higher selectivity of processing units to specific features, and it may require less memory to store the network configuration and less energy to operate it. | 12-27-2012 |
20130117209 | METHOD AND APPARATUS FOR USING MEMORY IN PROBABILISTIC MANNER TO STORE SYNAPTIC WEIGHTS OF NEURAL NETWORK - Certain aspects of the present disclosure support a technique for utilizing a memory in probabilistic manner to store information about weights of synapses of a neural network. | 05-09-2013 |
20130204819 | METHODS AND APPARATUS FOR SPIKING NEURAL COMPUTATION - Certain aspects of the present disclosure provide methods and apparatus for spiking neural computation of general linear systems. One example aspect is a neuron model that codes information in the relative timing between spikes. However, synaptic weights are unnecessary. In other words, a connection may either exist (significant synapse) or not (insignificant or non-existent synapse). Certain aspects of the present disclosure use binary-valued inputs and outputs and do not require post-synaptic filtering. However, certain aspects may involve modeling of connection delays (e.g., dendritic delays). A single neuron model may be used to compute any general linear transformation x=AX+BU to any arbitrary precision. This neuron model may also be capable of learning, such as learning input delays (e.g., corresponding to scaling values) to achieve a target output delay (or output value). Learning may also be used to determine a logical relation of causal inputs. | 08-08-2013 |
20130204820 | METHODS AND APPARATUS FOR SPIKING NEURAL COMPUTATION - Certain aspects of the present disclosure provide methods and apparatus for spiking neural computation of general linear systems. One example aspect is a neuron model that codes information in the relative timing between spikes. However, synaptic weights are unnecessary. In other words, a connection may either exist (significant synapse) or not (insignificant or non-existent synapse). Certain aspects of the present disclosure use binary-valued inputs and outputs and do not require post-synaptic filtering. However, certain aspects may involve modeling of connection delays (e.g., dendritic delays). A single neuron model may be used to compute any general linear transformation x=AX+BU to any arbitrary precision. This neuron model may also be capable of learning, such as learning input delays (e.g., corresponding to scaling values) to achieve a target output delay (or output value). Learning may also be used to determine a logical relation of causal inputs. | 08-08-2013 |
20130335291 | DUAL/WIDEBAND TERMINATION FOR HYBRID TRANSFORMER - A wireless device is described. The wireless device includes an antenna. The wireless device also includes a hybrid transformer. The wireless device further includes a frequency matching termination port. The frequency matching termination port provides impedance matching with the antenna at multiple frequencies. The frequency matching termination port may include multiple resistors, inductors and capacitors that can be switched in/out. | 12-19-2013 |
20140170999 | INDEPENDENT GAIN CONTROL FOR MULTIPLE RECEIVE CIRCUITS CONCURRENTLY PROCESSING DIFFERENT TRANSMITTED SIGNALS - Techniques for simultaneously receiving multiple transmitted signals with independent gain control are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a low noise amplifier (LNA) and first and second receive circuits. The LNA amplifies a receiver input signal and provides (i) a first amplified signal for a first set of at least one transmitted signal being received and (ii) a second amplified signal for a second set of at least one transmitted signal being received. The first receive circuit scales the first amplified signal based on a first adjustable gain selected for the first set of transmitted signal(s). The second receive circuit scales the second amplified signal based on a second adjustable gain selected for the second set of transmitted signal(s). The first and second adjustable gains may be independently selected, e.g., based on the received powers of the transmitted signals. | 06-19-2014 |
20140247757 | MULTI-TAP ADAPTIVE FILTER FOR TRANSMIT SIGNAL LEAKAGE CANCELLATION - Exemplary embodiments are directed to systems, devices, and methods for mitigating effects of transmit signal leakage. A transceiver may include a transmitter and a receiver. The transceiver may further include a multi-tap analog adaptive filter coupled to each of the transmitter and the receiver and configured to generate an estimated transmit leakage signal based on at least a portion of a transmit signal from the transmitter and an error signal from the receiver. | 09-04-2014 |
20140269864 | TRANSMIT LEAKAGE CANCELLATION - A transceiver for reducing transmit signal leakage is described. The transceiver includes a downconverter that downconverts a receive signal to produce a feedback signal. The transceiver also includes a weight learning module that correlates the feedback signal with a transmit signal to obtain a weight. The transceiver further includes a transmit leakage estimator that obtains an estimated transmit leakage signal based on the weight and the transmit signal. The transceiver also includes a transmit leakage reducer that reduces the transmit leakage in the receive signal based on the estimated transmit leakage signal. | 09-18-2014 |
20140269865 | ANALOG BASEBAND INTERFACE BETWEEN TRANSCEIVER AND MODEM - A wireless device for interfacing between a transceiver and a modem is described. The wireless device includes the transceiver. The transceiver generates a combined signal. The combined signal includes a first signal band from a first received signal and a second signal band from a second received signal at offset frequencies. The wireless device includes an analog baseband interface for providing the combined signal from the transceiver to the modem. The wireless device also includes the modem. The modem generates a downconverted/filtered signal for each of the signal bands of the combined signal. | 09-18-2014 |
20140269991 | TRANSMIT (TX) INTERFERENCE CANCELLER AND POWER DETECTOR - A method for Tx interference cancellation and power detection in a wireless device is described. A portion of a Tx output signal is down-converted to generate a feedback signal. A reconstructed interference signal and a weight are generated based on the feedback signal. A Tx power level is detected based on the weight. The reconstructed interference signal is subtracted from the Tx output signal. | 09-18-2014 |
20140329484 | JAMMER RESISTANT NOISE CANCELLING RECEIVER FRONT END - Techniques for providing a jammer-resistant noise-cancelling receiver front end with band-pass impedance matching and good power efficiency. In an aspect, the center frequency of the band-pass impedance matching advantageously tracks the local oscillator frequency. In an aspect, first and second receive signal paths are provided, with an R-C network coupled to the output of the second receive signal path. The resistance of the R-C network may be selected to provide band-pass impedance matching to the RF input signal. The current outputs of the first and second signal paths are combined using a trans-impedance amplifier (TIA). In an aspect, the TIA may be implemented using a dual input transconductor amplifier to further optimize the noise performance and power efficiency features of the disclosure. | 11-06-2014 |