Vasani
Amit Vasani, Scotch Plains, NJ US
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20130054281 | METHODS AND SYSTEMS FOR RIDESHARE - This disclosure relates to a method, article of manufacture, and apparatus for rideshare. In some embodiments, this includes receiving at least one participant data, at least one vehicle data, and at least one trip interest, wherein each of the one participant data comprises a personal communication device identifier associated with a personal communication device, forming a contract for a rideshare trip among participants, wherein the contract includes trip cost payment terms and alternative transportation cost payment terms in case of a plurality of contract transactions, monitoring from a rideshare platform a performance of the rideshare trip, based on the performance, calculating costs associated with the rideshare trip and determining contract transactions according to the contract, performing the contract transactions, and allocating carbon credits in the rideshare trip. | 02-28-2013 |
Anand Jitendra Vasani, Irvine, CA US
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20110316634 | HIGH SPEED LOW POWER MULTIPLE STANDARD AND SUPPLY OUTPUT DRIVER - A multi-mode driver and method therefore includes a plurality of amplifiers, an adjustable load block, and adjustable current supply circuitry that selectively adjusts current magnitudes supplied to at least one of the plurality of amplifiers. The multi-mode driver can operate in a KR mode with a higher voltage supply, an SR4 mode with the higher voltage supply, and an SFI mode with a lower voltage supply. To support these modes, the multi-mode driver selectively operates a plurality of amplifiers, adjusts current magnitudes supplied to the amplifiers, and selectively adjusts an adjustable load. Thus, the multi-mode driver is operable to selectively and efficiently produce high swing and low swing output signals and to efficiently operate with any one of a plurality of supplies. The driver includes selectable loads and parallel-coupled amplifier devices that are selected based on mode. | 12-29-2011 |
20120328063 | Low Latency High Bandwidth CDR Architecture - Provided is a low latency high bandwidth clock and data recovery (CDR) system. For example, there is a low latency high bandwidth CDR system including a demultiplexer configured to convert a high frequency input datastream to a low frequency output datastream according to a first latency and a phase error processor at least partially embedded into the demultiplexer and configured to determine a datastream phase error of the high frequency input datastream according to a second latency. The embedded phase error processor allows a portion of a total latency of the CDR system due to the demultiplexer and the phase error processor to be less than a sum of the first and second latencies. | 12-27-2012 |
Soam Vasani, Palo Alto, CA US
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20150058384 | SCALABLE DISTRIBUTED STORAGE ARCHITECTURE - Techniques are disclosed for providing a file system interface for an object store intended to support simultaneous access to objects stored in the object store by multiple clients. In accordance with one method, an abstraction of a root directory to a hierarchical namespace for the object store is exposed to clients. The object store is backed by a plurality of physical storage devices housed in or directly attached to the plurality of host computers and internally tracks its stored objects using a flat namespace that maps unique identifiers to the stored objects. The creation of top-level objects appearing as subdirectories of the root directory is enabled, wherein each top-level object represents a separate abstraction of a storage device having a separate namespace that can be organized in accordance with any designated file system. | 02-26-2015 |