Patent application number | Description | Published |
20090240872 | MEMORY DEVICE WITH MULTIPLE-ACCURACY READ COMMANDS - A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer than the first accuracy. A condition is evaluated with respect to a read operation that is to be performed over a given group of the memory cells. One of the first and second read commands is selected responsively to the evaluated condition. The storage values are read from the given group of the memory cells using the selected read command. | 09-24-2009 |
20100091535 | ADAPTIVE ESTIMATION OF MEMORY CELL READ THRESHOLDS - A method for operating a memory ( | 04-15-2010 |
20100124088 | STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 05-20-2010 |
20100131827 | MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT - A method for operating a memory ( | 05-27-2010 |
20100157675 | PROGRAMMING ORDERS FOR REDUCING DISTORTION IN ARRAYS OF MULTI-LEVEL ANALOG MEMORY CELLS - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-24-2010 |
20100220509 | Selective Activation of Programming Schemes in Analog Memory Cell Arrays - A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. | 09-02-2010 |
20120163079 | Programming Orders for Reducing Distortion Based on Neighboring Rows - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-28-2012 |
20120163080 | Reducing Distortion Using Joint Storage - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-28-2012 |
20120201078 | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 08-09-2012 |
20130121080 | Adaptive Estimation of Memory Cell Read Thresholds - A method for operating a memory ( | 05-16-2013 |
20130227231 | MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT - A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data. | 08-29-2013 |
20140029338 | STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 01-30-2014 |
20140157083 | REDUNDANT DATA STORAGE SCHEMES FOR MULTI-DIE MEMORY SYSTEMS - A method for data storage includes storing data in a memory that includes one or more memory units, each memory unit including memory blocks. The stored data is compacted by copying at least a portion of the data from a first memory block to a second memory block, and subsequently erasing the first memory block. Upon detecting a failure in the second memory block after copying the portion of the data and before erasure of the first memory block, the portion of the data is recovered by reading the portion from the first memory block. | 06-05-2014 |
20140157085 | REDUNDANT DATA STORAGE SCHEMES FOR MULTI-DIE MEMORY SYSTEMS - A method for data storage includes storing data in a memory that includes one or more memory units, each memory unit including memory blocks. The stored data is compacted by copying at least a portion of the data from a first memory block to a second memory block, and subsequently erasing the first memory block. Upon detecting a failure in the second memory block after copying the portion of the data and before erasure of the first memory block, the portion of the data is recovered by reading the portion from the first memory block. | 06-05-2014 |
20140201433 | SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS - A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. | 07-17-2014 |
20140237322 | STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 08-21-2014 |
20140298139 | MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT - A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data. | 10-02-2014 |
20140340965 | SELECTIVE RE-PROGRAMMING OF ANALOG MEMORY CELLS - A method for data storage includes defining, in a memory that includes multiple analog memory cells, an erased state, a set of non-erased programming states and a partial subset of the non-erased programming states. Data is initially stored in a first group of the analog memory cells by programming each of at least some of the memory cells in the first group from the erased state to a respective non-erased programming state selected from the set of non-erased programming states. After initially storing the data, a second group of the analog memory cells, which potentially cause interference to the first group, is programmed. After programming the second group, the first group is selectively re-programmed with the data by repeating programming of only the memory cells in the first group whose respective programming states belong to the partial subset. | 11-20-2014 |
20150055388 | SELECTIVE ACTIVATION OF PROGRAMMING SCHEMES IN ANALOG MEMORY CELL ARRAYS - A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. | 02-26-2015 |
20150081973 | HIERARCHICAL DATA STORAGE SYSTEM - A data storage system includes a plurality of non-volatile memory devices arranged in one or more sets, a main controller and one or more processors. The main controller is configured to accept commands from a host and to convert the commands into recipes. Each recipe includes a list of multiple memory operations to be performed sequentially in the non-volatile memory devices belonging to one of the sets. Each of the processors is associated with a respective set of the non-volatile memory devices, and is configured to receive one or more of the recipes from the main controller and to execute the memory operations specified in the received recipes in the non-volatile memory devices belonging to the respective set. | 03-19-2015 |
Patent application number | Description | Published |
20100046547 | METHOD AND APPARATUS FOR FRAME CONTROL HEADER DECODING - A method and apparatus for decoding a frame control header message in a wireless communication transmission are disclosed. The method comprises assuming at least some of the bits comprising the frame control header message are constant across multiple frames or are known a priori and generating metrics at least from the bits of the frame control header message that are assumed to be constant or are known a priori. The method further comprises decoding the metrics, for example, with a Viterbi decoder or using chase combining, to yield the decode frame control header message. | 02-25-2010 |
20120254696 | EFFICIENT RE-READ OPERATIONS IN ANALOG MEMORY CELL ARRAYS - A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data. | 10-04-2012 |
20120260147 | Efficient Readout from Analog Memory Cells Using Data Compression - A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. | 10-11-2012 |
20120262971 | Selective Activation of Programming Schemes in Analog Memory Cell Arrays - A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. | 10-18-2012 |
20120268990 | SELECTIVE RE-PROGRAMMING OF ANALOG MEMORY CELLS - A method for data storage includes defining, in a memory that includes multiple analog memory cells, an erased state, a set of non-erased programming states and a partial subset of the non-erased programming states. Data is initially stored in a first group of the analog memory cells by programming each of at least some of the memory cells in the first group from the erased state to a respective non-erased programming state selected from the set of non-erased programming states. After initially storing the data, a second group of the analog memory cells, which potentially cause interference to the first group, is programmed. After programming the second group, the first group is selectively re-programmed with the data by repeating programming of only the memory cells in the first group whose respective programming states belong to the partial subset. | 10-25-2012 |
20120272122 | EFFICIENT RE-READ OPERATIONS IN ANALOG MEMORY CELL ARRAYS - A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data. | 10-25-2012 |
20120297271 | DATA SCRAMBLING SCHEMES FOR MEMORY DEVICES - A method for data storage includes defining a set of scrambling sequences, each sequence including bits in respective bit positions having bit values, such that a distribution of the bit values in any give bit position satisfies a predefined statistical criterion. Each data word is scrambled using a respective scrambling sequence selected from the set. The scrambled data words are stored in the memory device. | 11-22-2012 |
Patent application number | Description | Published |
20080267059 | Methods and arrangements to determine a reception of a signal - Methods and arrangements for wireless communications are described. Embodiments include transformations, code, state machines or other logic to receive from a transmitter a signal representing a known sequence of symbols. The signal may be transmitted over a plurality of sub channels. The embodiments may also include determining channel responses at the sub channels and determining a reception of the known sequence. The determining may include treating the channel responses at the sub channels in a differential manner to cancel out channel phase responses and obtain channel amplitudes. In some embodiments, the cancelling may be performed by multiplying frequency domain values representing reception of a sub channel by the complex conjugate of frequency domain values of a neighboring sub channel. Many embodiments may also include calculating a carrier to interference and noise ratio (CINR) of the signal. In several embodiments, the signal may represent the preamble of a wireless frame. | 10-30-2008 |
20090003471 | OFDM signal acquisition - In general, in one aspect, the disclosure describes a method defining order and means in which physical parameters of a received OFDM signal may be detected. A fractional frequency offset is determined for the OFDM signal and is used to determine a coarse location for received signal preamble. A symbol boundary is determined based on the coarse location and the course location is used to determine preamble location. A preamble sequence and integer frequency offset is determined based on the preamble location. | 01-01-2009 |
20090144600 | Efficient re-read operations from memory devices - A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. | 06-04-2009 |
20090158126 | EFFICIENT INTERFERENCE CANCELLATION IN ANALOG MEMORY CELL ARRAYS - A method includes storing data in a group of analog memory cells by writing first storage values to the cells. After storing the data, second storage values are read from the cells using one or more first read thresholds. Third storage values that potentially cause cross-coupling interference in the second storage values are identified, and the third storage values are processed, to identify a subset of the second storage values as severely-interfered values. Fourth storage values are selectively re-read from the cells holding the severely-interfered values using one or more second read thresholds, different from the first read thresholds. The cross-coupling interference in the severely-interfered storage values is canceled using the re-read fourth storage values. The second storage values, including the severely-interfered values in which the cross-coupling interference has been canceled, are processed so as to reconstruct the data stored in the cell group. | 06-18-2009 |
20090213653 | PROGRAMMING OF ANALOG MEMORY CELLS USING A SINGLE PROGRAMMING PULSE PER STATE TRANSITION - A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse. | 08-27-2009 |
20090213654 | PROGRAMMING ANALOG MEMORY CELLS FOR REDUCED VARIANCE AFTER RETENTION - A method includes defining a nominal level of a physical quantity to be stored in analog memory cells for representing a given data value. The given data value is written to the cells in first and second groups of the cells, which have respective first and second programming responsiveness such that the second responsiveness is different from the first responsiveness, by applying to the cells in the first and second groups respective, different first and second patterns of programming pulses that are selected so as to cause the cells in the first and second groups to store respective levels of the physical quantity that fall respectively in first and second ranges, such that the first range is higher than and the second range is lower than the nominal level. The given data value is read from the cells at a later time. | 08-27-2009 |
20140325308 | Efficient Re-read Operations in Analog Memory Cell Arrays - A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data. | 10-30-2014 |