Patent application number | Description | Published |
20090253186 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 10-08-2009 |
20090253187 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-succinylhomoserine, and a method of producing L-methionine precursor using the microorganism, | 10-08-2009 |
20110207184 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 08-25-2011 |
20120190080 | O-PHOSPHOSERINE SULFHYDRYLASE MUTANTS AND METHOD FOR PRODUCTION OF CYSTEINE USING THE SAME - Disclosed is an O-phosphoserine sulfhydrylase (OPSS) mutant which has a | 07-26-2012 |
20120190083 | MICROORGANISM PRODUCING O-PHOSPHOSERINE AND METHOD OF PRODUCING L-CYSTEINE OR DERIVATIVES THEREOF FROM O-PHOSPHOSERINE USING THE SAME - The present invention provides methods for the production of cysteine or derivates thereof by culturing a microorganism having reduced activity of endogenous phosphoserine phosphatase and the activity of PhnC, PhnD, and PhnE is reduced, and enhanced activity of phosphoglycerate dehydrogenase and/or phosphoserine aminotransferase. The O-phosphoserine produced by such an organism can then be reacted with a sulfide in the presence of a sulfydrylase or a microorganism expressing a sulfhydrylase to produce cysteine or a derivative thereof. Microorganisms having these reduced and enhanced properties noted above are also provided herein. | 07-26-2012 |
20130344545 | MICROBES WITH AN IMPROVED ABILITY TO PRODUCE ORNITHINE AND METHOD FOR PRODUCING ORNITHINE USING SAME - The present invention relates to a microorganism having an improved ornithine-producing ability, in which the biosynthetic pathway of arginine form ornithine is blocked, the intracellular glutamate level is increased, and the biosynthetic pathway of ornithine from glutamate is enhanced, and a method for producing ornithine using the microorganism. | 12-26-2013 |
20140004577 | MICROORGANISMS FOR PRODUCING PUTRESCINE AND METHOD FOR PRODUCING PUTRESCINE USING SAME | 01-02-2014 |
Patent application number | Description | Published |
20150041884 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - There is provided a power semiconductor device including: a first semiconductor region of a first conductivity type; second semiconductor regions formed in the first semiconductor region and being of a second conductivity type; a well region formed above the second semiconductor regions and being of the second conductivity type; and a source region formed in the well region and being of the first conductivity type, wherein the second semiconductor regions include 1 to n layers formed from a lower portion of the device extending a in a direction of height of the device, and in the case that the widest width of the of the second semiconductor region of the n | 02-12-2015 |
20150144989 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A power semiconductor device may include: a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed on the first semiconductor region; a third semiconductor region having the first conductivity type and formed in an upper portion of the second semiconductor region; a trench gate formed to penetrate from the third semiconductor region to the first semiconductor region, having a gate insulating layer formed on a surface thereof, and filled with a conductive material; and a fourth semiconductor region having the second conductivity type and formed to penetrate through the second semiconductor region. | 05-28-2015 |
20150144990 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A power semiconductor device may include a first semiconductor region having a first conductivity type, a second semiconductor region having a second conductivity type formed on an upper portion of the first semiconductor region, a third semiconductor region having a first conductivity type formed in an inner portion of an upper portion of the second semiconductor region, a trench gate formed to penetrate from the third semiconductor region to the first semiconductor region and including a first insulating layer formed on a surface thereof, and a second insulating layer formed in a lower portion of the trench gate. | 05-28-2015 |
20150144993 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; a termination region formed in the vicinity of the active region; a plurality of first trenches formed lengthwise in one direction in the active region; and at least one or more second trenches formed lengthwise in one direction in the termination region. The second trench has a depth deeper than that of the first trench. | 05-28-2015 |
20150187678 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: a first conductivity-type first semiconductor layer; a second conductivity-type second semiconductor layer disposed above the first semiconductor layer; and a heat dissipation trench disposed to penetrate from an upper surface of the second semiconductor layer into a portion of the second semiconductor layer and having an insulating layer disposed on a surface thereof. | 07-02-2015 |
20150187869 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: a first conductivity-type first semiconductor region; a resurf region disposed in the first semiconductor region and including first conductivity-type second semiconductor regions and second conductivity-type third semiconductor regions alternately disposed in a width direction; a first conductivity-type first cover region disposed in the first semiconductor region, disposed to be contiguous with an upper surface of the resurf region, and having an impurity concentration higher than that of the first semiconductor region; a second conductivity-type fourth semiconductor region disposed above the first semiconductor region; a first conductivity-type fifth semiconductor region disposed on an inner side of an upper portion of the fourth semiconductor region; and a trench gate disposed to penetrate from the fifth semiconductor region to a portion of an upper portion of the first semiconductor region and including a gate insulating layer and a conductive material. | 07-02-2015 |
20150187877 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include: an active region having a channel formed therein when the power semiconductor device is turned on, the channel allowing a current to flow therethrough; a termination region formed around the active region; first trenches formed in the active region, each first trench having an insulating layer formed on a surface thereof and filled with a conductive material; and second trenches formed in the termination region, each second trench having an insulating layer formed on a surface thereof and filled with a conductive material. | 07-02-2015 |
20150187882 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND POWER SEMICONDUCTOR DEVICE INCLUDING THE SAME - A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer. | 07-02-2015 |
20150187921 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device may include a first semiconductor region having a first conductivity type; a second semiconductor region having a second conductivity type and formed in an upper portion of the first semiconductor region; a third semiconductor region having a first conductivity type and formed in an upper portion of the second semiconductor region; and a trench gate formed by penetrating from the third semiconductor region to the first semiconductor region. A portion of at least one of the first semiconductor region, the second semiconductor region, and the third semiconductor region may include a device protection material of which a conduction band has a main state and a satellite state in an E-k diagram, and a curvature of the device protection material in the satellite state may be lower than a curvature thereof in the main state in the E-k diagram. | 07-02-2015 |
20150214140 | LEADLESS PACKAGE TYPE POWER SEMICONDUCTOR MODULE - There is provided a leadless package type power semiconductor module. According to an exemplary embodiment of the present disclosure, the leadless package type power semiconductor module includes: connection terminals of a surface mounting type (SMT) formed at edges at which respective sides of four surfaces meet each other; a first mounting area connected to the connection terminals through a bridge to be disposed at a central portion thereof and mounted with power devices or control ICs electrically connected to the power devices to control the power devices; and second mounting areas formed between the connection terminals and mounted with the power devices or the control ICs, wherein the first mounting area is disposed at a different height from the second mounting area through the bridge to generate a phase difference from the second mounting area. Therefore, it is possible to implement a high-integration, high-performance, and small power semiconductor module by applying a three-dimensional structure deviating from a one-dimensional flat structure. | 07-30-2015 |
20150270217 | POWER MODULE PACKAGE - There is provided a power module package. The power module package includes: a base substrate provided with a pattern; a heat spreader formed by being stacked on an upper surface of the base substrate; and at least one first semiconductor device mounted on an upper surface of the heat spreader, wherein an outer circumferential surface of the heat spreader is provided with a coil. | 09-24-2015 |
Patent application number | Description | Published |
20140281495 | METHOD AND APPARATUS FOR PERFORMING AUTHENTICATION BETWEEN APPLICATIONS - A method performed by a first application in a client apparatus to authenticate a second application in the client apparatus is provided. The method includes, when the first application receives an execution request from the second application, requesting authentication information of the second application from an authentication server, obtaining the authentication information of the second application from the authentication server, and authenticating the second application using the authentication information, wherein the authentication information of the second application is signed with a private key of the authentication server. | 09-18-2014 |
20140306004 | MOBILE TERMINAL, SECURITY SERVER AND PAYMENT METHOD THEREOF - A mobile terminal is provided. The mobile terminal includes a short-range communicator, a security server and a payment method thereof, the mobile terminal including a short-range communicator which exchanges data by a predetermined short-range technology, a payment processor which performs a payment process corresponding to a preset standard in response to a user's request for payment, and a secure world which communicates with the payment processor, extracts secure information from data and stores the data therein and masks the secure information from the outside. Thus, the secure data may be masked at the time of communication with the outside. | 10-16-2014 |
20150330805 | SYSTEM FOR PROVIDING PERSONALIZED INFORMATION AND METHOD OF PROVIDING THE PERSONALIZED INFORMATION - A system and method for providing location-based personalized information by using user location history information, whereby battery consumption of a computing device is reduced. The computing device includes: a location finder configured to obtain user location information of a user of the computing device; a display configured to display information indicating a route of the user of the computing device; and a controller configured to track a location of the user by controlling the location finder as the controller senses a change in the location of the user based on the obtained user location information, obtain information corresponding to an initial route of the user based on the tracked location of the user, detect a predicted route of the user from user location history information based on the information corresponding to the initial route of the user, and display on the display unit the predicted route. | 11-19-2015 |