Patent application number | Description | Published |
20130321989 | BASE STATION - A base station, includes: an electronic unit; a housing, including a resin, configured to accommodate the electronic unit; a valve, provided in the housing and including a communication channel communicating an inside of the housing with an outside, configured to open the communication channel if an internal pressure of the housing exceeds a value. | 12-05-2013 |
20150305200 | HEAT DISSIPATION DEVICE, ELECTRONIC DEVICE, AND BASE STATION DEVICE - A heat dissipation device includes: a first plate with a first surface on which a first heat dissipation fin is formed; a second plate with a first surface on which a second heat dissipation fin is formed, and a heat conduction unit that passes through a first through-hole of the first plate and a second through-hole of the second plate. | 10-22-2015 |
20160128234 | COOLING DEVICE AND ELECTRONIC APPARATUS - A cooling device including: a heat receiver in which a working fluid is enclosed, a heat sink in which the working fluid is enclosed, an air tube made of metal so as to have flexibility, the air tube coupling the heat receiver and the heat sink, the air tube in which the working fluid of a gas phase flows through, and a liquid tube made of metal so as to have flexibility, the liquid tube coupling the heat receiver and the heat sink, the liquid tube in which the working fluid of a liquid phase flows through. | 05-05-2016 |
Patent application number | Description | Published |
20160005927 | SEMICONDUCTOR LIGHT EMITTING ELEMENT - A semiconductor light emitting element includes a metal layer, a first semiconductor layer of a first conductivity type, a light emitting layer, a second semiconductor layer of a second conductivity type, a first electrode, a second electrode, and an insulating layer. The first semiconductor layer is separated from the metal layer in a first direction. The first semiconductor layer includes a first region, a second region, and a third region. The light emitting layer has a first side surface intersecting a second direction. The second semiconductor layer has a second side surface intersecting the second direction. The first electrode is electrically connected to the first region and the metal layer. The second electrode includes a first portion, and a second portion being continuous with the first portion. The insulating layer includes a first insulating portion and a second insulating portion. | 01-07-2016 |
20160056341 | SEMICONDUCTOR LIGHT EMITTING ELEMENT - A semiconductor light emitting element includes a base body, a first semiconductor layer, a second semiconductor layer, a first light emitting layer, a first conductive layer, a third semiconductor layer, a fourth semiconductor layer, a second light emitting layer, a second conductive layer, a first member, and a second member. The first member includes a first end portion and a second end portion. The first end portion is positioned between the base body and the first conductive layer and electrically connected to the first conductive layer, the second end portion not overlapping the second conductive layer. The second member includes a third end portion and a fourth end portion. The third end portion is positioned between the base body and the second conductive layer and electrically connected to the second conductive layer. The fourth end portion is electrically connected to the second end portion. | 02-25-2016 |
Patent application number | Description | Published |
20140162223 | METHODS FOR REDUCING CHILDHOOD OBESITY - The present disclosure provides methods for preventing and/or reducing early childhood obesity that are based upon early inception (e.g., third trimester of pregnancy), anticipatory guidance (e.g., prior to an infant reaching a specific developmental stage), sequential guidance, and nutritionally and developmentally appropriate dietary and parental feeding behaviors guidance, all specifically targeting factors that have been associated with childhood obesity. The present methods may help instill early healthy eating habits and nutritious food preferences for infants and young children, promote an appropriate early growth trajectory, and a long term weight status that is consistent with public policy recommendations and associated with long term health. | 06-12-2014 |
20150037768 | METHODS FOR REDUCING CHILDHOOD OBESITY AND FOR CALCULATING CHILDHOOD OBESITY RISK - The present disclosure provides personalized methods for preventing and/or reducing early childhood obesity that are based upon identifying a child's individual risk of obesity and tailoring methods to prevent or reduce obesity. The methods are based on early inception, anticipatory guidance, sequential guidance, and nutritionally and developmentally appropriate dietary and parental feeding behaviors guidance, all specifically targeting factors that have been associated with childhood obesity. The methods use an obesity risk calculator to tailor the methods to address an individual child's risk with regard to specific modifiable factors associated with obesity. The present methods may help instill early healthy eating habits and nutritious food preferences for infants and young children, promote an appropriate early growth trajectory, and a long term weight status that is consistent with public policy recommendations and associated with long term health. | 02-05-2015 |
Patent application number | Description | Published |
20130308973 | DEVELOPER ACCOMMODATING UNIT, PROCESS CARTRIDGE, ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS - With respect to an unsealing direction in which exposure of a discharging portion | 11-21-2013 |
20130336679 | DEVELOPER CONTAINING UNIT, PROCESS CARTRIDGE, AND ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS - A developer containing unit configured to contain a developer, the developer containing unit including: a flexible container configured to contain the developer and provided with an opening portion through which the developer is discharged; a frame configured to accommodate the flexible container; a pressure member provided in the frame and configured to deform the flexible container; and an abutment portion extending in a longitudinal direction of the frame and at which the flexible container and the frame abut against each other. | 12-19-2013 |
20130343785 | DEVELOPER ACCOMMODATING UNIT, PROCESS CARTRIDGE AND ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS - A developer accommodating unit for accommodating a developer for image formation includes a flexible container provided with an opening | 12-26-2013 |
20140029974 | DEVELOPER ACCOMMODATING UNIT, PROCESS CARTRIDGE, ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS - A developer accommodating unit for accommodating a developer for image formation. A flexible container includes a developer accommodating portion for accommodating the developer and an opening for permitting discharge of the developer. The flexible container also includes a superposed multi layer sheet structure portion for forming the developer accommodating portion. A sealing member seals the opening and an unsealing member moves the sealing member to unseal the opening. A frame that accommodates the flexible container, the sealing member, and the unsealing member includes a fixing portion for fixing the flexible container. A fixed portion fixed to the fixing portion is provided at the superposed multi layer sheet structure portion of the flexible container, and an interlayer bonding portion between the superposed layers is provided between the fixed portion of the multi layer sheet structure portion and the developer accommodating portion. | 01-30-2014 |
20140072329 | DEVELOPER ACCOMMODATING UNIT - A developer accommodating unit for accommodating a developer includes: a flexible container, provided with an opening for permitting discharge of the developer, for accommodating the developer; and a frame. The flexible container is provided with a fastening hole for fastening said flexible container in said frame. The frame includes a fixing shaft portion fixed in the fastening hole by being inserted into the fastening hole and includes a retaining portion for preventing the fixing shaft portion from being disengaged from the fastening hole. The fastening hole is locked by fitting the fastening hole around the fixing shaft portion while an edge of the fastening hole rides over the retaining portion by elastic deformation thereof. | 03-13-2014 |
20140072330 | DEVELOPER ACCOMMODATING UNIT, PROCESS CARTRIDGE AND ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS - A developer accommodating unit includes: a flexible container including an opening for permitting discharge of a developer; a sealing member for forming a bonding portion between itself and the flexible container; an unsealing member; and an accommodating container. The bonding portion includes a first bonding portion extending in a longitudinal direction of the sealing member at a periphery of the opening in an upstream side of a peeling direction of the sealing member, a second bonding portion extending in the longitudinal direction at the periphery of the opening in a downstream side of the peeling direction, and a third bonding portion bonded upstream of the first bonding portion with respect to the peeling direction. When the sealing member exposes the opening, the bonding portion is peeled in the order of the third bonding portion, the first bonding portion and the second bonding portion. | 03-13-2014 |
20140072345 | DEVELOPER ACCOMMODATING CONTAINER, DEVELOPING DEVICE, PROCESS CARTRIDGE AND IMAGE FORMING APPARATUS - A developer accommodating unit includes: a flexible container, provided with an opening for permitting discharge of a developer, for accommodating the developer; and a frame for accommodating the flexible container and for accommodating the developer discharged from the flexible container. The flexible container includes a projected, portion projected from a part of a side forming the flexible container toward an outside of or toward an inside of the flexible container. | 03-13-2014 |
Patent application number | Description | Published |
20130004202 | ELECTROPHOTOGRAPHIC MEMBER, PROCESS CARTRIDGE AND ELECTROPHOTOGRAPHIC APPARATUS - An electrophotographic member whose performances are hardly changed even after a long-term use is provided. An electrophotographic member having a mandrel, an elastic layer and a surface layer, wherein the surface layer contains a titanium oxide film having chemical bonds represented by the following formula (1) and formula (2) is provided. | 01-03-2013 |
20130130022 | MEMBER FOR ELECTROPHOTOGRAPHY, PROCESS CARTRIDGE, AND ELECTROPHOTOGRAPHIC APPARATUS - Provided are a member for electrophotography whose charge-providing performance for toner is stable even under a high-humidity environment, and a process cartridge and an electrophotographic apparatus each using the member for electrophotography. Specifically, provided are a member for electrophotography including a mandrel, an elastic layer, and a protective layer, in which the protective layer is a zinc oxide film containing both formula 1 —Zn—O—R (in the formula 1, R represents an alkyl group) and formula 2 —O—Zn—O—, and a process cartridge and an electrophotographic apparatus each using the member for electrophotography. | 05-23-2013 |
20140093278 | ELECTROPHOTOGRAPHIC MEMBER, PROCESS CARTRIDGE AND ELECTROPHOTOGRAPHIC APPARATUS - A high quality electrophotographic member that is excellent in deformation recovery property under high-temperature and high-humidity and that also satisfies filming resistance under low-temperature and low-humidity is provided. | 04-03-2014 |
20140105646 | ELECTROPHOTOGRAPHIC MEMBER AND ELECTROPHOTOGRAPHIC APPARATUS - Provided is an electrophotographic member, which hardly changes in performance even when being left to stand for a long time period. The electrophotographic member comprises a support, an elastic layer formed on the support, and a surface layer covering a surface of the elastic layer and containing a urethane resin, and in which the urethane resin comprises a reaction product of: a hydroxyl group-terminated prepolymer obtained by reacting a polyester polyol with a polyisocyanate; and an isocyanate-terminated prepolymer obtained by reacting a polyester polyol with a polyisocyanate. | 04-17-2014 |
20150185656 | DEVELOPING APPARATUS, DEVELOPING METHOD, IMAGE FORMING APPARATUS, AND IMAGE FORMING METHOD - The developing apparatus includes a toner, a developing container, a developing roller, and a toner layer thickness controlling member,
| 07-02-2015 |
20150185658 | DEVELOPING APPARATUS, DEVELOPING METHOD, IMAGE FORMING APPARATUS, AND IMAGE FORMING METHOD - A developing apparatus and a developing method that significantly suppress generation of fogging and form a high-quality electrophotographic images under any environments such as a high temperature and high humidity environment and a low temperature and low humidity environment are provided. | 07-02-2015 |
Patent application number | Description | Published |
20130301331 | SEMICONDUCTOR DEVICE AND DRIVING METHOD OF SEMICONDUCTOR DEVICE - To provide a semiconductor device including a volatile memory which achieves high speed operation and lower power consumption. For example, the semiconductor device includes an SRAM provided with first and second data holding portions and a non-volatile memory provided with third and fourth second data holding portions. The first data holding portion is electrically connected to the fourth data holding portion through a transistor. The second data holding portion is electrically connected to the third data holding portion through a transistor. While the SRAM holds data, the transistor is on so that both the SRAM and the non-volatile memory hold the data. Then, the transistor is turned off before supply of power is stopped, so that the data becomes non-volatile. | 11-14-2013 |
20140203859 | SEMICONDUCTOR DEVICE - To provide a semiconductor device capable of adjusting the timing of a clock signal or a high-quality semiconductor device. The semiconductor device includes a first transistor and a circuit including a second transistor. A channel of the first transistor is formed in an oxide semiconductor layer. A first signal is input to one of a source and a drain of the first transistor. The other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor. A first clock signal is input to the circuit. The circuit outputs a second clock signal. The timing of the second clock signal is different from that of the first clock signal. | 07-24-2014 |
20140266367 | SEMICONDUCTOR DEVICE - To provide a semiconductor device which can perform a scan test and includes a logic circuit capable of reducing signal delay. The semiconductor device includes a combinational circuit, sequential circuits each holding first data supplied to the combinational circuit or second data output from the combinational circuit, first memory circuits each holding first data supplied to the corresponding sequential circuit and holding second data output from the corresponding sequential circuit, and second memory circuits electrically connecting the first memory circuits in series by supplying the first data or second data supplied from one of the first memory circuits to another one of the first memory circuits. The second memory circuit includes a first switch controlling supply of the first data or second data to the node, a capacitor electrically connected to the node, and a second switch controlling output of the first data or second data from the node. | 09-18-2014 |
20140269013 | MEMORY DEVICE AND SEMICONDUCTOR DEVICE - A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit. | 09-18-2014 |
20140340127 | SEMICONDUCTOR DEVICE - A semiconductor device with short overhead time. The semiconductor device includes a first wiring supplied with a power supply potential, a second wiring, a switch for controlling electrical connection between the first wiring and the second wiring, a load electrically connected to the second wiring, a transistor whose source and drain are electrically connected to the second wiring, and a power management unit having functions of controlling the conduction state of the switch and controlling a gate potential of the transistor. A channel formation region of the transistor is included in an oxide semiconductor film. | 11-20-2014 |
20150061742 | Storage Circuit and Semiconductor Device - The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit. | 03-05-2015 |
20150200668 | SEMICONDUCTOR DEVICE - The power consumption of a semiconductor device that can function as a latch circuit or the like is reduced. The semiconductor device includes a first circuit and a switch that controls conduction between an input terminal and the first circuit. The first circuit includes n second circuits (n is an integer of 2 or more) and a variable resistor. An output node of any of the n second circuits is electrically connected to an input node of the second circuit in a first stage through the variable resistor. The variable resistor can be, for example, a transistor whose channel is formed in an oxide semiconductor layer. A reduction in the number of elements or signals leads to a reduction of the power consumption of the semiconductor device. | 07-16-2015 |
20150269977 | SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE - Provided is a semiconductor device having a memory cell array, which is capable of existing in three power-gating states depending on a non-access period to the memory cell array. The memory cell array includes a plurality of memory cells which each have an SRAM and a nonvolatile memory portion having a transistor with an oxide semiconductor in a channel region. The three power-gating states includes: a first state in which a power-gating to the memory cell array is performed; a second state in which the power-gating is performed on the memory cell array and peripheral circuits which control the memory cell array; and a third state in which, in addition to the memory cell array and the peripheral circuits, a power supply voltage supplying circuit is subjected to the power gating. | 09-24-2015 |
20150363136 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE - A semiconductor device including a register controller and a processor which includes a register is provided. The register includes a first circuit and a second circuit which includes a plurality of memory portions. The first circuit and the plurality of memory portions can store data by an arithmetic process of the processor. Which of the plurality of memory portions the data is stored in depends on a routine by which the data is processed. The register controller switches the routine in response to an interrupt signal. The register controller can make any one of the plurality of memory portions which corresponds to the routine store the data in the first circuit every time the routine is switched. The register controller can make data stored in any one of the plurality of memory portions which corresponds to the routine be stored in the first circuit every time the routine is switched. | 12-17-2015 |
20160006433 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE - A semiconductor device with a novel structure is provided. In the semiconductor device executing a pipeline processing, a first arithmetic unit and a second arithmetic unit are provided for an execution stage, and transistors for performing power gating for the respective arithmetic units are provided. Only the arithmetic unit that performs an arithmetic operation is supplied with power supply voltage. Thus, fine-grained power gating can be performed, so that the power consumption of the semiconductor device can be reduced. In each of the transistors for performing power gating, a channel formation region includes an oxide semiconductor; thus, a reduction in leakage current between power supply lines can be achieved. Furthermore, these transistors and transistors in the arithmetic units can be provided in different layers, and thus an increase in area overhead due to the additionally provided transistors can be prevented. | 01-07-2016 |
20160104521 | SEMICONDUCTOR DEVICE, CIRCUIT BOARD, AND ELECTRONIC DEVICE - A semiconductor device with low power consumption or a semiconductor device with a reduced area is provided. The semiconductor device includes a cell array including a first memory cell and a second memory cell; and a sense amplifier circuit including a first sense amplifier and a second sense amplifier. The cell array is over the sense amplifier circuit. The first sense amplifier is electrically connected to the first memory cell through a first wiring BL. The second sense amplifier is electrically connected to the second memory cell through a second wiring BL. The first sense amplifier and the second sense amplifier are electrically connected to a wiring GBL. The sense amplifier circuit is configured to select one of a potential of the first wiring BL and a potential of the second wiring BL and output the selected potential to the wiring GBL. | 04-14-2016 |
20160105174 | LOGIC CIRCUIT, PROCESSING UNIT, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE - A retention circuit provided in a logic circuit enables power gating. The retention circuit includes a first terminal, a node, a capacitor, and first to third transistors. The first transistor controls electrical connection between the first terminal and an input terminal of the logic circuit. The second transistor controls electrical connection between an output terminal of the logic circuit and the node. The third transistor controls electrical connection between the node and the input terminal of the logic circuit. A gate of the first transistor is electrically connected to a gate of the second transistor. In a data retention period, the node becomes electrically floating. The voltage of the node is held by the capacitor. | 04-14-2016 |