Udompanyavit
Ubol Udompanyavit, Plano, TX US
Patent application number | Description | Published |
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20100001382 | MANUFACTURING METHOD FOR INTEGRATING A SHUNT RESISTOR INTO A SEMICONDUCTOR PACKAGE - An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to the integrated circuit. The shunt resistor has a lower temperature coefficient of resistance than the lead frame, and the lead frame has a lower resistivity than the shunt resistor. The shunt resistor has a low-resistance coupling to external leads of the lead frame, or, the shunt resistor has its own integrated external leads. | 01-07-2010 |
20110033985 | Manufacturing Method for Integrating a Shunt Resistor into a Semiconductor Package - An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to the integrated circuit. The shunt resistor has a lower temperature coefficient of resistance than the lead frame, and the lead frame has a lower resistivity than the shunt resistor. The shunt resistor has a low-resistance coupling to external leads of the lead frame, or, the shunt resistor has its own integrated external leads. | 02-10-2011 |
Ubol Udompanyavit, Dallas, TX US
Patent application number | Description | Published |
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20120199951 | INTEGRATED SHUNT RESISTOR WITH EXTERNAL CONTACT IN A SEMICONDUCTOR PACKAGE - An integrated circuit package that comprises a lead frame | 08-09-2012 |
20130278328 | POWER TRANSISTOR PARTIAL CURRENT SENSING FOR HIGH PRECISION APPLICATIONS - A power transistor module including a power transistor with a first common power node, and a split control node. A first clip is connected to a portion of a second power node so that current through a first control segment of the control node is directed through a first transistor portion and through the first clip. A second clip is connected to another portion of the second power node so that current through a second control segment is directed through a second transistor portion and through the second clip. A ratio of an area of the first transistor portion to a combined area of the first and second portions is 5 percent to 75 percent. A shunt is coupled in series to the first clip. The shunt may be directly electrically connected to the first portion of the power transistor. | 10-24-2013 |
Ubol A. Udompanyavit, Dallas, TX US
Patent application number | Description | Published |
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20140175626 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF MANUFACTURE - An integrated circuit package has a leadframe having an open space extending therethrough. An integrated circuit device is attached to a portion of the upper surface of the leadframe. A shunt is located within the open space such that it is not in contact with any portion of the leadframe. | 06-26-2014 |
Ubol Annie Udompanyavit, Dallas, TX US
Patent application number | Description | Published |
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20140097527 | METHOD OF MANUFACTURE INTEGRATED CIRCUIT PACKAGE - An integrated circuit package may be formed using a leadframe having an open space extending therethrough. A shunt is located within the open space such that it is not in contact with any portion of the leadframe. Tape may be applied to the lower surface of the leadframe to support the shunt and hold it in place relative to the leadframe until wirebonding and encapsulation have been completed. Thereafter, the tape may be removed. | 04-10-2014 |