Patent application number | Description | Published |
20100077610 | METHOD FOR MANUFACTURING THREE-DIMENSIONAL CIRCUIT - A method for manufacturing a three-dimensional circuit is described as follows. Firstly, a three-dimensional insulating structure having at least one uneven surface is provided. Secondly, a self-assembly film is formed on the uneven surface for completely covering the uneven surface. Next, a catalytic film is formed on the self-assembly film. Afterward, the self-assembly film and the catalytic film are patterned. Then, a three-dimensional circuit structure is formed on the catalytic film by chemical deposition. | 04-01-2010 |
20100215927 | COMPOSITE CIRCUIT SUBSTRATE STRUCTURE - A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure. | 08-26-2010 |
20100266752 | METHOD FOR FORMING CIRCUIT BOARD STRUCTURE OF COMPOSITE MATERIAL - A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed. | 10-21-2010 |
20110091697 | SOLDER PAD STRUCTURE FOR PRINTED CIRCUIT BOARDS AND FABRICATION METHOD THEREOF - A method for fabricating a solder pad structure. A circuit board having thereon at least one copper pad is provided. A solder resist is formed on the circuit board and covers the copper pad. A solder resist opening, which exposes a portion of the copper pad, is formed in the solder resist by laser. The laser also creates a laser activated layer on sidewalls of the solder resist opening. A chemical copper layer is then grown from the exposed copper pad and concurrently from the laser activated layer. | 04-21-2011 |
20110094779 | CIRCUIT STRUCTURE - A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer. | 04-28-2011 |
20110100543 | MANUFACTURING METHOD OF CIRCUIT STRUCTURE - A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern. | 05-05-2011 |
20110114373 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate. | 05-19-2011 |
20110147056 | CIRCUIT BOARD AND PROCESS FOR FABRICATING THE SAME - A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer. | 06-23-2011 |
20110155427 | CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer. | 06-30-2011 |
20110155428 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit substrate, a dielectric layer, and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit, a first intaglio pattern, and a second intaglio pattern. The patterned circuit structure includes at least a second circuit and a plurality of third circuits. The second circuit is disposed in the first intaglio pattern. The third circuits are disposed in the second intaglio pattern and the blind via. Each third circuit has a first conductive layer, a second conductive layer, and a barrier layer. The first conductive layer is located between the barrier layer and the second intaglio pattern and between the barrier layer and the blind via. The second conductive layer covers the barrier layer. | 06-30-2011 |
20110155440 | CIRCUIT BOARD AND PROCESS FOR MANUFACTURING THE SAME - A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer. | 06-30-2011 |
20110155441 | CIRCUIT BOARD AND PROCESS FOR FABRICATING THE SAME - A process for fabricating a circuit board is provided. A circuit substrate having a first surface and a first circuit layer is provided. A first dielectric layer having a second surface is formed on the circuit substrate and covers the first surface and the first circuit layer. An antagonistic activation layer is formed on the second surface. The antagonistic activation layer is irradiated by a laser beam to form at least a blind via extended from the antagonistic activation layer to the first circuit layer and an intaglio pattern. A first conductive layer is formed inside the blind via. A second conductive layer is formed in the intaglio pattern and the blind via. The second conductive layer covers the first conductive layer and is electrically connected with the first circuit layer through the first conductive layer. The antagonistic activation layer is removed to expose the second surface. | 06-30-2011 |
20120031651 | CIRCUIT BOARD - A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material. | 02-09-2012 |
20120031652 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer. | 02-09-2012 |
20120312588 | CIRCUIT BOARD - A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate. | 12-13-2012 |
20120318770 | MANUFACTURING METHOD OF CIRCUIT BOARD - A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure. | 12-20-2012 |
20130206467 | CIRCUIT BOARD - A circuit board includes a circuit substrate, a first dielectric layer, a first conductive layer, a second conductive layer and a second dielectric layer. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via. The second conductive layer is electrically connected to the first circuit layer via the first conductive layer. The second dielectric layer is disposed on the first dielectric layer and covers the second conductive layer and the second surface of the first dielectric layer. | 08-15-2013 |
20130313011 | INTERPOSED SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of an interposed substrate is provided. A photoresist layer is formed on a metal carrier. The photoresist layer has plural of openings exposing a portion of the metal carrier. Plural of metal passivation pads and plural of conductive pillars are formed in the openings. The metal passivation pads cover a portion of the metal carrier exposed by openings. The conductive pillars are respectively stacked on the metal passivation pads. The photoresist layer is removed to expose another portion of the metal carrier. An insulating material layer is formed on the metal carrier. The insulating material layer covers the another portion of the metal carrier and encapsulates the conductive pillars and the metal passivation pads. An upper surface of the insulating material layer and a top surface of each conductive pillar are coplanar. The metal carrier is removed to expose a lower surface of the insulating material layer. | 11-28-2013 |
20140034361 | CIRCUIT BOARD - A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer. | 02-06-2014 |
20140099432 | FABRICATION METHOD FOR FLEXIBLE CIRCUIT BOARD - A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof. | 04-10-2014 |
20140138142 | INTERPOSED SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal layer is formed. A patterned conductor layer is formed on the first metal layer, wherein the patterned conductor layer exposes a portion of the first metal layer. A plurality of conductive pillars is formed on the patterned conductor layer, wherein the conductive pillars are separated from each other and stacked on a portion of the patterned conductor layer. An insulating material layer is formed on the metal-stacked layer, wherein the insulating material layer covers the portion of the first metal layer and encapsulates the conductive pillars and the other portion of the patterned conductor layer. The metal-stacked layer is removed to expose a lower surface opposite to an upper surface of the insulating material layer and a bottom surface of the patterned conductor layer. | 05-22-2014 |
20140174804 | ELECTRICAL DEVICE PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME - A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed. Moreover, the electrical device package structure is also provided. | 06-26-2014 |