Patent application number | Description | Published |
20080244114 | Runtime integrity chain verification - A runtime integrity check may be implemented for a chain or execution path. When the chain or execution path calls other functions, the correctness of an entity called from the execution path is verified. As a result, attacks by malicious software that attempt to circumvent interrupt handlers can be combated. | 10-02-2008 |
20090143144 | Add-in card based cheat detection platform for online applications - In general, in one aspect, an add-in card includes inaccessible memory to store an identity key, wherein the identity key is to enable a secure communication link. The add-in card also includes an isolated execution environment and a machine-accessible medium comprising content. The content when executed by the isolated execution environment causes the isolated execution environment to route secure communications between an on-line application and a remote service provider through the isolated execution environment to provide a secure communication link therebetween, detect on-line application code modifications, detect on-line application process flow modifications, and notify, via the secure communication link, the remote service provider when a modification is detected. | 06-04-2009 |
20090144415 | Detecting automation cheating in online applications - In general, in one aspect, a method is described that includes monitoring data received from input devices. The received data from the input devices associated with an application is copied when the application is active. The data is converted to user commands. Commands used to update the application are received from the application. The converted user commands are compared to the commands from the application. Mismatching commands are reported to a remote server. | 06-04-2009 |
20090144825 | Chipset based cheat detection platform for online applications - In general, in one aspect, an interface chipset includes at least one interface to receive user commands from input devices, filters to monitor the received user commands and to copy the user commands associated with at least a subset of the input devices, and an isolated execution environment. The isolated execution environment is to provide a secure communication link between an on-line application and a remote service provider. The isolated execution environment is also to detect at least some subset of user command modifications, on-line application code modifications, and on-line application process flow modifications. The isolated execution environment is further to notify the remote service provider when a modification is detected via the secure communication link. | 06-04-2009 |
20090172328 | SYSTEM AND METHOD FOR HIGH PERFORMANCE SECURE ACCESS TO A TRUSTED PLATFORM MODULE ON A HARDWARE VIRTUALIZATION PLATFORM - A system and method for high performance secure access to a trusted platform module on a hardware virtualization platform. The virtualization platform including Virtual Machine Monitor (VMM) managed components coupled to the VMM. One of the VMM managed components is a TPM (Trusted Platform Module). The virtualization platform also includes a plurality of Virtual Machines (VMs). Each of the virtual machines includes a guest Operating System (OS), a TPM device driver (TDD), and at least one security application. The VMM creates an intra-partition in memory for each TDD such that other code and information at a same or higher privilege level in the VM cannot access the memory contents of the TDD. The VMM also maps access only from the TDD to a TPM register space specifically designated for the VM requesting access. Contents of the TPM requested by the TDD are stored in an exclusively VMM-managed protected page table that provides hardware-based memory isolation for the TDD. | 07-02-2009 |
20090292924 | MECHANISM FOR DETECTING HUMAN PRESENCE USING AUTHENTICATED INPUT ACTIVITY - When a service request associated with an initiated online service transaction is received, an attestation identifying a human-input activity is requested. Upon receiving a signature attesting the human-input activity, the previously initiated service transaction is authenticated based at least in part on the signature. | 11-26-2009 |
20100131781 | Reducing network latency during low power operation - In one embodiment, the present invention includes a method for receiving an incoming packet in a packet buffer and associating it with a flow identifier. Based on the flow identifier, a core to which the incoming packet is to be directed may be determined, and a power management hint can be transmitted to cause the core to be powered up. Other embodiments are described and claimed. | 05-27-2010 |
20100165991 | SIMD processing of network packets - Executing a single instruction/multiple data (SIMD) instruction of a program to process a vector of data wherein each element of the packet vector corresponds to a different received packet. | 07-01-2010 |
20120102285 | PROVIDING PROTECTED ACCESS TO CRITICAL MEMORY REGIONS - In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing hardware of a virtualized processor based system detecting a specified type of memory access to an identified region of memory and in response to the detecting generating an interrupt for a virtual machine monitor (VMM) of the virtualized processor based system. | 04-26-2012 |
20120117614 | SYSTEM AND METHOD FOR HIGH PERFORMANCE SECURE ACCESS TO A TRUSTED PLATFORM MODULE ON A HARDWARE VIRTUALIZATION PLATFORM - A system and method for high performance secure access to a trusted platform module on a hardware virtualization platform, which includes Virtual Machine Monitor (VMM) managed components coupled to the VMM and a plurality of Virtual Machines (VMs). One of the VMM managed components is a Trusted Platform Module (TPM) Each virtual machine includes a guest Operating System, a TPM device driver (TDD), and at least one security application. The VMM creates an intra-partition in memory for each TDD such that other code and information at a same or higher privilege level in the VM cannot access the TDD's memory contents. The VMM also maps access only from the TDD to a TPM register space specifically designated for the VM requesting access. Contents of the TPM requested by the TDD are stored in an exclusively VMM-managed protected page table that provides hardware-based memory isolation for the TDD. | 05-10-2012 |
20140036909 | SINGLE INSTRUCTION PROCESSING OF NETWORK PACKETS - Executing a single instruction/multiple data (SIMD) instruction of a program to process a vector of data wherein each element of the packet vector corresponds to a different received packet. | 02-06-2014 |
20140082378 | Distributing Power To Heterogeneous Compute Elements Of A Processor - In one embodiment, the present invention includes a processor having a first domain with a first compute engine and a second domain with a second compute engine, where each of these domains can operate at an independent voltage and frequency. A first logic may be present to update a power bias value used to control dynamic allocation of power between the first and second domains based at least in part on a busyness of the second domain. In turn, a second logic may dynamically allocate at least a portion of a power budget for the processor between the domains based at least in part on this power bias value. Other embodiments are described and claimed. | 03-20-2014 |
20140082380 | Distributing Power To Heterogeneous Compute Elements Of A Processor - In one embodiment, the present invention includes a processor having a first domain with a first compute engine and a second domain with a second compute engine, where each of these domains can operate at an independent voltage and frequency. A first logic may be present to update a power bias value used to control dynamic allocation of power between the first and second domains based at least in part on a busyness of the second domain. In turn, a second logic may dynamically allocate at least a portion of a power budget for the processor between the domains based at least in part on this power bias value. Other embodiments are described and claimed. | 03-20-2014 |
20140089626 | TECHNIQUES FOR DYNAMIC PHYSICAL MEMORY PARTITIONING - Various embodiments are presented herein that reallocate partitions of a shared physical memory between processing units. An apparatus and a computer-implemented method may determine an amount of memory space in the physical memory allocated to a first processing unit during system initialization. The determined amount of the memory space may be consolidated. The consolidated memory space may be allocated to the second processing unit during runtime. Other embodiments are described and claimed. | 03-27-2014 |
20140115662 | Mechanism for Detecting Human Presence Using Authenticated Input Activity Timestamps - When a service request associated with an initiated online service transaction is received, an attestation identifying a human-input activity is requested. Upon receiving a signature attesting the human-input activity, the previously initiated service transaction is authenticated based at least in part on the signature. | 04-24-2014 |
20140281615 | TECHNIQUES FOR POWER SAVING ON GRAPHICS-RELATED WORKLOADS - Various embodiments are generally directed to an apparatus, method and other techniques for monitoring a task of a graphics processing unit (GPU) by a graphics driver, determining if the task is complete, determining an average task completion time for the task if the task is not complete and enabling a sleep state for a processing circuit for a sleep state time if the average task completion time is greater than the sleep state time. | 09-18-2014 |
20150015575 | TECHNIQUES FOR SPATIALLY SORTING GRAPHICS INFORMATION - Various embodiments are generally directed to an apparatus, method and other techniques for separating a group of polygons from a viewpoint of a scene into a dependent subgroup of polygons or a non-dependent subgroup of polygon and spatially sorting the non-dependent subgroup of polygons and the dependent group of polygons separately to form a sorted group of polygons. | 01-15-2015 |
20150026426 | SYSTEM AND METHOD FOR HIGH PERFORMANCE SECURE ACCESS TO A TRUSTED PLATFORM MODULE ON A HARDWARE VIRTUALIZATION PLATFORM - A system and method for high performance secure access to a trusted platform module on a hardware virtualization platform. The virtualization platform including Virtual Machine Monitor (VMM) managed components coupled to the VMM. One of the VMM managed components is a TPM (Trusted Platform Module). The virtualization platform also includes a plurality of Virtual Machines (VMs). Each of the virtual machines includes a guest Operating System (OS), a TPM device driver (TDD), and at least one security application. The VMM creates an intra-partition in memory for each TDD such that other code and information at a same or higher privilege level in the VM cannot access the memory contents of the TDD. The VMM also maps access only from the TDD to a TPM register space specifically designated for the VM requesting access. Contents of the TPM requested by the TDD are stored in an exclusively VMM-managed protected page table that provides hardware-based memory isolation for the TDD. | 01-22-2015 |
20150042641 | TECHNIQUES TO AUTOMATICALLY ADJUST 3D GRAPHICS APPLICATION SETTINGS - Techniques for automatically adjusting three-dimensional (3D) graphics application settings are described. In one embodiment, for example, an apparatus may comprise a processor circuit to execute a 3D graphics application based on one or more feature control settings and a 3D graphics management module to determine a performance metric during execution of the 3D graphics application, compare the performance metric to a performance threshold, and when the performance metric is less than the performance threshold, determine a set of one or more setting adjustments based on feature control information to increase a performance of the 3D graphics application. Other embodiments are described and claimed. | 02-12-2015 |
20150046730 | Method, Apparatus, And System For Energy Efficiency And Energy Conservation Including Power And Performance Balancing Between Multiple Processing Elements And/Or A Communication Bus - An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit. | 02-12-2015 |