Tran, TW
Chuong Anh Tran, Baoshan Township TW
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20140051197 | METHOD FOR FABRICATING A VERTICAL LIGHT EMITTING DIODE (VLED) DIE HAVING EPITAXIAL STRUCTURE WITH PROTECTIVE LAYER - A method for fabricating a vertical light emitting diode (VLED) die includes the steps of: providing a substrate; forming an epitaxial structure on the substrate; forming an electrically insulative insulation layer covering the lateral surfaces of the epitaxial structure; forming an electrically non-conductive material on the electrically insulative insulation layer; and forming a mirror on the p-doped layer, with the electrically insulative insulation layer configured to protect the epitaxial structure during formation of the mirror. | 02-20-2014 |
20140151630 | PROTECTION FOR THE EPITAXIAL STRUCTURE OF METAL DEVICES - Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed. | 06-05-2014 |
Chuong Anh Tran, Hsinchu County 308 TW
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20130240834 | METHOD FOR FABRICATING VERTICAL LIGHT EMITTING DIODE (VLED) DICE WITH WAVELENGTH CONVERSION LAYERS - A method for fabricating vertical light emitting diode (VLED) dice includes the steps of: forming a light emitting diode (LED) die having a multiple quantum well (MQW) layer configured to emit electromagnetic radiation in a first spectral region; forming a confinement layer on the multiple quantum well (MQW) layer; forming an adhesive layer on the confinement layer; and forming a wavelength conversion layer on the adhesive layer configured to convert the electromagnetic radiation in the first spectral region to output electromagnetic radiation in a second spectral region. | 09-19-2013 |
Dang-Thuan Tran, Tainan City TW
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20130280771 | METHOD FOR PRODUCING BIODIESEL - The present disclosure is directed to the method for producing the biodiesel comprising steps of providing a biomass having an oil, obtaining a crude mixture of the biomass, and then performing a transesterification in which the crude mixture is used as a reacting material thereof to produce the biodiesel. | 10-24-2013 |
Jimmy Cuong Tran, Hsinchu TW
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20140355420 | Method of Establishing Smart Architecture Cell Mesh (SACM) Network - The present disclosure provides a method of establishing a SACM network is disclosed. The method comprises deploying a plurality of mesh nodes, wherein each of mesh nodes having a mesh node capability to communicate with the other mesh nodes as well as a gateway capability to provide an access to a service network, wherein the service network provides a wireless communication service; establishing a plurality of links between the mesh nodes, each of the links connecting two of the mesh nodes; searching and selecting a plurality of dynamic gateway nodes from the plurality of the mesh nodes and establishing a plurality of connections between the dynamic gateway nodes and the service network and performing routing and path optimizing to find optimal route paths for all the mesh nodes to access the service network. | 12-04-2014 |
Laun C. Tran, Tainan TW
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20140157088 | MRAM Smart Bit Write Algorithm with Error Correction Parity Bits - Some aspects of the present disclosure relate a method. The method attempts to write an expected multi-bit word to a memory location in memory. After writing of the multi-bit word has been attempted, an actual multi-bit word is read from the memory location. The actual multi-bit word is then compared with the expected multi-bit word to identify a number of erroneous bits and a number of correct bits stored in the memory location. The number of erroneous bits is re-written to the memory location without attempting to re-write the correct bits to the memory location. | 06-05-2014 |
Luan C. Tran, Tainan TW
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20130043560 | Metal-Insulator-Metal Capacitor and Method of Fabricating - Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit. | 02-21-2013 |
20140191364 | METHOD OF FABRICATING METAL-INSULATOR-METAL (MIM) CAPACITOR WITHIN TOPMOST THICK INTER-METAL DIELECTRIC LAYERS - Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit. | 07-10-2014 |
20140193961 | METHOD OF FABRICATING METAL-INSULATOR-METAL (MIM) CAPACITOR WITHIN TOPMOST THICK INTER-METAL DIELECTRIC LAYERS - Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit. | 07-10-2014 |
20140252635 | Bonding Structures and Methods of Forming the Same - A package includes a package component and a second package component. A first elongated bond pad is at a surface of the first package component, wherein the first elongated bond pad has a first length in a first longitudinal direction, and a first width smaller than the first length. A second elongated bond pad is at a surface of the second package component. The second elongated bond pad is bonded to the first elongated bond pad. The second elongated bond pad has a second length in a second longitudinal direction, and a second width smaller than the second width. The second longitudinal direction is un-parallel to the first longitudinal direction. | 09-11-2014 |
20150056739 | IMAGE SENSOR TRENCH ISOLATION WITH CONFORMAL DOPING - Provided is a semiconductor image sensor device. The image sensor device includes a substrate. The image sensor device includes a first pixel and a second pixel disposed in the substrate. The first and second pixels are neighboring pixels. The image sensor device includes an isolation structure disposed in the substrate and between the first and second pixels. The image sensor device includes a doped isolation device disposed in the substrate and between the first and second pixels. The doped isolation device surrounds the isolation structure in a conformal manner. | 02-26-2015 |
Luan Conn Tran, Shin-Shih Township TW
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20130308367 | STRUCTURE AND METHOD FOR FORMING CONDUCTIVE PATH IN RESISTIVE RANDOM-ACCESS MEMORY DEVICE - An array and forming method for resistive-RAM (RRAM) devices provides for the simultaneous selection of multiple bit cells and the simultaneous forming of the RRAM resistive elements within the selected bit cells. The bit cells each include a resistive element and a transistor and are arranged vertically along vertical bit lines. The resistive elements of the bit cells are coupled to source lines that are parallel to word lines and perpendicular to the vertical bit lines. The bit lines are maintained at different biases. A high voltage is applied to one of the source lines coupled to adjacent resistive elements of bit cells disposed along more than one vertical bit line. When the associated transistors are turned on by a sufficiently high gate voltage, the desired RRAM resistive elements along one of the bit lines are formed without stressing other bit cells of the array. | 11-21-2013 |