Patent application number | Description | Published |
20090229874 | MULTILAYER WIRING BOARD - A coreless wiring board has no core board but a laminated structure in which a conductor layer and resin insulating layers are alternately laminated into a multilayer. Each of the resin insulating layers is formed to contain a glass cloth in an epoxy resin. A plurality of via holes taking a shape of an inverse truncated cone and having steps on internal wall surfaces is formed to penetrate each of the resin insulating layers, and a filled via conductor for electrically connecting the conductors is formed in each of the via holes. | 09-17-2009 |
20090236138 | MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A coreless wiring board has no core board but a laminated structure in which a conductor layer and resin insulating layers are alternately laminated into a multilayer. Each of the resin insulating layers is formed to contain a glass cloth in an epoxy resin. A plurality of via holes is formed to penetrate each of the resin insulating layers, and a filled via conductor for electrically connecting the conductor layers is formed in the via holes respectively. A tip of the glass cloth contained in each of the resin insulating layers is protruded from an internal wall surface of the via hole and cuts into a sidewall of the filled via conductor. | 09-24-2009 |
20090242245 | MULTI-LAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A multi-layer wiring board without a core substrate includes: a multi-layer laminated structure; first terminals provided on a front surface of the multi-layer laminated structure; second terminals provided on a rear surface of the multi-layer laminated structure; a solder resist which covers the rear surface and which has solder resist openings formed at positions corresponding to the second terminals; a reinforcing plate which is made of a non-metal material and which has reinforcing plate openings formed at positions corresponding to the second terminals; and an adhesive layer interposed between the solder resist and the reinforcing plate to fix the reinforcing plate to the solder resist and which includes adhesive layer openings formed at positions corresponding to the second terminals. A diameter of the solder resist openings and a diameter of the reinforcing plate openings are smaller than that of the adhesive layer openings. | 10-01-2009 |
20090242262 | MULTI-LAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A multi-layer wiring board without a core substrate includes: a multi-layer laminated structure; first terminals provided on a front surface of the multi-layer laminated structure; second terminals provided on a rear surface of the multi-layer laminated structure; terminal pins bonded to a corresponding one of the second terminals, wherein each of the terminal pins is formed in a nailhead shape that includes a shaft portion and a head portion, and a diameter of the head portion is larger than that of the shaft portion; and a reinforcing plate which has pin insertion openings formed at positions corresponding to the terminal pins and which is fixed to the rear surface, wherein the diameter of the pin insertion openings is smaller than the diameter of the head portion and is larger than the diameter of the shaft portion. | 10-01-2009 |
20090294156 | INTERMEDIATE MULTILAYER WIRING BOARD PRODUCT, AND METHOD FOR MANUFACTURING MULTILAYER WIRING BOARD - An intermediate multilayer wiring board product includes: a stack of a plurality of resin insulating layers, a first conductor layer, and a second conductor layer. The stack includes: a product forming region comprising a plurality of product portions arranged along a major surface of the stack, each of the plurality of product portions to become a product of the multilayer wiring board; and a frame portion surrounding the product forming region. The first conductor layer is formed on at least one of the plurality of resin insulating layers within each of the plurality of product portions. The second conductor layer is formed on at least one of the plurality of resin insulating layers within the frame portion. The frame portion has a plurality of cuts penetrating the frame portion in a thickness direction thereof, the plurality of cuts being arranged at substantially equal intervals. | 12-03-2009 |
20100208437 | MULTILAYER WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A multilayer wiring substrate of the present invention has a laminated structure composed of conductor layers and resin insulating layers stacked alternately. A plurality of surface connection terminals to which terminals of a chip component are to be surface-connected are formed on a main face of the laminated structure. A plurality of via conductors connected to the plurality of surface connection terminals are formed in the resin insulating layers. Each of the plurality of surface connection terminals has a structure in which a copper layer, a nickel layer, and a gold layer are stacked in this sequence. The gold layer is larger in diameter than at least the copper layer. The gold layer has an overhanging portion which extends radially outward from a circumference of the copper layer. | 08-19-2010 |
20100208442 | WIRING BOARD ASSEMBLY AND MANUFACTURING METHOD THEREOF - A wiring board assembly includes a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member. The reinforcing member has a plurality of structural pieces separated by slits extending from an inner circumferential surface to an outer circumferential surface of the reinforcing member. | 08-19-2010 |
20120204420 | METHOD FOR MANUFACTURING WIRING BOARD - A method for manufacturing a wiring board, which prevents electrostatic destruction generated in a mask pattern, by employing a structured exposure mask at a low cost is provided. The method can comprise the steps of forming a photosensitive resin layer on an insulating layer located underneath a predetermined conductor layer, forming a plating resist by exposing and developing the photosensitive resin layer with an exposure light while an exposure mask is disposed on a surface of the photosensitive resin layer, forming a metal plating layer that has a conductor pattern formed by applying a metal plating to an opening of the plating resist, and removing the plating resist. The exposure mask may have a plurality of graphic patterns, and each corner of the graphic patterns maybe chamfered by 50 micrometers or more so that electrostatic destruction due to electric discharge between the adjacent graphic patterns is prevented. | 08-16-2012 |