Patent application number | Description | Published |
20120281227 | INTERFEROMETRIC SENSING APPARATUS INCLUDING ADJUSTABLE COUPLING AND ASSOCIATED METHODS - A sensing apparatus comprises an excitation source configured to induce waves in a target, and a fiber optic interferometer configured to sense the induced waves in the target. The fiber optic interferometer comprises a probe segment having a probe segment end, and an adjustable coupler configured to permit setting a gap between the probe segment end and the target. A controller is coupled to the adjustable coupler and configured to set the gap between the probe segment end and the target. | 11-08-2012 |
20120281228 | INTERFEROMETRIC BIOMETRIC SENSING APPARATUS INCLUDING ADJUSTABLE COUPLING AND ASSOCIATED METHODS - A biological sensing apparatus comprises an excitation source configured to induce waves in a biological target, and an optical waveguide interferometer configured to sense the induced waves in the biological target. The optical waveguide interferometer comprises a probe segment having a probe segment end, and an adjustable coupler configured to permit setting a gap between the probe segment end and the biological target. A controller is coupled to the adjustable coupler and configured to set the gap between the probe segment end and the biological target. | 11-08-2012 |
20120281229 | INTERFEROMETRIC MATERIAL SENSING APPARATUS INCLUDING ADJUSTABLE COUPLING AND ASSOCIATED METHODS - A material sensing apparatus comprises an excitation source configured to induce waves in a workpiece, and an optical waveguide interferometer configured to sense the induced waves in the workpiece. The optical wavguide interferometer comprises a probe segment having a probe segment end, and an adjustable coupler configured to permit setting a gap between the probe segment end and the workpiece. A controller is coupled to the adjustable coupler and configured to set the gap between the probe segment end and the workpiece. | 11-08-2012 |
20120281230 | INTERFEROMETRIC SENSING APPARATUS INCLUDING ADJUSTABLE REFERENCE ARM AND ASSOCIATED METHODS - A sensing apparatus includes an excitation source configured to induce waves in a target, and an optical waveguide interferometer configured to sense the induced waves in the target. The optical waveguide interferometer includes a plurality of optical couplers and interconnecting optical fibers arranged to define a reference arm, a measurement arm, and a probe segment coupled to the reference arm and the measurement arm and having a probe segment end to be positioned adjacent the target. An optical path length adjustor is coupled to the reference arm. A controller cooperates with the path length adjustor and is configured to adjust an optical path length of the reference arm to maintain a constant relationship with respect to an optical path length of the measurement arm. | 11-08-2012 |
20120281231 | INTERFEROMETRIC BIOLOGICAL SENSING APPARATUS INCLUDING ADJUSTABLE REFERENCE ARM AND ASSOCIATED METHODS - A biological sensing apparatus includes an excitation source configured to induce waves in a biological target, and an optical waveguide interferometer configured to sense the induced waves in the biological target. The optical waveguide interferometer includes a plurality of optical couplers and interconnecting optical fibers arranged to define a reference arm, a measurement arm, and a probe segment coupled to the reference arm and the measurement arm and having a probe segment end to be positioned adjacent the biological target. An optical path length adjustor is coupled to the reference arm. A controller cooperates with the optical path length adjustor and a first optical detector. The controller is configured to adjust an optical path length of the reference arm to maintain a constant relationship with respect to an optical path length of the measurement arm, and to generate biological target data based upon the first optical detector. | 11-08-2012 |
20120281232 | INTERFEROMETRIC MATERIAL SENSING APPARATUS INCLUDING ADJUSTABLE REFERENCE ARM AND ASSOCIATED METHODS - A material sensing apparatus includes an excitation source configured to induce waves in a workpiece, and an optical waveguide interferometer configured to sense the induced waves in the workpiece. The optical waveguide interferometer includes a plurality of optical couplers and interconnecting optical fibers arranged to define a reference arm, a measurement arm, and a probe segment coupled to the reference arm and the measurement arm and having a probe segment end to be positioned adjacent the workpiece. An optical path length adjustor is coupled to the reference arm. A controller cooperates with the optical path length adjustor and the first optical detector. The controller is configured to adjust an optical path length of the reference arm to maintain a constant relationship with respect to an optical path length of the measurement arm, and to generate workpiece data based upon the first optical detector. | 11-08-2012 |
Patent application number | Description | Published |
20090072290 | SOI CMOS COMPATIBLE MULTIPLANAR CAPACITOR - An isolated shallow trench isolation portion is formed in a top semiconductor portion of a semiconductor-on-insulator substrate along with a shallow trench isolation structure. A trench in the shape of a ring is formed around a doped top semiconductor portion and filled with a conductive material such as doped polysilicon. The isolated shallow trench isolation portion and the portion of a buried insulator layer bounded by a ring of the conductive material are etched to form a cavity. A capacitor dielectric is formed on exposed semiconductor surfaces within the cavity and above the doped top semiconductor portion. A conductive material portion formed in the trench and above the doped top semiconductor portion constitutes an inner electrode of a capacitor, while the ring of the conductive material, the doped top semiconductor portion, and a portion of a handle substrate abutting the capacitor dielectric constitute a second electrode. | 03-19-2009 |
20090212362 | SOI FIELD EFFECT TRANSISTOR WITH A BACK GATE FOR MODULATING A FLOATING BODY - A masking layer is applied over a top semiconductor layer and patterned to expose in an opening a shallow trench isolation structure and a portion of a top semiconductor region within which a first source/drain region and a body is to be formed. Ions are implanted into a portion of a buried insulator layer within the area of the opening to form damaged buried insulator region. The shallow trench isolation structure is removed and the damaged buried insulator region is etched selective to undamaged buried insulator portions to form a cavity. A dielectric layer is formed on the sidewalls and the exposed bottom surface of the top semiconductor region and a back gate filling the cavity is formed. A contact is formed to provide an electrical bias to the back gate so that the electrical potential of the body and the first source/drain region is electrically modulated. | 08-27-2009 |
20090302416 | Programmable Electrical Fuse - The present invention relates to e-fuse devices, and more particularly to a device and method of forming an e-fuse device, the method comprising providing a first conductive layer connected to a second conductive layer, the first and second conductive layers separated by a barrier layer having a first diffusivity different than a second diffusivity of the first conductive layer. A void is created in the first conductive layer by driving an electrical current through the e-fuse device. | 12-10-2009 |
20100164111 | INTERCONNECT STRUCTURE WITH IMPROVED DIELECTRIC LINE TO VIA ELECTROMIGRATION RESISTANT INTERFACIAL LAYER AND METHOD OF FABRICATING SAME - Interconnect structures having improved electromigration resistance are provided that include a metallic interfacial layer (or metal alloy layer) that is present at the bottom of a via opening. The via opening is located within a second dielectric material that is located atop a first dielectric material that includes a first conductive material embedded therein. The metallic interfacial layer (or metal alloy layer) that is present at the bottom of the via opening is located between the underlying first conductive material embedded within the first dielectric and the second conductive material that is embedded within the second dielectric material. Methods of fabricating the improved electromigration resistance interconnect structures are also provided. | 07-01-2010 |
20110073985 | Method of Generating Uniformly Aligned Well and Isolation Regions in a Substrate and Resulting Structure - A solution for alleviating variable parasitic bipolar leakages in scaled semiconductor technologies is described herein. Placement variation is eliminated for edges of implants under shallow trench isolation (STI) areas by creating a barrier to shield areas from implantation more precisely than with only a standard photolithographic mask. An annealing process expands the implanted regions such their boundaries align within a predetermined distance from the edge of a trench. The distances are proportionate for each trench and each adjacent isolation region. | 03-31-2011 |
20120280356 | UNIFORMLY ALIGNED WELL AND ISOLATION REGIONS IN A SUBSTRATE AND RESULTING STRUCTURE - A solution for alleviating variable parasitic bipolar leakages in scaled semiconductor technologies is described herein. Placement variation is eliminated for edges of implants under shallow trench isolation (STI) areas by creating a barrier to shield areas from implantation more precisely than with only a standard photolithographic mask. An annealing process expands the implanted regions such their boundaries align within a predetermined distance from the edge of a trench. The distances are proportionate for each trench and each adjacent isolation region. | 11-08-2012 |
20130001789 | INTERCONNECT STRUCTURE WITH IMPROVED DIELECTRIC LINE TO VIA ELECTROMIGRATION RESISTANT INTERFACIAL LAYER AND METHOD OF FABRICATING SAME - Interconnect structures having improved electromigration resistance are provided that include a metallic interfacial layer (or metal alloy layer) that is present at the bottom of a via opening. The via opening is located within a second dielectric material that is located atop a first dielectric material that includes a first conductive material embedded therein. The metallic interfacial layer (or metal alloy layer) that is present at the bottom of the via opening is located between the underlying first conductive material embedded within the first dielectric and the second conductive material that is embedded within the second dielectric material. Methods of fabricating the improved electromigration resistance interconnect structures are also provided. | 01-03-2013 |