Patent application number | Description | Published |
20100111817 | TITANIUM OXIDE PHOTOCATALYST AND METHOD FOR PRODUCING THE SAME - A titanium oxide photocatalyst that is capable of improving a decomposition rate, and a method for producing the same are provided. The titanium oxide photocatalyst of the present invention is a titanium oxide photocatalyst containing at least an anatase-type titanium oxide and fluorine, wherein a content of the fluorine is 2.5 wt % to 3.5 wt %, and 90 wt % or more of the fluorine is chemically bonded to the anatase-type titanium oxide. | 05-06-2010 |
20100135864 | PHOTOCATALYTIC MATERIAL AND PHOTOCATALYTIC MEMBER AND PURIFICATION DEVICE USING THE PHOTOCATALYTIC MATERIAL - Provided are a photocatalytic material that improves a decomposition performance and a decomposition rate, as well as a photocatalytic member and a purification device in which the photocatalytic material is used. The photocatalytic member is a photocatalytic member ( | 06-03-2010 |
20100282601 | PHOTOELECTROCHEMICAL CELL AND ENERGY SYSTEM USING THE SAME - A photoelectrochemical cell ( | 11-11-2010 |
20110174610 | PHOTOELECTROCHEMICAL CELL - A photoelectrochemical cell ( | 07-21-2011 |
20110203661 | OPTICALLY PUMPED SEMICONDUCTOR AND DEVICE USING THE SAME - The optically pumped semiconductor according to the present invention is an optically pumped semiconductor that is a semiconductor of a perovskite oxide. The optically pumped semiconductor has a composition represented by a general formula: BaZr | 08-25-2011 |
20110315545 | HYDROGEN GENERATING DEVICE - A hydrogen generating device ( | 12-29-2011 |
20120063967 | HYDROGEN GENERATION SYSTEM AND HOT WATER PRODUCTION SYSTEM - A hydrogen generation system ( | 03-15-2012 |
20120080310 | PHOTOELECTROCHEMICAL CELL - A photoelectrochemical cell ( | 04-05-2012 |
20120117919 | METHOD OF STORING PHOTOCATALYTIC MEMBER - A novel method for storing a photocatalytic member containing fluorine-containing anatase-type titanium oxide is provided, which is capable of suppressing the decrease in content of fluorine during storage in a photocatalytic member containing fluorine-containing anatase-type titanium oxide. The storage method of the present invention is a method for storing a photocatalytic member containing fluorine-containing anatase-type titanium oxide including storing the photocatalytic member in a surrounding environment with a relative humidity of 30% or less. According to the storage method of the present invention, for example, the elimination of fluorine from the surface of fluorine-containing titanium oxide can be suppressed, and the decrease in content of fluorine during storage in a photocatalytic member can be suppressed. | 05-17-2012 |
20120156578 | PHOTOELECTROCHEMICAL CELL AND ENERGY SYSTEM USING SAME - A photoelectrochemical cell ( | 06-21-2012 |
20120157300 | TITANIUM OXIDE PHOTOCATALYST AND METHOD FOR PRODUCING THE SAME - A titanium oxide photocatalyst that is capable of improving a decomposition rate, and a method for producing the same are provided. The titanium oxide photocatalyst of the present invention is a titanium oxide photocatalyst containing at least an anatase-type titanium oxide and fluorine, wherein a content of the fluorine is 2.5 wt % to 3.5 wt %, and 90 wt % or more of the fluorine is chemically bonded to the anatase-type titanium oxide. | 06-21-2012 |
20120237842 | OPTICAL SEMICONDUCTOR AND METHOD FOR PRODUCING THE SAME, OPTICAL SEMICONDUCTOR DEVICE, PHOTOCATALYST, HYDROGEN PRODUCING DEVICE, AND ENERGY SYSTEM - The method for producing the optical semiconductor of the present disclosure includes a mixing step of producing a mixture containing a reduction inhibitor and a niobium compound that contains at least oxygen in its composition; a nitriding step of nitriding the mixture by the reaction between the mixture and a nitrogen compound gas; and a washing step of isolating niobium oxynitride from the material obtained through the nitriding step by dissolving chemical species other than niobium oxynitride with a washing liquid. The optical semiconductor of the present disclosure substantially consists of niobium oxynitride having a crystal structure of baddeleyite and having a composition represented by the composition formula, NbON. | 09-20-2012 |
20120276464 | Photoelectrochemical Cell and Energy System Using Same - A photoelectrochemical cell ( | 11-01-2012 |
20120285823 | HYDROGEN GENERATION DEVICE - A hydrogen generation device ( | 11-15-2012 |
20130075250 | HYDROGEN PRODUCTION DEVICE - The hydrogen production device of the present invention includes: a first electrode ( | 03-28-2013 |
20130316254 | ENERGY SYSTEM - An energy system includes an solar hydrogen producing unit ( | 11-28-2013 |
20140004435 | PHOTOELECTRODE AND METHOD FOR PRODUCING SAME, PHOTOELECTROCHEMICAL CELL AND ENERGY SYSTEM USING SAME, AND HYDROGEN GENERATION METHOD | 01-02-2014 |
20140057187 | NIOBIUM NITRIDE AND METHOD FOR PRODUCING SAME, NIOBIUM NITRIDE-CONTAINING FILM AND METHOD FOR PRODUCING SAME, SEMICONDUCTOR, SEMICONDUCTOR DEVICE, PHOTOCATALYST, HYDROGEN GENERATION DEVICE, AND ENERGY SYSTEM - The present invention is a niobium nitride which has a composition represented by the composition formula Nb | 02-27-2014 |
20140072891 | HYDROGEN PRODUCING CELL, HYDROGEN PRODUCING DEVICE, AND ENERGY SYSTEM INCLUDING THE HYDROGEN PRODUCING DEVICE - A hydrogen producing cell of the present invention is provided with an electrolyte supply hole, an electrolyte discharge hole, a first hydrogen circulation hole and a second hydrogen circulation hole respectively penetrating a housing. In disposing the hydrogen producing cell, the electrolyte supply hole is arranged on a vertically upper side than the electrolyte discharge hole, the first hydrogen circulation hole is arranged on a vertically upper side than the electrolyte supply hole, and the second hydrogen circulation hole is arranged on a vertically upper side than the electrolyte discharge hole. By this configuration, it is possible to considerably reduce the length of a pipe and the number of manifolds concerning the electrolyte and hydrogen, and to link the hydrogen producing cells with one another simply and rationally. | 03-13-2014 |
20150083605 | SEMICONDUCTOR PHOTOELECTRODE AND METHOD FOR SPLITTING WATER PHOTOELECTROCHEMICALLY USING PHOTOELECTROCHEMICAL CELL COMPRISING THE SAME - Provided is a semiconductor photoelectrode comprising a conductive substrate; a first semiconductor photocatalyst layer provided on a surface of the conductive substrate; a second semiconductor photocatalyst layer provided on a surface of the first semiconductor photocatalyst layer. The semiconductor photoelectrode has a plurality of pillar protrusions on the surface thereof. A surface of each of the pillar protrusions is formed of the second semiconductor photocatalyst layer. | 03-26-2015 |
Patent application number | Description | Published |
20090104675 | METHOD FOR PRODUCING LACTIC ACID - Lactic acid with high optical purity that has not previously been achieved is produced. | 04-23-2009 |
20090275095 | DNA Encoding a Protein Having a D-Lactate Dehydrogenase Activity and Uses Thereof - This invention provides a polynucleotide that encodes a protein having lactate dehydrogenase activity and such protein that can be used for producing D-lactic acid. This polynucleotide has the nucleotide sequence as shown in SEQ ID NO: 1 (a), and it hybridizes under stringent conditions with a probe comprising all or part of the nucleotide sequence as shown in SEQ ID NO: 1 or a complementary strand thereof and encodes a protein having D-lactate dehydrogenase activity (b). | 11-05-2009 |
20090298145 | Acid-resistance endoglucanase and the use of thereof - The present teachings relate to an acid-resistant endoglucanase, which is a protein exhibiting excellent endoglucanase activity under acidic conditions. The present teachings provide a protein having the amino acid sequence set forth in SEQ ID NO: 2, a protein having an amino acid sequence with one or more amino acid modifications in the amino acid sequence set forth in SEQ ID NO: 2 and having endoglucanase activity, or a protein having an amino acid sequence with at least 75% homology to the amino acid sequence set forth in SEQ ID NO: 2 and having endoglucanase activity. | 12-03-2009 |
20120149081 | METHOD FOR FERMENTATION CULTURE IN MEDIUM CONTAINING XYLOSE - The xylose-metabolizing ability and particularly the xylose incorporation rate, of yeast to which xylose-metabolizing ability has been imparted are significantly improved. The method according to the present invention comprises the steps of: culturing yeast having xylose-metabolizing ability in a xylose-containing medium in which the concentration of at least one amino acid selected from the group consisting of asparagine (Asn), serine (Ser), tyrosine (Tyr), threonine (Thr), and histidine (His) is increased; and recovering alcohol from the medium. | 06-14-2012 |
20140024097 | YEAST MUTANT OF KLUYVEROMYCES AND METHOD FOR ETHANOL PRODUCTION USING THE SAME - A yeast of the genus | 01-23-2014 |
20150031103 | NOVEL PROMOTER AND USE THEREOF - The promoter of the present invention causes a desired gene to be highly expressed, especially in thermotolerant yeast. The promoter is located upstream of the PIR1 gene or the CTR1 gene on the | 01-29-2015 |
Patent application number | Description | Published |
20090072871 | VARIABLE DELAY CIRCUIT, DELAY TIME CONTROL METHOD AND UNIT CIRCUIT - Variable delay circuit constructed by connecting plural unit circuits in series which can change a delay time from input of signal until output of the signal by increasing or decreasing the number of unit circuits through which the signal concerned is passed. Each of the unit circuits is operable in a through operation mode in which a signal input from a unit circuit at the front stage is output to a unit circuit at the rear stage and also a signal input from a unit circuit at the rear stage is output to a unit circuit at the front stage and a feedback operation mode in which a signal input from a unit circuit at the front stage to a unit circuit at the front stage and a signal input from a unit circuit at the rear stage is output to a unit circuit at the rear stage. | 03-19-2009 |
20090077411 | MEMORY CONTROL CIRCUIT, DELAY TIME CONTROL DEVICE, AND DELAY TIME CONTROL METHOD - A memory control circuit has a write leveling function and controls read/write operations by supplying a clock signal to a plurality of memories through a clock signal line which is wired to the plurality of memories through daisy chain connection. For each of the plurality of memories, a first variable delay unit delays, in a write operation, a data strobe signal output to the memory by a first delay time that is set by utilizing the write leveling function and a second variable delay unit delays, in a read operation, a data signal input from the memory by a second delay time that is set based on the first delay time. | 03-19-2009 |
20120153988 | SEMICONDUCTOR DEVICE, CIRCUIT BOARD DEVICE, AND INFORMATION PROCESSING DEVICE - In a semiconductor device, a selector selects a different reference voltage depending on whether the impedance of a transmitter or of a receiver is to be adjusted, and causes a reference voltage generator to generate the selected reference voltage. The reference voltage generator generates the reference voltage selected by the selector and applies the generated reference voltage to an impedance adjuster. The impedance adjuster adjusts the impedance of the transmitter and the impedance of the receiver, separately from each other, in accordance with the input reference voltage. | 06-21-2012 |
20120226884 | SIGNAL RESTORATION CIRCUIT, LATENCY ADJUSTMENT CIRCUIT, MEMORY CONTROLLER, PROCESSOR, COMPUTER, SIGNAL RESTORATION METHOD, AND LATENCY ADJUSTMENT METHOD - A signal restoration circuit includes a storage configured to store input signals by disposing the input signals in an input order, the input signals being readable from the storage in the disposed order, and a storage controller configured to control delay time from an input of the input signal to an output in the storage based on delay information of the input signal. | 09-06-2012 |
20120242385 | SIGNAL RECEIVING CIRCUIT, MEMORY CONTROLLER, PROCESSOR, COMPUTER, AND PHASE CONTROL METHOD - A signal receiving circuit includes a phase detection unit and a delay control unit. The phase detection unit detects a phase difference between a received signal and a clock signal. The delay control unit receives the phase difference, delays a phase of the received signal in a range not exceeding a delay amount determined by using a predetermined phase difference as a unit, and changes, when the phase difference exceeds the predetermined phase difference, a delay amount of the received signal by using the predetermined phase difference as a unit. | 09-27-2012 |
20130076428 | LEVEL CONVERTER AND PROCESSOR - A level converter includes a level conversion circuit, which is provided between a reference power supply line having a reference voltage level and a first power supply line coupled to a first power supply outputting a first voltage level, which inputs a first signal and outputs a second signal, the first signal having a first logic level and a second logic level, the second signal having a first logic level and a second logic level; a control signal generating circuit to output a control signal having the reference voltage level when a second power supply outputting the second voltage level is turned off and the first voltage level when the second power supply is turned on; and a coupling circuit to control an electrically connection between the first power supply line and an output node of the level conversion circuit based on the control signal. | 03-28-2013 |
20130257490 | DRIVER CIRCUIT AND SEMICONDUCTOR DEVICE - A PMOS output stage and an NMOS output stage of which output impedances are controlled in accordance with impedance codes, a gate control part which drives output transistors held by the PMOS output stage and the NMOS output stage, and a slew rate control part which generates bias voltages to control driving ability of the gate control part based on an input current are included, and manufacturing variability of an input current circuit generating an input current is corrected by using the impedance code by the slew rate control part. | 10-03-2013 |
20140068316 | DETERMINATION SUPPORT APPARATUS, DETERMINING APPARATUS, MEMORY CONTROLLER, SYSTEM, AND DETERMINATION METHOD - A determination support apparatus includes a detecting unit that detects a phase difference between a first clock signal and a second clock signal that is identical in frequency to the first clock signal; a control unit that controls delay of at least one among the first clock signal and the second clock signal such that the detected phase difference becomes less than a given amount; and an acquiring unit that acquires values of a given clock signal among the first clock signal and the second clock signal, among which at least one has been subject to delay control by the control unit, wherein the acquiring unit acquires the values of the given clock signal at a timing that is based on a clock signal that is other than the given clock signal and among the first clock signal and the second clock signal. | 03-06-2014 |
20140185391 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a phase detecting unit that continuously detects a first delay amount during a read operation, based on a phase difference between an external clock signal and an internal clock signal; a generating unit that generates a second control signal by delaying a first control signal by a second delay amount that when added to the first delay amount, the sum is a specific time period, a valid time period of the first control signal starts when the read operation starts and is at least to equal a read time for one data signal and less than the specific time period that is from the start of the read operation until output of a received data signal; and a delay control unit that delays the data signal by the first delay amount detected at a start of a valid time period of the generated second control signal. | 07-03-2014 |
20150032950 | SIGNAL CONTROL CIRCUIT, INFORMATION PROCESSING APPARATUS, AND DUTY RATIO CALCULATION METHOD - A signal control circuit includes: a delay acquisition circuit configured to obtain a first delay amount to be added to an input signal for aligning timing of rise of the input signal with timing of fall or rise of a reference signal and a second delay amount to be added to the input signal for aligning timing of fall of the input signal with timing of the fall or the rise of the reference signal; and a ratio calculation circuit configured to calculate a duty ratio of the input signal based on a difference between the first delay amount and the second delay amount. | 01-29-2015 |
20150121117 | SIGNAL CONTROL CIRCUIT, INFORMATION PROCESSING APPARATUS, AND SIGNAL CONTROL METHOD - An EVEN component selecting unit and an ODD component selecting unit acquire a first signal from a DQ signal based on a rising edge of a DQS signal and a second signal from the DQ signal based on a falling edge of the DQS signal. Variable delay adding units give the first signal a first delay based on a phase difference between an internal clock signal and the rising edge of the DQS signal and give the second signal a second delay based on a phase difference between the internal clock signal and the falling edge of the DQS signal. Data capturing units capture, based on the internal clock signal, data from the first signal to which the first delay is given and the second signal to which the second delay is given. | 04-30-2015 |
20150213875 | MEMORY CONTROLLER AND INFORMATION PROCESSING DEVICE - A memory controller has a first variable delay circuit that delays a data strobe signal received from a memory, and a second variable delay circuit that variably delays a data signal which is received from the memory and is synchronous with the data strobe signal, and that is set a second delay amount which is different from a first delay amount of the first variable delay circuit. | 07-30-2015 |
Patent application number | Description | Published |
20090244729 | METHOD FOR MANUFACTURING OPTICAL ELEMENT, OPTICAL ELEMENT UNIT, AND IMAGING UNIT - A method for manufacturing an optical element Being resistant to reflow treatment, to realize board mounting of electronic parts by melting of a conductive paste by heat, comprising the step of: (i) forming an antireflective film on an optical element body composed of a thermosetting resin, wherein a film making temperature in a process of forming the antireflective film is maintained in a range of −40 to +40 ° C. with respect to a melting temperature of the conductive paste. | 10-01-2009 |
20110111256 | Optical Element, Method for Producing Optical Element, and Method for Manufacturing Electronic Device - Disclosed is an optical element to be subjected to a reflow process at high temperatures, wherein cracks or wrinkles can be prevented from occurring in an antireflection film. A method for producing the optical element, and a method for manufacturing an electronic device using the optical element are also disclosed. Specifically disclosed is a method for producing an optical element comprising a base, wherein at least one optical surface is composed of a resin material, and a coating formed on the optical surface of the base and composed of an inorganic material, the optical element being mounted on a substrate together with an electronic component by a reflow process at a temperature Ta. The method is characterized in that the coating is formed at a film-forming temperature Tb of not less than (Ta−60° C.), and a material having no glass transition temperature or a glass transition temperature of not less than (Tb−50° C.) is used as the resin material. | 05-12-2011 |