Patent application number | Description | Published |
20090298255 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device including a SRAM section and a logic circuit section includes: a first n-type MIS transistor including a first n-type gate electrode formed with a first gate insulating film interposed on a first element formation region of a semiconductor substrate in the SRAM section; and a second n-type MIS transistor including a second n-type gate electrode formed with a second gate insulating film interposed on a second element formation region of the semiconductor substrate in the logic circuit section. A first impurity concentration of a first n-type impurity in the first n-type gate electrode is lower than a second impurity concentration of a second n-type impurity in the second n-type gate electrode. | 12-03-2009 |
20110006374 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A SRAM SECTION AND A LOGIC CIRCUIT SECTION - A semiconductor device including a SRAM section and a logic circuit section includes: a first n-type MIS transistor including a first n-type gate electrode formed with a first gate insulating film interposed on a first element formation region of a semiconductor substrate in the SRAM section; and a second n-type MIS transistor including a second n-type gate electrode formed with a second gate insulating film interposed on a second element formation region of the semiconductor substrate in the logic circuit section. A first impurity concentration of a first n-type impurity in the first n-type gate electrode is lower than a second impurity concentration of a second n-type impurity in the second n-type gate electrode. | 01-13-2011 |
20110156150 | SEMICONDUCTOR DEVICE AND DESIGN METHOD THEREOF - A semiconductor device includes a plurality of first cells having a first cell height, and a plurality of second cells having a second cell height. Each of the first cells has a first MIS transistor of a first conductivity type, and a substrate contact region of a second conductivity type. Each of the second cells has a second MIS transistor of the first conductivity type, a power supply region of the first conductivity type, and a first extended region of the first conductivity type that is silicidated at a surface thereof. The first cell height is greater than the second cell height. | 06-30-2011 |
20150084106 | SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE DEVICE - A solid-state imaging device includes unit pixels formed on a semiconductor substrate. Each of the unit pixels includes a photoelectric converter, a floating diffusion, a pinning layer, and a pixel transistor. The pixel transistor includes a gate electrode formed on the semiconductor substrate, a source diffusion layer, and a drain diffusion layer. At least one of the source diffusion layer or the drain diffusion layer functions as the floating diffusion. The pinning layer is covered by the floating diffusion at a bottom and a side at a channel of the pixel transistor. A conductivity type of the floating diffusion is opposite to that of the pinning layer. | 03-26-2015 |
20150115339 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line. | 04-30-2015 |
20150123180 | SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE DEVICE - Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region. | 05-07-2015 |
20150195466 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device has a plurality of imaging-purpose pixels and a plurality of focus detection-purpose pixels. Each of the imaging-purpose pixels are provided with a first lower electrode, a photoelectric conversion film formed on the first lower electrode, and an upper electrode formed on the photoelectric conversion film. Each of the focus detection-purpose pixels is provided with a second lower electrode, the photoelectric conversion film formed on the second lower electrode, and the upper electrode formed on the photoelectric conversion film. The area of the second lower electrode is smaller than the area of the first lower electrodes. The second lower electrode is provided on a position deviating from a pixel center of a corresponding focus detection-pixel, and two second lower electrodes corresponding to two focus detection purpose pixels included in the plurality of focus detection purpose pixels is arranged in mutually opposite directions. | 07-09-2015 |
20150280155 | SOLID-STATE IMAGING DEVICE, IMAGING MODULE, AND IMAGING APPARATUS - A solid-state imaging device according to an aspect of the present disclosure includes pixel including: a first and second electrode located in a same layer, the second electrode being located between the first electrode and the other first electrodes included in adjacent pixels; an organic photoelectric conversion film including a first surface and a second surface, the first surface being in contact with the first electrode and the second electrode; and a counter electrode located on the second surface. The organic photoelectric conversion film extends over the pixels. The first electrode is an electrode through which electrons or holes generated in the organic photoelectric conversion film are extracted. An area ratio of the first electrode to the each pixel is 25% or less. And a total area ratio of a sum of the first electrode and the second electrode to the each pixel is 40% or greater. | 10-01-2015 |