Patent application number | Description | Published |
20080235556 | REVERSE CONCATENATION FOR PRODUCT CODES - A system is provided to encode data for recording onto media whereby modulation and linear constraints from a concatenated code or product code are imposed. A first array of unencoded user data is generated. Each row is modulation encoded to enforce a first modulation constraint; the array is transformed into a second array which is transformed into a third array having predetermined empty locations in each column interleaved with the modulated data. A C2-parity byte is computed for at least some of the empty locations of the third array and a fourth array is generated. C1-parity symbols in each row are computed, generating a fifth array. A second modulation constraint is enforced on each C1-parity symbol in each row of the fifth array, generating a sixth array. The rows of the sixth array are assembled with header and sync fields for recording onto a recording media. | 09-25-2008 |
20080235562 | REVERSE CONCATENATION FOR PRODUCT CODES - Method and computer program product are provided to encode data for recording onto media whereby modulation and linear constraints from a concatenated code or product code are imposed. A first array of unencoded user data is generated. Each row is modulation encoded to enforce a first modulation constraint; the array is transformed into a second array which is transformed into a third array having predetermined empty locations in each column interleaved with the modulated data. A C2-parity byte is computed for at least some of the empty locations of the third array and a fourth array is generated. C1-parity symbols in each row are computed, generating a fifth array. A second modulation constraint is enforced on each C1-parity symbol in each row of the fifth array, generating a sixth array. The rows of the sixth array are assembled with header and sync fields for recording onto a recording media. | 09-25-2008 |
20080284624 | HIGH-RATE RLL ENCODING - An unencoded m-bit data input sequence is divided into a block of n bits and a block of m−n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D | 11-20-2008 |
20090027242 | HIGH-RATE RLL ENCODING - An unencoded m-bit data input sequence is divided into a block of n bits and a block of m-n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D | 01-29-2009 |
20090089645 | DATA STORAGE SYSTEMS - Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. The post processor regenerates the first error corrected bit stream in dependence on the pinning data received from the error correction decoder. | 04-02-2009 |
20090115647 | MODULATION CODING AND DECODING - Methods and apparatus are provided for modulation coding a stream of binary input data. A 4-ary enumerative encoding algorithm is applied to the input bit-stream to produce a succession of 4-ary output symbols. The 4-ary algorithm is operative to simultaneously encode respective generalized Fibonacci codes in the odd and even interleaves of the input bit-stream. The bits of each successive 4-ary output symbol are then interleaved, producing an output bit-stream which has global and interleaved run-length constraints. Inverting the bits of the 4-ary output symbols produces an output bit-stream with (G, I)-constraints as in the PRML (G, I) codes used in reverse-concatenation modulation systems. Corresponding decoding systems are also provided. | 05-07-2009 |
20090115648 | MODULATION CODING AND DECODING - Methods and apparatus are provided for partitioning a stream of binary input data into two binary output streams for supply to respective modulation encoders in a modulation coding system. A 4-ary enumerative encoding algorithm is applied to each of a succession of input words in the input bit-stream to produce a succession of 4-ary output symbols from the input word. The 4-ary algorithm simultaneously encodes respective j=∞ Fibonacci codes in the odd and even interleaves of the input word such that the two bit-sequences formed by respective corresponding bits of the succession of output symbols are range-limited codewords. The two binary output streams are then produced by separating the two range-limited codewords generated from each successive input word. The binary output streams can then be independently encoded by respective modulation encoders, and the encoder outputs interleaved to produce a modulation-constrained output stream. Corresponding decoding systems are also provided. | 05-07-2009 |
20100177420 | REWRITING CODEWORD OBJECTS TO MAGNETIC DATA TAPE UPON DETECTION OF AN ERROR - During a read-after-write operation on magnetic tape, a first SCO is formed which includes two encoded processed user data units and is one of T SCOs in a first SCO set. The user data units are each one of T user data units in first and second user data unit sets, respectively, within the first SCO set. The first SCO set is written to the magnetic tape and is immediately read. When an error is detected in one of the user data units, a second SCO is formed to include the first user data unit and, only if an error is not detected in a user data unit in the other user data unit set, to not include the other user data unit, the second SCO being one of T SCOs in a second SCO set. Then, the second SCO set is rewritten to a later position on the tape later. | 07-15-2010 |
20100177422 | REWRITE-EFFICIENT ECC/INTERLEAVING FOR MULTI-TRACK RECORDING ON MAGNETIC TAPE - For writing data to multi-track tape, a received data set is received and segmented into unencoded subdata sets, each comprising an array having K | 07-15-2010 |
20100180180 | ECC INTERLEAVING FOR MULTI-TRACK RECORDING ON MAGNETIC TAPE - Conventional C2 coding and interleaving for multi-track data tape in LTO-¾ do not support recording data onto a number of concurrent tracks which is not a power of two. Higher-rate longer C2 codes, which do not degrade error rate performance, are provided. An adjustable format and interleaving scheme accommodates future tape drives in which the number of concurrent tracks is not necessarily a power of two. A data set is segmented into a plurality of unencoded subdata sets and parity bytes are generated for each row and column. The parameters of the C2 code include N | 07-15-2010 |
20100214829 | MEMORY PROGRAMMING - Systems, methods, and devices for iteratively writing contents to memory locations are provided. A statistical model is used to determine a sequence of pulses to write desired contents to a memory location. The contents can be expressed as a resistance value in a range to store one or more bits in a memory cell. For phase change memory, an adaptive reset pulse and one or more annealing pulses are selected based on a desired resistance range. Reading the resistance value of the memory cell can provide feedback to determine adjustments in an overall pulse application strategy. The statistical model and a look up table can be used to select and modify pulses. Adaptively updating the statistical model and look up table may reduce the number of looping iterations to shift the resistance value of the memory cell into the desired resistance range. | 08-26-2010 |
20100218070 | LENGTHENING LIFE OF A LIMITED LIFE MEMORY - A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells, including at least a first group with at least one cell. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way (the cells can be PCM or another technology). Each one of the storage cells is arbitrarily individually changeable among the at least two levels, and each of the cells is cost-asymmetric. A controller encodes the identical message in the at least first group using the first way or the second way, based on which way incurs a least cost when writing the message into the at least one cell of the at least first group, given current levels of the at least first group. | 08-26-2010 |
20100218071 | WRITING A SPECIAL SYMBOL TO A MEMORY TO INDICATE THE ABSENCE OF A DATA SIGNAL - A method for writing in a memory system that includes receiving an address corresponding to a memory location in a memory, receiving a desired content to be written, encoding the desired content into a symbol, and writing the symbol to the memory location using an iterative write process of at least one write and one read to the memory location. The iterative write process includes determining if the symbol was successfully written to the memory location and exiting the iterative write process in response to the symbol being successfully written to the memory location. The iterative write process also includes determining if a halt condition has been met and exiting the iterative write process if the halt condition has been met. Once the iterative write process has been exited, the memory location may be identified as a candidate for being written with a special symbol. | 08-26-2010 |
20100232047 | DATA INTERLEAVING IN TAPE DRIVES - Methods and apparatus for interleaving data in a multitrack tape drive and for writing data on a multitrack tape in the tape drive. One method includes: partitioning the data into m(2 | 09-16-2010 |
20100302666 | DETECTING A PERIODIC SEQUENCE OF SERVO SIGNALS - A system and method are disclosed for detecting a periodic sequence. A value detector module detects a plurality of values of a periodic sequence. In one embodiment, a transformation module transforms the plurality of values into transformed values. A confinement module confines the values to a limited set of confined values. A correlation module correlates the confined values with a plurality of instances of the periodic sequence. In addition, a selection module selects an instance of the periodic sequence with the highest correlation to the confined values as an observed periodic sequence. | 12-02-2010 |
20110228600 | MEMORY PROGRAMMING - Systems, methods, and devices for iteratively writing contents to memory locations are provided. A statistical model is used to determine a sequence of pulses to write desired contents to a memory location. The contents can be expressed as a resistance value in a range to store one or more bits in a memory cell. For phase change memory, an adaptive reset pulse and one or more annealing pulses are selected based on a desired resistance range. Reading the resistance value of the memory cell can provide feedback to determine adjustments in an overall pulse application strategy. The statistical model and a look up table can be used to select and modify pulses. Adaptively updating the statistical model and look up table may reduce the number of looping iterations to shift the resistance value of the memory cell into the desired resistance range. | 09-22-2011 |
20110252290 | INTEGRATED DATA AND HEADER PROTECTION FOR TAPE DRIVES - A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein. | 10-13-2011 |
20110296274 | DATA ENCODING IN SOLID-STATE STORAGE DEVICES - Methods and apparatus are provided for recording input data in q-level cells of solid-state memory (2), where q>2. Input data words are encoded as respective codewords, each having a plurality of symbols. The coding scheme is such that each symbol can take one of q values corresponding to respective predetermined levels of the q-level cells, and each of the possible input data words is encoded as a codeword with a unique sequence of relative symbol values. The symbols of each codeword are then recorded in respective cells of the solid-state memory by setting each cell to the level corresponding to the recorded symbol value. Input data is thus effectively encoded in the relative positions of cell levels, providing resistance to certain effects of drift noise. | 12-01-2011 |
20120033321 | TAPE LAYOUT DESIGN FOR RELIABLE ECC DECODING - A method for physically laying out data on tape is disclosed herein. In one embodiment, such a method includes receiving a data set, wherein the data set includes S sub data sets (SDSs) of fixed size and each SDS includes N codeword interleaves (CWIs). The method further distributes the CWIs for the S SDSs across T tracks on a physical tape medium such that the distances between CWIs of the same SDS are substantially maximized on the physical tape medium. To maximize the distances, the method periodically rotates the tracks within the data set by a track rotation value R, wherein the number of tracks T is equal to 2 | 02-09-2012 |
20120036318 | EFFICIENT REWRITE TECHNIQUE FOR TAPE DRIVES - A method for efficiently rewriting data to tape is disclosed herein. In one embodiment, such a method includes writing a data set to tape, the data set comprising S sub data sets of fixed size, each sub data set comprising N code word interleaves (CWIs). The method further includes reading the data set while writing it to the tape to identify faulty CWIs. While reading the data set, the method buffers the faulty CWIs (such as by storing, identifying, and/or marking the faulty CWIs) for later retrieval. When the end of the data set is reached, the method writes corrected versions of the faulty CWIs to the end of the data set. A corresponding apparatus is also disclosed and claimed herein. | 02-09-2012 |
20120144271 | DECODING ENCODED DATA CONTAINING INTEGRATED DATA AND HEADER PROTECTION - A method for decoding encoded data comprising integrated data and header protection is disclosed herein. In one embodiment, such a method includes receiving an extended data array. The extended data array includes a data array organized into rows and columns, headers appended to the rows of the data array, column ECC parity protecting the columns of the data array, and row ECC parity protecting the rows and headers combined. The method then decodes the extended data array. Among other operations, this decoding step includes checking the header associated with each row to determine whether the header is legal. If the header is legal, the method determines the contribution of the header to the corresponding row ECC parity. The method then reverses the contribution of the header to the corresponding row ECC parity. A corresponding apparatus (i.e., a tape drive configured to implement the above-described method) is also disclosed herein. | 06-07-2012 |
20120192034 | Lengthening Life of a Limited Life Memory - A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way. | 07-26-2012 |
20120210194 | INTEGRATED DATA AND HEADER PROTECTION FOR TAPE DRIVES - A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein. | 08-16-2012 |
20120254693 | ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY - A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q-d) symbol values, d ε [1, . . . , q−1], depending on a state of the N cells. | 10-04-2012 |
20120307389 | TRACK-DEPENDENT DATA RANDOMIZATION MITIGATING FALSE VFO DETECTION - A method for randomizing data to mitigate false VFO detection is described. In one embodiment, such a method includes simultaneously receiving multiple input data streams. Each input data stream is associated with a different track on a magnetic tape medium. The input data streams are simultaneously scrambled to produce multiple randomized data streams. The input data streams are scrambled such that different bit patterns are produced in the randomized data streams even where corresponding bit patterns in the input data streams are identical. The randomized data streams are simultaneously written to their associated data tracks on the magnetic tape medium. | 12-06-2012 |
20120307393 | TRACK-DEPENDENT DATA RANDOMIZATION MITIGATING FALSE VFO DETECTION - A method for randomizing data to mitigate false VFO detection is described. In one embodiment, such a method includes simultaneously receiving multiple input data streams. Each input data stream is associated with a different track on a magnetic tape medium. The input data streams are simultaneously scrambled to produce multiple randomized data streams. The input data streams are scrambled such that different bit patterns are produced in the randomized data streams even where corresponding bit patterns in the input data streams are identical. The randomized data streams are simultaneously written to their associated data tracks on the magnetic tape medium. A corresponding apparatus is also described. | 12-06-2012 |
20120324313 | ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY - A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q-d) symbol values, d ε [1, . . . , q-1], depending on a state of the N cells. | 12-20-2012 |
20130086457 | DETECTING CODEWORDS IN SOLID-STATE STORAGE DEVICES - A method for detecting codewords in solid-state storage devices. The method includes the steps of: obtaining respective read signals by reading memory cells that stores a group of codewords, where each of the read signals includes N signal components corresponding to respective symbols of the codeword; producing an ordered read signal by ordering the components of each of the read signals according to a signal level; producing an average read signal by averaging corresponding components of the ordered read signals; determining a reference signal level that corresponds to each of q levels of the memory cells in relation to the average read signal with predefined probabilities of each symbol value occurring at each symbol position in the codeword, where the symbols of the codeword are ordered according to the symbol value; and detecting the codeword corresponding to each of the read signal in relation to the reference signal levels. | 04-04-2013 |
20130279040 | COMBINED SOFT DETECTION/SOFT DECODING IN TAPE DRIVE STORAGE CHANNELS - In one embodiment, a tape drive system includes a soft detector for executing a first forward loop of a detection algorithm on a first block of signal samples during a first time interval; and logic for executing forward and reverse loops during several time intervals; and logic adapted for outputting a first decoded block of signal samples based on the executing the decoding algorithm on the first block during a sixth time interval, wherein a sum of second, third, fourth, fifth, and sixth time intervals are about equal in duration to the first time interval. | 10-24-2013 |
20130283127 | COMBINED SOFT DETECTION/SOFT DECODING IN TAPE DRIVE STORAGE CHANNELS - In one embodiment, a method includes executing a first forward loop of a detection algorithm on a block of signal samples during a first time interval, executing a first reverse loop of the detection algorithm on the block during a second time interval to produce first soft information, executing a decoding algorithm on the block during a third time interval using the first soft information to produce second soft information, executing a second forward loop of the detection algorithm on the block during a fourth time interval using the second soft information, executing a second reverse loop of the detection algorithm on the block during a fifth time interval to produce third soft information, executing the decoding algorithm on the block during a sixth time interval using the third soft information to produce a decoded block of signal samples, and outputting the decoded block of signal samples. | 10-24-2013 |
20130326305 | DATA FORMAT USING AN EFFICIENT REVERSE CONCATENATED MODULATION CODE FOR MAGNETIC TAPE RECORDING - In one embodiment, a tape drive system includes a write channel for writing data to a magnetic tape, the write channel utilizing a rate-(232/234) reverse concatenated modulation code. The write channel includes logic adapted for receiving a data stream comprising one or more data sets, logic adapted for separating each data set into a plurality of sub data sets, logic adapted for encoding each sub data set with a C2 encoding, logic adapted for encoding each C2-encoded sub data set with a modulation code, logic adapted for encoding each modulated sub data set with a C1 encoding, and logic adapted for simultaneously writing the encoded modulated sub data sets to data tracks of the magnetic tape. Other systems for writing data to a magnetic tape utilizing a rate-(232/234) reverse concatenated modulation code are described according to various other embodiments. | 12-05-2013 |
20130326306 | PARTIAL REVERSE CONCATENATION FOR DATA STORAGE DEVICES USING COMPOSITE CODES - In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1- and C2-encoded data sets to data tracks. | 12-05-2013 |
20130326307 | METHODS FOR PARTIAL REVERSE CONCATENATION FOR DATA STORAGE DEVICES USING COMPOSITE CODES - In one embodiment, a method includes writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code by encoding data sets using a C2 encoding scheme, adding a header to each subunit of the data sets, encoding the headers of the data sets with a first modulation encoding scheme, encoding data portions of the data sets with a second modulation encoding scheme, encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and writing the one or more combined C1- and C2-encoded data sets to data tracks of the storage medium. Other methods for writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code are presented according to more embodiments. | 12-05-2013 |
20130335845 | ADAPTIVE SOFT-OUTPUT DETECTOR FOR MAGNETIC TAPE READ CHANNELS - In one embodiment, a data storage system includes a tape channel for reading data from a tape to produce a signal, an adaptive noise whitening filter adapted for receiving the signal, the noise whitening filter being adapted for minimizing variance of noise affecting the signal output from the noise whitening filter, a soft DMAX detector adapted for receiving the signal from the noise whitening filter, the soft detector adapted for calculating first soft information about each bit of the signal and sending the first soft information to a soft decoder, and the soft decoder positioned subsequent to the soft detector, the soft decoder being adapted for calculating second soft information about each bit of the signal and sending the second soft information to the soft DMAX detector, wherein one or more noise whitening coefficients used in the noise whitening filter are updated using a noise whitening filter coefficient updater. | 12-19-2013 |
20130335846 | ADAPTIVE SOFT-OUTPUT DETECTOR FOR MAGNETIC TAPE READ CHANNELS - In accordance with one embodiment, a data storage system includes a tape channel for reading precoded data from a magnetic tape medium to produce a signal, a soft detector adapted for calculating first soft information about each bit of the signal and sending the first soft information to a soft decoder, and the soft decoder positioned subsequent to the soft detector, the soft decoder being adapted for calculating second soft information about each bit of the signal and sending the second soft information to the soft detector, wherein the precoded data includes a characteristic of being passed through at least one precoder prior to being written to the magnetic tape medium, and wherein the soft detector provides automatic compensation for the precoded data. Other systems, methods, and computer program products for reading data using an adaptive soft-output detector are described according to more embodiments. | 12-19-2013 |
20130335848 | ADAPTIVE SOFT-OUTPUT DETECTOR FOR MAGNETIC TAPE READ CHANNELS - In one embodiment, a data storage system includes a tape channel for reading data from a magnetic tape medium to produce a signal, a noise whitening filter positioned subsequent to the tape channel adapted for receiving the signal, wherein the noise whitening filter is adapted for minimizing variance of its output signal, a soft detector adapted for receiving output from the noise whitening filter, the soft detector adapted for calculating first soft information about each bit of the signal and sending the first soft information to a soft decoder, and the soft decoder positioned subsequent to the soft detector, the soft decoder being adapted for calculating second soft information about each bit of the signal and sending the second soft information to the soft detector. Other systems, methods, and computer program products are described according to more embodiments. | 12-19-2013 |
20130335849 | ADAPTIVE SOFT-OUTPUT DETECTOR FOR MAGNETIC TAPE READ CHANNELS - In one embodiment, a system includes a tape channel for reading data from a magnetic tape medium to produce a signal, a bank of noise whitening filters positioned subsequent to the tape channel adapted for receiving the signal, the bank of noise whitening filters being adapted for minimizing variance of noise affecting the signal at an output of the bank of noise whitening filters, wherein each noise whitening filter in the bank of noise whitening filters is dependent on a different possible data pattern, a soft DMAX detector adapted for calculating first soft information, dependent on the different possible data patterns, about each bit of the signal from the bank of noise whitening filters, and sending the first soft information to a soft decoder adapted for calculating second soft information about each bit of the signal and sending the second soft information to the soft DMAX detector. | 12-19-2013 |
20130342374 | GENERATING A CODE ALPHABET OF SYMBOLS TO GENERATE CODEWORDS FOR WORDS USED WITH A PROGRAM - Provided are a computer program product, system, and method for generating a code alphabet for use by a deployed program to determine codewords for words. A first code alphabet has a first number of symbols that provide variable length codings of the words. A second code alphabet is generated having a second number of symbols formed by merging the symbols in the first code alphabet, wherein the second code alphabet comprises the code alphabet used by the deployed program. | 12-26-2013 |
20140108881 | BLOCK-INTERLEAVED AND ERROR CORRECTION CODE (ECC)-ENCODED SUB DATA SET (SDS) FORMAT - In one embodiment, a system for encoding data includes logic adapted for receiving data having one or more sub data sets, a C1 encoder module adapted for generating a plurality of C1 codewords during C1 ECC encoding of the one or more sub data sets, logic adapted for interleaving the plurality of C1 codewords into C1 codeword interleaves (CWIs), each CWI having a predetermined number of C1 codewords interleaved therein, a C2 encoder module adapted for generating a plurality of C2 codewords during C2 ECC encoding of the one or more sub data sets, wherein each C2 codeword has at most one symbol from each C1 codeword in each CWI, and wherein each C2 codeword has one symbol from at least two different C1 codewords in each CWI, and logic adapted for writing the one or more encoded sub data sets to a storage medium. | 04-17-2014 |
20140189461 | UNEQUAL ERROR PROTECTION SCHEME FOR HEADERIZED SUB DATA SETS - In one embodiment, a method includes receiving a headerized SDS protected by unequal error protection; decoding a header from the headerized SDS and removing an impact of the header from C1 row parity to obtain a SDS; for a number of iterations: performing C2 column decoding, for no more than a number of interleaves in each row of the SDS: overwriting a number of columns with successfully decoded C2 codewords, erasing a number of C2 codewords, and maintaining remaining columns as uncorrected, performing C1 row decoding; for no more than a number of interleaves in each row of the SDS: overwriting a number of rows with successfully decoded C1 codewords, erasing a number of C1 codewords, and maintaining remaining rows as uncorrected; and outputting the SDS when all rows include only C1 codewords and all columns include only C2 codewords; otherwise, outputting indication that the SDS cannot be decoded properly. | 07-03-2014 |
20140211564 | LEVEL-ESTIMATION IN MULTI-LEVEL CELL MEMORY - The memory cells storing a group of codewords are read to obtain respective read signals each comprising N signal components corresponding to respective symbols of a codeword. The components of each read signal are ordered according to signal level to produce an ordered read signal. Correspondingly-positioned components of the ordered read signals are then ordered according to signal level to produce ordered component sets for respective component positions in a said ordered read signal. Each ordered component set is partitioned into subsets corresponding to respective memory cell levels, wherein the subsets of the ordered component sets contain respective numbers of components dependent on predefined probabilities of occurrence of different symbol values at different positions in a said codeword whose symbols are ordered according to symbol value. The reference signal level is determined in dependence on the signal components in the subsets corresponding to that memory cell level. | 07-31-2014 |
20140325296 | READ-DETECTION IN MULTI-LEVEL CELL MEMORY - A method and apparatus for detecting N-symbol codewords. The method including: reading q-level memory cells to obtain a read signal having N signal components; detecting the memory cell level corresponding to each component using a first correspondence criterion dependent on reference signal levels; identifying unreliable components; detecting, for each unreliable component, the next-most-closely corresponding memory cell level according to the first correspondence criterion; defining a set of ordered codeword vectors having N symbols corresponding to respective components of the read signal ordered according to a signal level, wherein the symbol values in each ordered codeword vector correspond to one combination of detected memory cell levels; defining, for each read signal, candidate initial vectors having intersected the ordered codeword vectors and plurality of initial vectors; and detecting, if the candidate initial vectors contains a vector, the codeword corresponding to that read signal that depends on the candidate initial vectors. | 10-30-2014 |
20140347762 | COMBINED SOFT DETECTION/SOFT DECODING IN TAPE DRIVE STORAGE CHANNELS - In one embodiment, a tape drive system includes a soft detector having logic configured to execute a first forward loop of a detection algorithm on a first block of signal samples during a first time interval, execute a first reverse loop of the detection algorithm on the first block of signal samples during a second time interval, execute a second reverse loop of the detection algorithm on the first block of signal samples during a fifth time interval, and execute a second forward loop of the detection algorithm on the first block of signal samples during a fourth time interval using second soft information. Other tape drive systems and computer program products for decoding data are presented in more embodiments. | 11-27-2014 |
20140355147 | CYCLE-SLIP RESILIENT ITERATIVE DATA STORAGE READ CHANNEL ARCHITECTURE - According to one embodiment, a magnetic medium's readback signal samples are processed iteratively to provide a slip-resistant read channel by feeding the decoder output decisions back to the read channel front end where they are used to drive the decision-aided digital signal processing functions and control loops. Since data decisions provided by the decoder are typically more reliable than those provided by the detector, a significant performance improvement is obtained. A more reliable operation of the digital front-end signal processing functions in turn allows improvements to the reliability of the decoded data. Usage of Error Correcting Code (ECC) schemes that are soft decodable makes the read channel technique, described according to various embodiments herein, particularly efficient. | 12-04-2014 |
20140355149 | ITERATIVE DATA STORAGE READ CHANNEL ARCHITECTURE HAVING DROPOUT MITIGATION - According to one embodiment, a magnetic medium's readback signal samples are processed iteratively to provide dropout mitigation for a read channel by feeding the decoder output decisions back to the read channel front end where they are used to drive the decision-aided digital signal processing functions and control loops. Since data decisions provided by the decoder are typically more reliable than those provided by the detector, a significant performance improvement is obtained. A more reliable operation of the digital front-end signal processing functions in turn allows improvements to the reliability of the decoded data. Usage of Error Correcting Code (ECC) schemes that are soft decodable makes the read channel technique, described according to various embodiments herein, particularly efficient. | 12-04-2014 |
20140355151 | TAPE HEADER PROTECTION SCHEME FOR USE IN A TAPE STORAGE SUBSYSTEM - In one embodiment, a system for integrating data and header protection in tape recording includes a processor and logic adapted to: provide a data array organized in rows and columns, each row of the data array including four interleaved C1 codewords (CWI-4), add a header to each row of the data array, each header including a CWI-4 Designation (CWID) which indicates a location of the CWI-4 within the data array, calculate ECC parity for at least one C1 codeword in each of the headerized rows, and modify the headerized rows to include the ECC parity, wherein each modified row includes four interleaved codewords, at least one codeword being a C1′ codeword which includes ECC parity for a data portion of a C1 codeword and a portion of a header, wherein none of the CWIDs are split across multiple C1′ codewords in a single modified row. | 12-04-2014 |
20140359396 | ITERATIVE DATA STORAGE READ CHANNEL ARCHITECTURE - In one embodiment, a method for iterative read channel operation includes executing digital front-end (DFE) functions on signal samples employing decisions provided by a detector executing a detection algorithm, executing an error correcting code (ECC) decoding algorithm on the signal samples using a decoder employing the decisions provided by the detector to generate decisions provided by the decoder, storing the signal samples and the decisions provided by the detector and the decoder, and in an iterative process: executing the DFE functions on the signal samples employing the decisions provided by the decoder, executing the detection algorithm on the signal samples using the detector employing the decisions provided by the decoder to regenerate the decisions provided by the detector, executing the decoding algorithm using the decisions provided by the detector to regenerate the decisions provided by the decoder, and outputting decoding information when the decoding algorithm produces a valid codeword. | 12-04-2014 |
20140380118 | UNEQUAL ERROR PROTECTION SCHEME FOR HEADERIZED SUB DATA SETS - A method for decoding a headerized sub data set (SDS) according to one embodiment includes decoding a header from a headerized SDS to obtain a SDS. C1 and C2 decoding are performed on the SDS in a number of iterations based on a number of interleaves in each row of the SDS. A number of columns of the SDS are overwritten with successfully decoded C2 codewords. A number of rows of the SDS are overwritten with successfully decoded C1 codewords. A number of C1 and/or C2 codewords of the SDS are erased. Remaining rows and/or columns of the SDS are maintained as uncorrected. The SDS is output when all rows of the SDS include only C1 codewords and all columns of the SDS include only C2 codewords. | 12-25-2014 |
20150015982 | OPTIMUM TAPE LAYOUT SELECTION FOR IMPROVED ERROR CORRECTION CAPABILITY - According to one embodiment, a system for selecting an optimum tape layout to store data on a tape medium may include a processor and logic integrated with and/or executable by the processor, the logic being configured to: select a family of data set layouts based on parameters associated with at least a tape drive and the tape medium, compute a set of all minimum distances for the selected family of data set layouts, calculate a first performance metric associated with each possible set of parameters, select a best first performance metric from all calculated first performance metrics and store a set of parameters associated with the best first performance metric, and select a data set layout algorithm which utilizes the set of parameters associated with the best first performance metric, wherein the data set layout algorithm and a rewrite layout algorithm combine to form an optimum tape layout. | 01-15-2015 |
20150046767 | COMBINATION ERROR AND ERASURE DECODING FOR PRODUCT CODES - In one embodiment, a system for combination error and erasure decoding for product codes includes a processor and logic integrated with and/or executable by the processor, the logic being configured to receive captured data, generate erasure flags for the captured data and provide the erasure flags to a C2 decoder, set a stop parameter to be equal to a length of C1 codewords in a codeword interleave used to encode the captured data, and selectively perform, in an iterative process, error or erasure C1 decoding followed by error or erasure C2 decoding until decoding is successful or unsuccessful. In more embodiments, a method and/or a computer program product may be used for combination error and erasure decoding for product codes. | 02-12-2015 |
20150058696 | TAPE HEADER FORMAT HAVING EFFICIENT AND ROBUST CODEWORD INTERLEAVE DESIGNATION (CWID) PROTECTION - In one embodiment, a system for providing header protection in magnetic tape recording is adapted to write a codeword interleave (CWI) set on a magnetic tape including a plurality of CWIs equal to a number of tracks, wherein a data set includes a plurality of CWI sets, provide a CWI set header for the CWI set, the CWI set header including a CWI header for each CWI in the CWI set, each CWI header including at least a CWI Designation (CWID) which indicates a location of the CWI within the data set, calculate or obtain CWID parity for all CWIDs in the CWI set header, the CWID parity including error correction coding (ECC) parity, and store the CWID parity to one or more fields which are repeated for each CWI header in the CWI set header without using reserved bits in the CWI set header to store the CWID parity. | 02-26-2015 |
20150085393 | TAPE HEADER PROTECTION SCHEME FOR USE IN A TAPE STORAGE SUBSYSTEM - In one embodiment, a system for integrating data and header protection includes a processor and logic integrated with and/or executable by the processor, the logic being configured to receive a data array organized in rows and columns, each row of the data array comprising two or more interleaved C1 codewords (CWI), and modify one or more rows of the data array to include a header and error correction code (ECC) parity to form one or more modified rows, wherein each modified row includes two or more interleaved codewords, at least one codeword being a C1′ codeword which includes ECC parity, wherein each header comprises a CWI Designation (CWID) which indicates a location of the CWI within the data array, and wherein none of the CWIDs are split across multiple C1′ codewords in a single modified row. Other systems, methods, and computer program products are presented in additional embodiments. | 03-26-2015 |