Patent application number | Description | Published |
20080217680 | NON-VOLATILE SEMICONDUCTOR MEMORY USING CHARGE-ACCUMULATION INSULATING FILM - There is provided a non-volatile semiconductor memory having a charge accumulation layer of a configuration where a metal oxide with a dielectric constant sufficiently higher than a silicon nitride, e.g., a Ti oxide, a Zr oxide, or a Hf oxide, is used as a base material and an appropriate amount of a high-valence substance whose valence is increased two levels or more (a VI-valence) is added to produce a trap level that enables entrance and exit of electrons with respect to the base material. | 09-11-2008 |
20080237667 | SEMICONDUCTOR DEVICE - A semiconductor device includes: an n-type MOS transistor and a p-type MOS transistor connected in series; and a first gate extending via an insulating film above a channel of the n-type MOS transistor and a channel of the p-type MOS transistor. By providing light to the first gate, electrons and holes are generated, at least one of either of the electrons and holes passes through above the channel of the n-type MOS transistor and at least one of the either of the electrons and holes passes through above the channel of the p-type MOS transistor, whereby the n-type MOS transistor and the p-type MOS transistor are switched. | 10-02-2008 |
20080237697 | NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME - A metal oxide having a sufficiently higher dielectric constant than silicon nitride, such as Ti oxide, Zr oxide, or Hf oxide is used as base material, and in order to generate a trap level capable of moving in and out electrons therein, a high-valence substance of valence of 2 or more (that is, valence VI or higher) is added by a proper amount, and to control the trap level, a proper amount of nitrogen (carbon, boron, or low-valence substance) is added, and thus a nonvolatile semiconductor memory having a charge accumulating layer is obtained. | 10-02-2008 |
20080237699 | NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory includes a source area and a drain area provided on a semiconductor substrate with a gap which serves as a channel area, a first insulating layer, a charge accumulating layer, a second insulating layer (block layer) and a control electrode, formed successively on the channel area, and the second insulating layer is formed by adding an appropriate amount of high valence substance into base material composed of substance having a sufficiently higher dielectric constant than the first insulating layer so as to accumulate a large amount of negative charges in the block layer by localized state capable of trapping electrons, so that the high dielectric constant of the block layer and the high electronic barrier are achieved at the same time. | 10-02-2008 |
20080272364 | INSULATING FILM AND ELECTRONIC DEVICE - An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first barrier layer, and consists of a material having a second bandgap smaller than the first bandgap and having a second relative permittivity larger than first relative permittivity. Discrete energy levels are formed in the well layer by a quantum effect. The second barrier layer is provided on the well layer, and consists of a material having a third bandgap larger than the second bandgap and having a third relative permittivity smaller than second relative permittivity. Alternatively, an insulating film comprising: n (n being an integer larger than 2) layers of barrier layer consisting of a material having a bandgap larger than a first bandgap and having a relative permittivity smaller than a first relative permittivity; and (n−1) layers of well layers consisting of a material having a bandgap smaller than the first bandgap and having a relative permittivity larger than the first relative permittivity, discrete energy levels being formed in the well layer by a quantum effect, each of the barrier layers and each of the well layers being stacked by turns, and discrete energy levels being formed in each of the well layers by a quantum effect, is provided. Alternatively, an insulating film having a lattice mismatch within a range of plus-or-minus 1.5% to the substrate, and further having a high barrier and a large permittivity is provided. | 11-06-2008 |
20080272365 | INSULATING FILM AND ELECTRONIC DEVICE - An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first barrier layer, and consists of a material having a second bandgap smaller than the first bandgap and having a second relative permittivity larger than first relative permittivity. Discrete energy levels are formed in the well layer by a quantum effect. The second barrier layer is provided on the well layer, and consists of a material having a third bandgap larger than the second bandgap and having a third relative permittivity smaller than second relative permittivity. Alternatively, an insulating film comprising: n (n being an integer larger than 2) layers of barrier layer consisting of a material having a bandgap larger than a first bandgap and having a relative permittivity smaller than a first relative permittivity; and (n−1) layers of well layers consisting of a material having a bandgap smaller than the first bandgap and having a relative permittivity larger than the first relative permittivity, discrete energy levels being formed in the well layer by a quantum effect, each of the barrier layers and each of the well layers being stacked by turns, and discrete energy levels being formed in each of the well layers by a quantum effect, is provided. Alternatively, an insulating film having a lattice mismatch within a range of plus-or-minus 1.5% to the substrate, and further having a high barrier and a large permittivity is provided. | 11-06-2008 |
20090008653 | LIGHT EMITTING DEVICE - A light emitting device includes an active layer including atoms A of a matrix semiconductor having a tetrahedral structure, a heteroatom D substituted for the atom A in a lattice site, and a heteroatom Z inserted into an interstitial site positioned closest to the heteroatom D, the heteroatom D having a valence electron number differing by +1 or −1 from that of the atom A, and the heteroatom Z having an electron configuration of a closed shell structure through charge compensation with the heteroatom D, and an n-electrode and a p-electrode adapted to supply a current to the active layer. | 01-08-2009 |
20090011537 | Semiconductor device and method for manufacturing same - The present invention is to obtain an MIS transistor which allows considerable reduction in threshold fluctuation for each transistor and has a low threshold voltage. First gate electrode material for nMIS and second gate electrode material for pMIS can be mutually converted to each other, so that a process can be simplified. Such a fact that a dependency of a work function on a doping amount is small is first disclosed, so that fluctuation in threshold voltage for each transistor hardly occurs. | 01-08-2009 |
20090014817 | INSULATING FILM AND ELECTRONIC DEVICE - An electronic device including a semiconductor layer having silicon as a major component; and a dielectric film epitaxially grown directly on a major surface of the semiconductor layer, wherein the dielectric film consists of a dielectric material having a Ruddlesden-Popper type structure, the Ruddlesden-Popper type structure is expressed by a chemical formula A | 01-15-2009 |
20090020835 | INSULATING FILM AND ELECTRONIC DEVICE - An electronic device including a semiconductor layer containing silicon as a major component; and a dielectric film epitaxially grown directly on a major surface of the semiconductor layer, a difference between 2 | 01-22-2009 |
20090057689 | LIGHT-EMITTING DEVICE - A light-emitting device includes an active region, an n-type region, a p-type region, an n-electrode and a p-electrode. The active region is formed from a semiconductor material. The semiconductor material has a tetrahedral structure and includes an impurity. The impurity creates at least two energy levels connected with the allowed transition within a band gap of the semiconductor material. The n-type and p-type regions in contact with the active region are disposed between the n-type and p-type regions. An excitation element is configured to inject an electron from the n-type region and inject a hole from the p-type region so as to generate an electron-hole pair in the active region. The active region has a thickness no less than an atomic distance of the semiconductor and no more than 5 nm. | 03-05-2009 |
20090166710 | NONVOLATILE SEMICONDUCTOR MEMORY - A nonvolatile semiconductor memory device includes: a semiconductor substrate; and a memory cell. The memory cell includes: a source region and a drain region formed at a distance from each other on the semiconductor substrate; a tunnel insulating film formed on a channel region of the semiconductor substrate, the channel region being located between the source region and the drain region; a charge storage film formed on the tunnel insulating film; a charge block film formed on the charge storage film; and a control electrode that is formed on the charge block film. The control electrode includes a Hf oxide film or a Zr oxide film having at least one element selected from the first group consisting of V, Cr, Mn, and Tc added thereto, and having at least one element selected from the second group consisting of F, H, and Ta added thereto. | 07-02-2009 |
20090194797 | INSULATING FILM AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - It is made possible to provide an insulating film that can reduce the leakage current. An insulating film includes: an amorphous oxide dielectric film containing a metal, hydrogen, and nitrogen. The nitrogen amount [N] and the hydrogen amount [H] in the oxide dielectric film satisfy the following relationship: {[N]−[H]}/2≦1.0×10 | 08-06-2009 |
20090200616 | SEMICONDUCTOR DEVICE - According to one embodiment, it is possible to provide a semiconductor device provided with an MIS transistor which has an effective work function being, as much as possible, suitable for low threshold operation. A CMIS device provided with an electrode having an optimal effective work function and enabling low threshold operation to achieve by producing an in-gap level by the addition of a high valence metal in an Hf (or Zr) oxide and changing a position of the in-gap level by nitrogen or fluorine or the like has been realized. | 08-13-2009 |
20090242970 | SEMICONDUCTOR DEVICE, CAPACITOR, AND FIELD EFFECT TRANSISTOR - It is made possible to provide a semiconductor device that has the effective work function of the connected metal optimized at the interface between a semiconductor and the metal. A semiconductor device includes: a semiconductor film; an oxide film formed on the semiconductor film, the oxide film including at least one of Hf and Zr, and at least one element selected from the group consisting of V, Cr, Mn, Nb, Mo, Tc, W, and Re being added to the oxide film; and a metal film formed on the oxide film. | 10-01-2009 |
20090245314 | LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor light-emitting device including an insulating film, an optical resonator formed on the insulating film, and a p-electrode and an n-electrode which are disposed on the both sides of the optical resonator, respectively. The optical resonator includes a first semiconductor wire and a second semiconductor wire which are arranged in parallel with a space left therebetween, the space being narrower than emission wavelength, resonator mirrors disposed at the both ends of these semiconductor wires, and a plurality of semiconductor ultra-thin films which are interposed between the first semiconductor wire and the second semiconductor wire and are electrically connected with these semiconductor wires, the first semiconductor wire is electrically connected with the p-electrode, and the second semiconductor wire is electrically connected with the n-electrode, thereby enabling the semiconductor ultra-thin films to generate laser oscillation as a current is injected thereinto. | 10-01-2009 |
20100052035 | NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS - A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and a second insulating layer formed on the first insulating layer and having a higher dielectric constant than the first insulating layer, the second insulating layer having a first site performing hole trapping and releasing, the first site being formed by adding an element different from a base material to the second insulating film, the first site being located at a lower level than a Fermi level of a material forming the semiconductor layer; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate electrode formed on the second insulating film. | 03-04-2010 |
20100123165 | SEMICONDUCTOR MATERIAL, METHOD OF PRODUCING SEMICONDUCTOR MATERIAL, LIGHT EMITTING DEVICE AND LIGHT RECEIVING DEVICE - A semiconductor material includes a matrix semiconductor includes constituent atoms bonded to each other into a tetrahedral bond structure, and a heteroatom Z doped to the matrix semiconductor, in which the heteroatom Z is inserted in a bond so as to form a bond-center structure with an stretched bond length, and the bond-center structure is contained in a proportion of 1% or more based on the heteroatom Z. | 05-20-2010 |
20100224916 | SEMICONDUCTOR DEVICE - It is made possible to optimize the effective work function of the metal for a junction and suppress the resistance as far as possible at the interface between a semiconductor or a dielectric material and a metal. A semiconductor device includes: a semiconductor film; a Ti oxide film formed on the semiconductor film, and including at least one element selected from the group consisting of V, Cr, Mn, Fe, Co, Ni, Nb, Mo, Tc, Ru, Rh, Pd, Ta, W, Re, Os, Ir, and Pt; and a metal film formed on the Ti oxide film. | 09-09-2010 |
20100244157 | SEMICONDUCTOR DEVICE - A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from Hf and Zr, the metal oxide layer further including at least one element selected from the group consisting of Ru, Cr, Os, V, Tc, and Nb, the metal oxide layer having sites that capture or release charges formed by inclusion of the element, density of the element in the metal oxide layer being in the range of 1×10 | 09-30-2010 |
20110175187 | SOLID-STATE IMAGING DEVICE - Certain embodiments provide a solid-state imaging device including: a photoelectric converting unit that includes a semiconductor layer of a second conductivity type provided on a semiconductor substrate of a first conductivity type, converts incident light entering a first surface of the semiconductor substrate into signal charges, and stores the signal charges; a readout circuit that reads the signal charges stored by the photoelectric converting unit; an antireflection structure that is provided on the first surface of the semiconductor substrate to cover the semiconductor layer of the photoelectric converting unit, includes a fixed charge film that retains fixed charges being non-signal charges, and prevents reflection of the incident light; and a hole storage region that is provided between the photoelectric converting unit and the antireflection structure, and stores holes being non-signal charges. | 07-21-2011 |
20110227164 | SEMICONDUCTOR DEVICE - According to one embodiment, it is possible to provide a semiconductor device provided with an MIS transistor which has an effective work function being, as much as possible, suitable for low threshold operation. A CMIS device provided with an electrode having an optimal effective work function and enabling low threshold operation to achieve by producing an in-gap level by the addition of a high valence metal in an Hf (or Zr) oxide and changing a position of the in-gap level by nitrogen or fluorine or the like has been realized. | 09-22-2011 |
20110233655 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, in a semiconductor memory device, a source region and a drain region are disposed away from each other in the semiconductor layer. A tunnel insulating film is formed between the source region and the drain region on the semiconductor layer. A charge accumulating film includes an oxide cluster and is formed on the tunnel insulating film. A block insulating film is formed on the charge accumulating film. A gate electrode is formed on the block insulating film. The oxide cluster includes either Zr or Hf, and further contains at least one element selected from Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Cd, Ta, W, Re, Os, Ir, Pt, Au and Hg. | 09-29-2011 |
20110254062 | FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A field effect transistor which can operate at a low threshold value includes: an n-type semiconductor region; a source region and a drain region separately formed in the n-type semiconductor region; a first insulating film formed in the semiconductor region between the source region and the drain region and containing silicon and oxygen; a second insulating film formed on the first insulating film and containing at least one material selected from Hf, Zr, and Ti and oxygen; and a gate electrode formed on the second insulating film. Ge is doped in an interface region including an interface between the first insulating film and the second insulating film, and an area density of the Ge has a peak on a first insulating film side in the interface region. | 10-20-2011 |
20120196431 | INSULATING FILM AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - It is made possible to provide an insulating film that can reduce the leakage current. An insulating film includes: an amorphous oxide dielectric film containing a metal, hydrogen, and nitrogen. The nitrogen amount [N] and the hydrogen amount [H] in the oxide dielectric film satisfy the following relationship: {[N]—[H]}/2≦1.0×10 | 08-02-2012 |
20120199846 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor device of an embodiment at least includes: a SiC substrate; and a gate insulating film formed on the SiC substrate, wherein at an interface between the SiC substrate and the gate insulating film, some of elements of both of or one of Si and C in an outermost surface of the SiC substrate are replaced with at least one type of element selected from nitrogen, phosphorus, and arsenic. | 08-09-2012 |
20120228630 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device according to an embodiment includes a first electrode and a first silicon carbide (SiC) semiconductor part. The first electrode uses a conductive material and the first silicon carbide (SiC) semiconductor part is connected to the first electrode, in which at least one element of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba) is contained in an interface portion with the first electrode in such a way that a surface density thereof peaks, and whose conduction type is a p-type. | 09-13-2012 |
20120228694 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device according to an embodiment, includes a dielectric film and an Si semiconductor part. The dielectric film is formed by using one of oxide, nitride and oxynitride. The Si semiconductor part is arranged below the dielectric film, having at least one element of sulfur (S), selenium (Se), and tellurium (Te) present in an interface with the dielectric film, and formed by using silicon (Si). | 09-13-2012 |
20120326244 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a semiconductor substrate, a source region, a drain region, an insulating film and a gate electrode. The source region is formed in the semiconductor substrate. The drain region is formed in the semiconductor substrate with being separate from the source region. The insulating film is formed between the source region and the drain region and on or above the semiconductor substrate. The insulating film includes lanthanum aluminate containing at least one element selected from Si, Ge, Mg, Ca, Sr, Ba and N. The lanthanum aluminate contains at least one element selected from Ti, Hf and Zr. The gate electrode is formed on the insulating film. | 12-27-2012 |
20130062623 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a semiconductor device including: a first electrode formed of a conductive material; a p-type first silicon carbide (SiC) semiconductor section and an n-type second SiC semiconductor section | 03-14-2013 |
20130062686 | NON-VOLATILE SEMICONDUCTOR MEMORY USING CHARGE-ACCUMULATION INSULATING FILM - There is provided a non-volatile semiconductor memory having a charge accumulation layer of a configuration where a metal oxide with a dielectric constant sufficiently higher than a silicon nitride, e.g., a Ti oxide, a Zr oxide, or a Hf oxide, is used as a base material and an appropriate amount of a high-valence substance whose valence is increased two levels or more (a VI-valence) is added to produce a trap level that enables entrance and exit of electrons with respect to the base material. | 03-14-2013 |
20140034966 | TRANSISTOR AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a transistor includes: a structural body; an insulating film; a control electrode; a first electrode; and a second electrode. The structural body includes a first through a third semiconductor regions, and includes a compound semiconductor having a first and a second elements. The first electrode is electrically continuous with the third semiconductor region. The second electrode is electrically continuous with the first semiconductor region. The structural body has a first region provided above a lower end of the second semiconductor region and a second region other than the first region. The first region is a region formed by making a ratio of concentration of source gas of the second element to concentration of source gas of the first element larger than 1.0. Impurity concentration of the first conductivity type in the first region is higher than that in the second region. | 02-06-2014 |
20140084303 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor device includes a structural body, an insulating film, and a control electrode. The structural body has a first surface, and includes a first semiconductor region including silicon carbide of a first conductivity type, a second semiconductor region including silicon carbide of a second conductivity type, and a third semiconductor region including silicon carbide of the first conductivity type. The structural body has a portion in which the first semiconductor region, the second semiconductor region, and the third semiconductor region are arranged in this order in a first direction along the first surface. The insulating film is provided on the first surface of the structural body. The control electrode is provided on the insulating film. The structural body has a buried region provided between the second semiconductor region and the first surface. The buried region is doped with a group V element. | 03-27-2014 |
20140084304 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a structure, an insulating film, a control electrode, first and second electrodes. The structure has a first surface, and includes a first, a second, and a third semiconductor region. The structure has a portion including the first, second, and third semiconductor regions arranged in a first direction along the first surface. The insulating film is provided on the first surface. The control electrode is provided on the insulating film. The first electrode is electrically connected to the third semiconductor region. The second electrode is electrically connected to the first semiconductor region. The insulating film includes a charge trap region. A bias voltage is applied to the first and second electrodes, and includes a shift voltage. The shift voltage shifts a reference potential of a voltage applied to the first and second electrodes by a certain voltage. | 03-27-2014 |
20140183561 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor device includes a first semiconductor part and a conductive electrode. The first semiconductor part is made of SiC. The SiC contains a first element as an n-type or p-type impurity. The first semiconductor part has a first interface part. The first interface part is configured to have maximum area density of the first element. The c conductive electrode is electrically connected to the first interface part. | 07-03-2014 |
20140191247 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a gate electrode, a first semiconductor region, a second semiconductor region of a first conductivity type, a third semiconductor region of a second conductivity type and a fourth semiconductor region of the first conductivity type. The first semiconductor region includes a silicon carbide crystal of 4H—SiC. The second semiconductor region includes a first portion opposing the gate electrode and is provided between the gate electrode and the first semiconductor region. The third semiconductor region has a lattice spacing different from a lattice spacing of the silicon carbide crystal of 4H—SiC and is provided between the gate electrode and the second semiconductor region. The fourth semiconductor region is selectively provided on the third semiconductor region. | 07-10-2014 |
20140209927 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME AND SEMICONDUCTOR SUBSTRATE - According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type made of silicon carbide; and a second semiconductor layer of a second conductivity type made of silicon carbide, placed in junction with the first semiconductor layer, and containing an electrically inactive element. | 07-31-2014 |
20140283736 | VAPOR PHASE GROWTH APPARATUS AND VAPOR PHASE GROWTH METHOD - A vapor phase growth apparatus of an embodiment includes a reaction chamber, a first gas supply channel that supplies a Si source gas to the reaction chamber, a second gas supply channel that supplies a C source gas to the reaction chamber, a third gas supply channel that supplies an n-type impurity source gas to the reaction chamber, a fourth gas supply channel that supplies a p-type impurity source gas to the reaction chamber, and a control unit that controls the amounts of the n-type impurity and p-type impurity source gases at a predetermined ratio, and introduces the n-type impurity and p-type impurity source gases into the reaction chamber. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al, Ga, or In and N, and/or a combination of B and P. | 09-25-2014 |
20140284619 | SIC EPITAXIAL WAFER AND SEMICONDUCTOR DEVICE - An SiC epitaxial wafer of an embodiment includes, an SiC substrate, and a p-type first SiC epitaxial layer that is formed on the SiC substrate and contains a p-type impurity and an n-type impurity. An element A and an element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus) when the p-type impurity is the element A and the n-type impurity is the element D. The ratio of the concentration of the element D to the concentration of the element A in the combination(s) is higher than 0.33 but lower than 1.0. | 09-25-2014 |
20140284620 | SEMICONDUCTOR DEVICE - A semiconductor device of an embodiment includes an n-type SiC substrate, an n-type SiC layer formed on the SiC substrate; a p-type first SiC region formed in the surface of the SiC layer and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the concentration of the element A in the combination(s) being higher than 0.33 but lower than 0.995, the concentration of the element A forming part of the combination(s) being not lower than 1×10 | 09-25-2014 |
20140284621 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device of an embodiment includes an n-type SiC impurity region containing a p-type impurity and an n-type impurity. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus). The ratio of the concentration of the element A to the concentration of the element D in the above combination is higher than 0.40 but lower than 0.95, and the concentration of the element D forming the above combination is not lower than 1×10 | 09-25-2014 |
20140284622 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device of an embodiment includes a p-type SiC impurity region containing a p-type impurity and an n-type impurity. Where the p-type impurity is an element A and the n-type impurity is an element D, the element A and the element D form a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus). The ratio of the concentration of the element D to the concentration of the element A in the above combination is higher than 0.33 but lower than 0.995, and the concentration of the element A forming part of the above combination is not lower than 1×10 | 09-25-2014 |
20140284623 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device of an embodiment includes, an n-type SiC substrate that has first and second faces, and contains a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D being a combination of Al (aluminum), Ga (gallium), or In (indium) and N (nitrogen), and/or a combination of B (boron) and P (phosphorus), the ratio of the concentration of the element A to the concentration of the element D in the combination(s) being higher than 0.40 but lower than 0.95, the concentration of the element D forming the combination(s) being not lower than 1×10 | 09-25-2014 |