Patent application number | Description | Published |
20080251819 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device may include a semiconductor substrate, a diffusion layer provided over the semiconductor substrate, source and drain diffusion regions provided in upper regions of the diffusion layer, a gate insulating film provided over the source and drain diffusion regions and the diffusion layer, a gate electrode provided on the gate insulating film and positioned over the diffusion layer, a passivation film provided over the gate insulating film and the gate electrode, an insulating film that covers the passivation film, and contact plugs that penetrate the insulating film, the passivation film, and the gate insulating film, so that the contact plugs reach the source and drain diffusion regions. The contact plugs are positioned near side walls of the gate electrode. Fluorine is implanted to the passivation film. Fluorine is diffused to a silicon-insulator interface between the gate insulating film and the diffusion layer under the gate electrode. | 10-16-2008 |
20080251861 | SEMICONDUCTOR APPARATUS AND PRODUCTION METHOD OF THE SAME - In order to provide a semiconductor apparatus and a production method of the semiconductor apparatus that achieves a small interface trap density by implantation of fluorine and that achieves both small property fluctuation and a small leak current, a semiconductor apparatus includes: a semiconductor substrate; a well layer formed on the semiconductor substrate; a channel dope layer formed on the well layer; a source/drain diffused layer provided at an upper peripheral of the channel dope layer; gate electrodes formed on the channel dope layer via a gate insulation film; a polycrystalline silicon plug which is formed between the gate electrodes and which touches the source/drain diffused layer while piercing the gate insulation film; and fluorine which is selectively implanted only in a source area of the source/drain diffused layer. | 10-16-2008 |
20090230464 | SEMICONDUCTOR DEVICE INCLUDING TRENCH GATE TRANSISTOR AND METHOD OF FORMING THE SAME - A semiconductor device may include at least one active region that has at least one trench groove. A fin channel region is deposed in the active region and between the at least one trench groove and an isolation region of the semiconductor substrate. The gate insulating film is disposed on inside walls of the at least one trench groove. The gate electrode is disposed on the gate insulating film and in the at least one trench groove. The gate electrode is separated by the gate insulating film from the fin channel region. The source and drain regions are disposed in the active region, and are connected to the fin channel region. The junction of each of the source and drain regions with the semiconductor substrate is deeper than the bottom of the fin channel region. | 09-17-2009 |
20110049599 | SEMICONDUCTOR DEVICE - In Trench-Gate Fin-FET, in order that the advantage which is exerted in Fin-FET can be sufficiently taken even if a transistor becomes finer and, at the same time, decreasing of on-current can be suppressed by saving a sufficiently large contact area in the active region, a fin width | 03-03-2011 |
20110069564 | SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME - A semiconductor device may include, but is not limited to: a first insulating film; first and second impurity layers on the first insulating film; a semiconductor layer on the first insulating film; a second insulating film covering the semiconductor layer; a first electrode on the second insulating film over the semiconductor layer; and a second electrode on the second insulating film over the semiconductor layer. The first and second impurity layers have a first conductive type. The first impurity layer is separated from the second impurity layer. The semiconductor layer is positioned between the first and second impurity layers. The semiconductor layer has a second conductive type which is different from the first conductive type. The first electrode is electrically insulated from the second electrode. The second electrode at least partially overlaps the first electrode in plan view. | 03-24-2011 |
20120211813 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor device may include, but is not limited to, a semiconductor substrate, an isolation electrode, a gate electrode, a gate insulating film, and a first insulating film. The semiconductor substrate has a first groove and a second groove. An isolation electrode is positioned in the first groove. The gate electrode is positioned in the second groove. The gate insulating film is adjacent to the gate electrode. The first insulating film is adjacent to the isolation electrode. The isolation electrode is greater in threshold voltage than the gate electrode. | 08-23-2012 |
20120273859 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure. | 11-01-2012 |
20140346595 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a semiconductor device may include, but is not limited to, a semiconductor substrate, an isolation electrode, a gate electrode, a gate insulating film, and a first insulating film. The semiconductor substrate has a first groove and a second groove. An isolation electrode is positioned in the first groove. The gate electrode is positioned in the second groove. The gate insulating film is adjacent to the gate electrode. The first insulating film is adjacent to the isolation electrode. The isolation electrode is greater in threshold voltage than the gate electrode. | 11-27-2014 |
Patent application number | Description | Published |
20090011018 | Sustained release formulation for tacrolimus - A sustained release pharmaceutical composition for tacrolimus, comprising a solid dispersion containing tacrolimus or a pharmaceutically acceptable salt thereof, and a carrier for a sustained release pharmaceutical composition, wherein a dissolution rate of tacrolimus after 4 hours from the beginning of a dissolution test is less than 35%, is disclosed. | 01-08-2009 |
20110142933 | Controlled Release Dosage Form of Tacrolimus - A controlled release dosage form of tacrolimus, comprising a solid dispersion of tacrolimus, wherein a controlled release base, which is selected from the group consisting of a water-soluble macromolecule, a gum base, and a membrane forming agent and does not form the solid dispersion of tacrolimus, is further contained, is disclosed. The controlled release dosage form of tacrolimus has an excellent controlled release and shows a stable blood concentration. | 06-16-2011 |
20110281906 | SUSTAINED RELEASE FORMULATION FOR TACROLIMUS - A sustained release pharmaceutical composition for tacrolimus, comprising a solid dispersion containing tacrolimus or a pharmaceutically acceptable salt thereof, and a carrier for a sustained release pharmaceutical composition, wherein a dissolution rate of tacrolimus after 4 hours from the beginning of a dissolution test is less than 35%, is disclosed. | 11-17-2011 |