Patent application number | Description | Published |
20120091986 | SEMICONDUCTOR DEVICE AND POWER SUPPLY APPARATUS - A semiconductor device includes a first transistor including a GaN-based semiconductor stacked structure formed over a substrate, a first gate electrode having a plurality of first fingers over the semiconductor stacked structure, a plurality of first drain electrodes provided along the first fingers, and a plurality of first source electrodes provided along the first fingers; a second transistor including the semiconductor stacked structure, a second gate electrode having a plurality of second fingers over the semiconductor stacked structure, the second drain electrodes provided along the second fingers, and a plurality of second source electrodes provided along the second fingers; a drain pad provided over or under the first drain electrodes, and coupled to the first drain electrodes; a source pad provided over or under the second source electrodes, and coupled to the second source electrodes; and a common pad coupled to the first source electrodes and the second drain electrodes. | 04-19-2012 |
20120218009 | CONTROL CIRCUIT OF TRANSISTOR AND METHOD - A control circuit, which controls a transistor including a gate and a field plate, includes: a detecting circuit which detects a driving timing to drive the transistor; a timing controlling circuit which controls a first driving timing to drive the gate and a second driving timing to drive the field plate, in response to the driving timing; and a driving circuit which drives the gate in response to the first driving timing, and drives the field plate in response to the second driving timing. | 08-30-2012 |
20120235210 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD AND TRANSISTOR CIRCUIT - A transistor circuit includes a first high electron mobility transistor and a second high electron mobility transistor having a negative threshold voltage, wherein a source of the second high electron mobility transistor is coupled to a gate of the first high electron mobility transistor, and a gate of the second high electron mobility transistor is coupled to a source of the first high electron mobility transistor. | 09-20-2012 |
20120242375 | SWITCHING CIRCUIT DEVICE AND CONTROL CIRCUIT - A switching circuit device has a first transistor which has a drain coupled to a high-potential terminal, a source coupled to a low-potential power supply, and, a driving circuit, which outputs, to a gate of the first transistor in response to an input control signal, a pulse having a potential higher than a threshold voltage of the first transistor and a potential of the low-potential power supply, wherein the driving circuit has a first inverter including a second transistor provided between the gate and the source of the first transistor, wherein when the first transistor changes from on to off due to the pulse, the second transistor conducts and short-circuits the gate and the source of the first transistor. | 09-27-2012 |
20120268091 | SWITCHING CIRCUIT DEVICE AND POWER SUPPLY DEVICE HAVING SAME - A switching circuit device provided between a first node and a second node within a power supply circuit, an inductor being coupled to the first or second node, the switching circuit device has: a first transistor that is provided between the first node and the second node and has a first gate width; a second transistor that is provided in parallel with the first transistor between the first node and the second node and has a second gate width larger than the first gate width; and a driving signal generation circuit, which, in response to a control signal generated according to an output voltage of the power supply circuit, outputs a first driving signal which drives the first transistor on and off, and a second driving signal which drives the second transistor on and off, with different timings between the first driving signal output and the second driving signal output. | 10-25-2012 |
20130176013 | SEMICONDUCTOR DEVICE AND POWER SUPPLY APPARATUS - A semiconductor device includes a first transistor including a GaN-based semiconductor stacked structure formed over a substrate, a first gate electrode having a plurality of first fingers over the semiconductor stacked structure, a plurality of first drain electrodes provided along the first fingers, and a plurality of first source electrodes provided along the first fingers; a second transistor including the semiconductor stacked structure, a second gate electrode having a plurality of second fingers over the semiconductor stacked structure, the second drain electrodes provided along the second fingers, and a plurality of second source electrodes provided along the second fingers; a drain pad provided over or under the first drain electrodes, and coupled to the first drain electrodes; a source pad provided over or under the second source electrodes, and coupled to the second source electrodes; and a common pad coupled to the first source electrodes and the second drain electrodes. | 07-11-2013 |
20130228827 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD AND TRANSISTOR CIRCUIT - A transistor circuit includes a first high electron mobility transistor and a second high electron mobility transistor having a negative threshold voltage, wherein a source of the second high electron mobility transistor is coupled to a gate of the first high electron mobility transistor, and a gate of the second high electron mobility transistor is coupled to a source of the first high electron mobility transistor. | 09-05-2013 |
Patent application number | Description | Published |
20130033243 | DRIVE CIRCUIT OF POWER UNIT, AND POWER UNIT - A drive circuit of a power unit, which includes a high-side transistor and a low-side transistor connected in series between a high potential power-supply line and a low potential power-supply line, and an inductor provided between a connection node of both of the transistors and an output terminal, and which drives both of the transistors, the drive circuit has: a first gate driver which drives a gate of the high-side transistor; and a second gate driver which drives a gate of the low-side transistor. In a transitional period of changing from a first state where the high-side transistor is ON and the low-side transistor is OFF to a second state where the high-side transistor is OFF and the low-side transistor is ON, the first gate driver drives the gate of the high-side transistor to a first voltage which is lower than a potential of the low potential power-supply line. | 02-07-2013 |
20130194025 | DRIVING METHOD AND DRIVING CIRCUIT OF SCHOTTKY TYPE TRANSISTOR - A driving circuit of a schottky type transistor includes an input terminal supplied with an input signal, and an output terminal connected to a gate of the schottky type transistor. The driving circuit outputs a first voltage lower than a breakdown voltage of the schottky type transistor to the output terminal at the time of rising of the input signal, and thereafter supplies a second voltage higher than the breakdown voltage to a resistance connected to the output terminal. | 08-01-2013 |
20130249605 | SEMICONDUCTOR DEVICE - A semiconductor device, includes: a first field effect transistor having one terminal to which a first electrical potential is given; a second field effect transistor having one terminal to which a second electrical potential smaller than the first electrical potential is given; a controller that controls each electrical potential of each control terminal of the first field effect transistor and the second field effect transistor; a capacitor element having one end connected to the control terminal of the first field effect transistor, the capacitor element being charged by the control of the controller; and a load element connected between another terminal of the first field effect transistor and another terminal of the second field effect transistor. | 09-26-2013 |
20140084966 | DRIVER CIRCUIT OF SCHOTTKY TRANSISTOR - A driver circuit includes an output terminal connected to a gate of a Schottky transistor, a reference transistor formed in the same manner as the Schottky transistor, a resistor connected between a first power source line and a gate of the reference transistor, a voltage generator configured to supply a second node with a voltage equal to or lower than a voltage at a first node between the resistor and the reference transistor, and a switching element configured to transmit the voltage at the second node to the output terminal in response to a signal inputted to an input terminal. | 03-27-2014 |
Patent application number | Description | Published |
20130297860 | MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS - A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system. | 11-07-2013 |
20130297861 | MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS - A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system. | 11-07-2013 |
20130297862 | MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS - A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access. the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system. | 11-07-2013 |
20130297890 | MEMORY SYSTEM HAVING A PLURALITY OF TYPES OF MEMORY CHIPS AND A MEMORY CONTROLLER FOR CONTROLLING THE MEMORY CHIPS - A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips through the common bus, and converts the received signals into controller input signals receivable to the controller. This allows the single memory controller to access the plurality of types of memory chips. As a result, the memory controller can be reduced in chip size, lowering the cost of the memory system. | 11-07-2013 |
Patent application number | Description | Published |
20140112580 | EYELID DETECTION DEVICE - An ECU which is connected to an image sensor and an illuminance sensor includes an eyelid detection unit that detects the positions of the upper and lower eyelids from a face image, an eyelid determination unit that determines the positions of the upper and lower eyelids detected by the eyelid detection unit, and an eye opening degree calculation unit that calculates the degree of eye opening. The eyelid determination unit searches for a red-eye candidate in the range in which the skin is assumed to be present from the positions of the upper and lower eyelids detected by the eyelid detection unit. When the red-eye candidate is searched in the range, the eyelid determination unit determines that the eyelid detection unit falsely detects the positions of the upper and lower eyelids. | 04-24-2014 |
20140133705 | RED-EYE DETERMINATION DEVICE - A black eye position existence probability density distribution learning unit that records a black eye position which is detected in the daytime to a black eye position existence probability density distribution, a red-eye candidate detection unit that detects red-eye candidates from the image of the driver at night, and a red-eye determination unit that determines the red eye from the red-eye candidates. The red-eye determination unit determines the red eye on the basis of the relationship between a change in the direction of the face and the behavior of the red-eye candidate and determines, as the red eye, the red-eye candidate disposed at the position of high black eye position existence probability density with reference to the black eye position existence probability density distribution. | 05-15-2014 |
20140140577 | EYELID DETECTION DEVICE | 05-22-2014 |
20140147019 | RED-EYE DETECTION DEVICE - An ECU connected to an image sensor includes a face position and face feature point detection unit that detects the feature points of the face of the driver, a red-eye detection unit that detects the red eye with template matching using a red-eye template, an eye opening degree calculation unit that calculates the degree of eye opening, a relative eye opening degree calculation unit that calculates the relative degree of eye opening which is 0% in an eye-closed state and is 100% in an eye-open state, and a red-eye template update unit that generates a red-eye template on the basis of the relative degree of eye opening and updates a red-eye template used for the next template matching with the generated red-eye template. | 05-29-2014 |