Patent application number | Description | Published |
20080249846 | Content Reproduction Method, Content Reproduction Terminal and Content Providing System - A content playback method that is capable of preventing diversion and outflow of users' personal information, reliably protecting privacy and detecting and playing back content in accordance with users' needs. With this method, data including content is delivered from a data transmission server ( | 10-09-2008 |
20080256518 | Source Code Checker, Source Code Checking Method, Program for Causing Execution of the Method, and Storage Medium for Storing the Program - Disclosure is made of a source code checker and a source code checking method, for checking properties related to program behaviors meant by source code for a computer program; of a program for making execute the method; and of a storage medium for storing the program. This source code checking method includes a path extracting step and a checking information determining step. The path extracting step simulates a program described in source code for a computer program preliminarily input, to extract an instruction series to be actually executed. The checking information determining step determines checking information of the source code according to the instruction series extracted in the path extracting step. | 10-16-2008 |
20090177381 | CONTENT DISPLAY DEVICE AND CONTENT DISPLAY METHOD - A meta data set correlated with position information is acquired from a server via a communication interface unit ( | 07-09-2009 |
20100067533 | NETWORK CONTROL APPARATUS, METHOD, AND PROGRAM - To enable network control (particularly, transmission band allocation) that excels in follow-up ability to follow changes in a network, locality, and responsiveness. A network control apparatus controls a wireless ad-hoc network and includes: a routing processing unit ( | 03-18-2010 |
20100097470 | MONITORING SYSTEM, CAMERA, AND VIDEO ENCODING METHOD - A monitor system is provided for making it possible to efficiently determine a coding quantity of each camera in accordance with the movement of an object. In each camera ( | 04-22-2010 |
20100097924 | DATA TRANSMITTING AND RECEIVING SYSTEM, TERMINAL, RELAY DEVICE, AND DATA TRANSMITTING METHOD - The terminal includes: the transmitting and receiving unit ( | 04-22-2010 |
20100131670 | COMMUNICATION DEVICE, COMMUNICATION METHOD, AND PROGRAM - A transmission device includes: a relay device information obtaining unit ( | 05-27-2010 |
20100165846 | REPLAY TRANSMISSION DEVICE AND REPLAY TRANSMISSION METHOD - A relay transmission device can achieve high-quality transmission by suppressing congestion in an ad hoc network, even when a network environment changes or performance of a relay device to be communicated with changes. The relay transmission device includes: an optimization coefficient storage unit ( | 07-01-2010 |
20100195561 | WIRELESS RELAY APPARATUS AND WIRELESS RELAY METHOD - The wireless relay apparatus ( | 08-05-2010 |
20100238855 | RELAY DEVICE AND RELAY METHOD - A relay device can perform high-quality communication even in a wireless mesh network where relay devices are densely arranged and interference of wireless packets is caused. The relay device includes: a representative node determining unit ( | 09-23-2010 |
20110032818 | PATH CONTROL DEVICE, PATH CONTROL METHOD, AND PATH CONTROL PROGRAM - A path control device included in a terminal device ( | 02-10-2011 |
20110047291 | RELAY DEVICE, CONTROL METHOD, AND PROGRAM - A relay node ( | 02-24-2011 |
20110060831 | NETWORK MONITORING DEVICE, BUS SYSTEM MONITORING DEVICE, METHOD AND PROGRAM - A network monitoring device which monitors a network in which data is transmitted through relays, includes a monitoring frequency recording unit ( | 03-10-2011 |
20110069612 | BEST PATH SELECTING DEVICE, BEST PATH SELECTING METHOD, AND PROGRAM - A best path selecting device in a bus master ( | 03-24-2011 |
20120044942 | SEMICONDUCTOR SYSTEM, RELAY APPARATUS, AND CHIP CIRCUIT - Highly efficient and low latency network transmission in consideration of a difference in the traffic characteristic and a memory access load which changes moment by moment is realized. A relay device transmits data on a networked communication bus between a bus master and a memory. The relay device includes a delay time processor for obtaining information on processing delay time in other relay devices located on a plurality of transmission routes on which the data is transmitted; and a low latency route selector for selecting a memory and one of transmission routes to the memory, among the plurality of transmission routes, based on obtained information on the processing delay time regarding the plurality of transmission routes. | 02-23-2012 |
20120057467 | RELAY DEVICE - A relay device includes a switch for switching a combination of an input for receiving traffic data and an output for sending the traffic data; a congestion information processing section for obtaining congestion information indicating a degree of congestion of each of a plurality of traffics from an adjacent relay device which handles the plurality of traffics commonly with the relay device, and congestion information of each traffic in the relay device; a congestion information comparison section for finding information on a congestion level which quantitatively indicates difficulty of flowing of each traffic based on the congestion information obtained from the adjacent relay device and the congestion information of the relay device; a transmission scheduling adjustment section for assigning a transmission band of a bus to each traffic based on the congestion level; and a switch assignment section for shifting the switch based on a result of the assignment. | 03-08-2012 |
20120072635 | RELAY DEVICE - A relay device includes: an input buffer for receiving data units, each of which includes a header, to which multiple pieces of destination information have been added, and data associated with the header; multiple virtual channels for storing data units, each of the multiple virtual channels storing a data unit in accordance with the destination information; a destination comparing section for determining the order of allocation of virtual channels at a relay device on the receiving end with respect to the data units that are stored on the multiple virtual channels by seeing if their destinations are the same; and an output section for outputting the stored data units preferentially through one of the virtual channels that has already allocated at the relay device on the receiving end. | 03-22-2012 |
20120079147 | BUS CONTROL DEVICE - A bus controller includes: a data receiving section for receiving output status information from other bus controllers on transmission routes available; a route load detecting section for calculating uniformity of distribution index indicating the degree of non-uniformity in transmission flow rate between the routes based on the output status information; a routing section for determining transmission routes, of which the transmission flow rates have been adjusted by reference to the index; a packet assembling section for generating a packet; a data output section for outputting the packet through one of output ports; a header analyzing section for determining which output port is connected to a transmission route chosen by reference to information about the packet receiving end; and a data output section for outputting the packet through the output port. | 03-29-2012 |
20130028083 | ROUTER, METHOD FOR CONTROLLING ROUTER, AND PROGRAM - An router includes: a plurality of data storage sections configured to store input data; and an arbiter configured to compare the availability of at least one of the plurality of data storage sections with respect to data that is stored in that data storage section and that shares at least a part of a transmission path to the availability of another data storage section in an adjacent router with respect to that data that also shares at least that part of the transmission path, thereby determining, based on a result of the comparison, whether or not to output that data. | 01-31-2013 |
20130028090 | ROUTER AND CHIP CIRCUIT - Routers in a data transfer system relay data between the first node and each of the second nodes. A router includes a load value processing section and an aggregation decision section. The load value processing section obtains information about a load value of another router connected to a communications bus. The load value is a time delay caused by that another router and/or the throughput of that router. The aggregation decision section chooses one of the second nodes at which the data is to be received, and determines a transmission path between the second node chosen and the first node in accordance with information about the load value obtained from each router and information determined during a design process about the number of stages of routers from the first node through each said second node and/or the length of data to be transferred. | 01-31-2013 |
20130080671 | BUS CONTROLLER AND CONTROL UNIT THAT OUTPUTS INSTRUCTION TO THE BUS CONTROLLER - A bus controller is arranged on a plurality of network communication buses that connect together a plurality of bus masters, each sending out a packet, and at least one node, to which the packet is sent from each said bus master, in order to control the transmission route of a packet that is flowing through the plurality of communication buses. The bus controller includes: a route diagram manager configured to manage a plurality of transmission routes and their respective transmission statuses; a parameter generator configured to generate either a parameter that conforms to a predetermined probability distribution or a parameter that follows a predefined rule; a processor configured to select one of the plurality of transmission routes based on the respective transmission statuses of the transmission routes and the parameter; and a relay configured to perform relay processing on the packet that is flowing through the communication bus. | 03-28-2013 |
20130142066 | ROUTER, METHOD FOR CONTROLLING ROUTER, AND PROGRAM - A router includes an input section configured to receive data, a buffer section including a plurality of data storage sections and configured to store the data received by the input section, and an output section configured to output the data stored on the buffer section. The router also includes an allocation processing section configured to determine whether or not to store the data on a pre-secured specific data storage section among the plurality of data storage sections, or whether or not to store the data on a pre-secured specific data storage section among a plurality of data storage sections in a buffer section of another router which is an output destination, the determination being made based on information representing burstiness of the data received by the input section. | 06-06-2013 |
20130194927 | ROUTER, METHOD FOR CONTROLLING ROUTER, AND PROGRAM - A router includes a buffer selection section for receiving a flit from an adjacent router and determining whether to store the flit on an input buffer or to store the flit on a bypass buffer. The buffer selection section executes at least one of a first control of, when a bypass process was performed, changing at least one of a transmission path and a transmission flow rate of data based on a transmission state of the router; and a second control of, when a bypass control section did not execute the bypass process, changing at least one of a transmission path and a transmission flow rate of data based on a transmission state of another first router at which data not subjected to the bypass process and data subjected to the bypass process by another second router are joined together. | 08-01-2013 |
20130250792 | ROUTER - The router is used to relay a packet to be transmitted from one node to another in an integrated circuit that has distributed buses according to a packet exchange method. The router includes: a plurality of buffers, each of which configured to store packets with information indicating their transmission node; a classifying section configured to classify the buffers that store the packets into a number of groups according to the transmission nodes of the packets; a selecting section configured to select at least one of the buffers of each group; and an output port configured to sequentially output the packets that are stored in the selected buffer. | 09-26-2013 |
20130294458 | ROUTER, METHOD FOR CONTROLLING THE ROUTER, AND COMPUTER PROGRAM - An exemplary router is provided for an integrated circuit that has distributed buses and is arranged on a transmission route that leads from a transmission node to a reception node on the distributed buses to relay data. The distributed buses include first and second routes, each leading from the router to the reception node. The router includes a notifying section which sends a data transfer permission request to a second router on the first route and a third router on the second route and which determines whether or not the request is approved before a predetermined standby period passes to see if there is any abnormality in the first and second routes. | 11-07-2013 |
20130311819 | CONTROLLER - This controller is used in a system in which initiators and targets are connected via distributed buses to control transmission timing of an access request received from the initiators. The controller stores intermittent information including information about an intermittent period in which interference between packets can be restricted and bus operating frequency information indicating a bus operating frequency at which real-time performance is guaranteed for each initiator and which has been generated based on system configuration information and flow configuration information indicating, on a flow basis, a specification required for each initiator to access the target. The controller includes a clock generator; communications circuitry; and transmission interval setting circuitry which sets a time to send transmission permission responsive to a transmission request based on the intermittent period, a time when the transmission request is detected, and a previous transmission time. | 11-21-2013 |
20140019663 | CONTROLLER - A controller as an embodiment of the present disclosure controls a timing of transmitting an access request that has been received from an initiator (or its transmission interval). The controller includes: transmitting and receiving circuitry configured to receive an access request related to burst accesses from a first initiator that is connected via a first bus to, and adjacent to, the transmitting and receiving circuitry and configured to transmit the access request to a second bus implemented as a network; and a transmission interval controller configured to control the timing of transmitting the access request that has been received from the first initiator according to density of the burst accesses during a period in which the burst accesses continue and an access load on the second bus. | 01-16-2014 |
20140129750 | BUS CONTROLLER, BUS CONTROL SYSTEM AND NETWORK INTERFACE - In a bus control system for a semiconductor circuit, data is transmitted between first and second nodes over a network of buses. The bus controller is connected directly to the first node and includes: a route load detector which detects loads on routes that form at least one of a group of forward routes leading from the first to the second node and a group of backward routes leading from the second to the first node; a candidate route extraction circuit which extracts a candidate route from the group of routes so that loads on the routes that form the group become uniform; a route determining circuit which determines the route to transmit the data based on the candidate route and a predetermined selection rule; and a data communication circuit which transmits the data between the first and second nodes based on header information including route information indicating the route. | 05-08-2014 |
20140133307 | ROUTER, METHOD FOR CONTROLLING ROUTER, AND COMPUTER PROGRAM - In a bus system including a bus master, a first bus, and a second bus to connect them together, this router is arranged on the second bus to relay packets. The bus master outputs packets including information about at least one of (N+1) predetermined types of quality requirements. The second bus transmits packets designating at most N types of quality requirements. An exemplary router controls sending of the packets, with respect to at most N types of buffers that classify and store the packets by reference to the quality requirement type information and the packets stored in the buffers, so that the packets are sent in the descending order of their level of the quality requirement. The router controls sending schedule of the traffic flows by sensing a difference between the (N+1) different types of quality requirements. | 05-15-2014 |
20140204740 | BUS SYSTEM AND ROUTER - In an NoC bus system, data is transmitted between first and second nodes through a router. The data includes performance-ensuring data which guarantees throughput and/or a permitted time delay. The first node generates packets, each including the data to be transmitted and classification information that indicates the class of that data to be determined according to its required performance, and controls transmission of the packets. The router includes a buffer section configured to store the received packets separately after having classified the packets according to their required performance by reference to the classification information, and a relay controller configured to control transmission of the packets stored in the buffer section at a transmission rate which is equal to or higher than the sum of transmission rates to be guaranteed for every first node associated with the classification information by reference to each piece of the classification information. | 07-24-2014 |
20140223053 | ACCESS CONTROLLER, ROUTER, ACCESS CONTROLLING METHOD, AND COMPUTER PROGRAM - The access controller conducts arbitration between first nodes, each of which is attempting to transmit data to any of second nodes as destinations through a network of buses. The access controller includes: a buffer which receives the data that have been provided by the first nodes with mutually different required qualities and destinations, classifies the data according to their destinations and required qualities, and stores the classified data separately; an inter-class arbitrator which sequentially selects one of the required qualities of the data after another in the order of their severity; an inter-destination arbitrator which selects the destinations of the data to be transmitted and gets the transmission quantities of the data distributed among the destinations; and a transmission controller which controls transmission of the data based on the required qualities selected by the inter-class arbitrator and the destinations selected by the inter-destination arbitrator. | 08-07-2014 |
20140365632 | INTERFACE APPARATUS AND MEMORY BUS SYSTEM - An exemplary interface apparatus includes: a header generator which receives, in a first order, a plurality of request headers extracted from a plurality of request packets, generates response headers associated with the request headers, and then stores the response headers so that the response headers are read in the first order; and a header order controller which controls the header generator so that if the plurality of request data have been transmitted to the memory in a second order, the respective response headers are read in the second order. | 12-11-2014 |
20140365703 | BUS SYSTEM FOR SEMICONDUCTOR CIRCUIT - An exemplary semiconductor circuit bus system includes: a first bus comprised of distributed buses and having a first transfer rate; a second bus with a second transfer rate higher than the first transfer rate; a transmission node; a bus interface (IF) to connect the transmission node to the first bus; a router which connects the first and second buses; and a reception node connected to the second bus. The bus IF controls the flow rate of data flowing through the transmission routes of the first bus by reference to information about the amounts of transmissible data of the transmission routes. The router allocates the amounts of transmissible data to the transmission routes of the first bus and provides information about the amounts of transmissible data of the transmission routes for the bus IF and also controls the flow rate of the data flowing through the second bus. | 12-11-2014 |
20150052283 | INTERFACE APPARATUS AND MEMORY BUS SYSTEM - An exemplary interface apparatus according to the present disclosure connects together an initiator and a packet exchange type bus network formed on the integrated circuit. In the bus network, if the initiator has submitted request data with a deadline time specified, the initiator receives, by the deadline time, response data to be issued by a node in response to the request data. The interface apparatus includes: a correcting circuit which corrects the deadline time of the request data according to the timing when the request data has been submitted, thereby generating corrected deadline time information; a header generator which generates a packet header that stores the corrected deadline time information; and a packetizing processor which generates a request packet based on the request data and the packet header. | 02-19-2015 |